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AArch32Mmu.h File Reference

Go to the source code of this file.

Macros

#define TTBR_NOT_OUTER_SHAREABLE   BIT5
 
#define TTBR_RGN_OUTER_NON_CACHEABLE   0
 
#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC   BIT3
 
#define TTBR_RGN_OUTER_WRITE_THROUGH   BIT4
 
#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC   (BIT3|BIT4)
 
#define TTBR_SHAREABLE   BIT1
 
#define TTBR_NON_SHAREABLE   0
 
#define TTBR_INNER_CACHEABLE   BIT0
 
#define TTBR_INNER_NON_CACHEABLE   0
 
#define TTBR_RGN_INNER_NON_CACHEABLE   0
 
#define TTBR_RGN_INNER_WRITE_BACK_ALLOC   BIT6
 
#define TTBR_RGN_INNER_WRITE_THROUGH   BIT0
 
#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC   (BIT0|BIT6)
 
#define TTBR_WRITE_THROUGH   ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
 
#define TTBR_WRITE_BACK_NO_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
 
#define TTBR_NON_CACHEABLE   ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_INNER_NON_CACHEABLE )
 
#define TTBR_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)
 
#define TTBR_MP_WRITE_THROUGH   ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)
 
#define TTBR_MP_WRITE_BACK_NO_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)
 
#define TTBR_MP_NON_CACHEABLE   ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )
 
#define TTBR_MP_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)
 
#define TRANSLATION_TABLE_SECTION_COUNT   4096
 
#define TRANSLATION_TABLE_SECTION_SIZE   (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
 
#define TRANSLATION_TABLE_SECTION_ALIGNMENT   (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)
 
#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK   (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)
 
#define TRANSLATION_TABLE_PAGE_COUNT   256
 
#define TRANSLATION_TABLE_PAGE_SIZE   (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
 
#define TRANSLATION_TABLE_PAGE_ALIGNMENT   (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)
 
#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK   (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)
 
#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address)   ((UINT32 *)(table) + (((UINTN)(address)) >> 20))
 
#define TT_DESCRIPTOR_SECTION_TYPE_MASK   ((1UL << 18) | (3UL << 0))
 
#define TT_DESCRIPTOR_SECTION_TYPE_FAULT   (0UL << 0)
 
#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE   (1UL << 0)
 
#define TT_DESCRIPTOR_SECTION_TYPE_SECTION   ((0UL << 18) | (2UL << 0))
 
#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION   ((1UL << 18) | (2UL << 0))
 
#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc)   (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)
 
#define TT_DESCRIPTOR_PAGE_TYPE_MASK   (1UL << 1)
 
#define TT_DESCRIPTOR_PAGE_TYPE_FAULT   (0UL << 1)
 
#define TT_DESCRIPTOR_PAGE_TYPE_PAGE   (1UL << 1)
 
#define TT_DESCRIPTOR_SECTION_SIZE   (0x00100000)
 
#define TT_DESCRIPTOR_SECTION_NS_MASK   (1UL << 19)
 
#define TT_DESCRIPTOR_SECTION_NS   (1UL << 19)
 
#define TT_DESCRIPTOR_SECTION_NG_MASK   (1UL << 17)
 
#define TT_DESCRIPTOR_SECTION_NG_GLOBAL   (0UL << 17)
 
#define TT_DESCRIPTOR_SECTION_NG_LOCAL   (1UL << 17)
 
#define TT_DESCRIPTOR_PAGE_NG_MASK   (1UL << 11)
 
#define TT_DESCRIPTOR_PAGE_NG_GLOBAL   (0UL << 11)
 
#define TT_DESCRIPTOR_PAGE_NG_LOCAL   (1UL << 11)
 
#define TT_DESCRIPTOR_SECTION_S_MASK   (1UL << 16)
 
#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED   (0UL << 16)
 
#define TT_DESCRIPTOR_SECTION_S_SHARED   (1UL << 16)
 
#define TT_DESCRIPTOR_PAGE_S_MASK   (1UL << 10)
 
#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED   (0UL << 10)
 
#define TT_DESCRIPTOR_PAGE_S_SHARED   (1UL << 10)
 
#define TT_DESCRIPTOR_SECTION_AP_MASK   ((1UL << 15) | (1UL << 11))
 
#define TT_DESCRIPTOR_SECTION_AP_NO_RW   ((0UL << 15) | (0UL << 11))
 
#define TT_DESCRIPTOR_SECTION_AP_RW_RW   ((0UL << 15) | (1UL << 11))
 
#define TT_DESCRIPTOR_SECTION_AP_NO_RO   ((1UL << 15) | (0UL << 11))
 
#define TT_DESCRIPTOR_SECTION_AP_RO_RO   ((1UL << 15) | (1UL << 11))
 
#define TT_DESCRIPTOR_SECTION_AF   (1UL << 10)
 
#define TT_DESCRIPTOR_PAGE_AP_MASK   ((1UL << 9) | (1UL << 5))
 
#define TT_DESCRIPTOR_PAGE_AP_NO_RW   ((0UL << 9) | (0UL << 5))
 
#define TT_DESCRIPTOR_PAGE_AP_RW_RW   ((0UL << 9) | (1UL << 5))
 
#define TT_DESCRIPTOR_PAGE_AP_NO_RO   ((1UL << 9) | (0UL << 5))
 
#define TT_DESCRIPTOR_PAGE_AP_RO_RO   ((1UL << 9) | (1UL << 5))
 
#define TT_DESCRIPTOR_PAGE_AF   (1UL << 4)
 
#define TT_DESCRIPTOR_SECTION_XN_MASK   (0x1UL << 4)
 
#define TT_DESCRIPTOR_PAGE_XN_MASK   (0x1UL << 0)
 
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK   ((3UL << 12) | (1UL << 3) | (1UL << 2))
 
#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK   (1UL << 3)
 
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED   ((0UL << 12) | (0UL << 3) | (0UL << 2))
 
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE   ((0UL << 12) | (0UL << 3) | (1UL << 2))
 
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC   ((0UL << 12) | (1UL << 3) | (0UL << 2))
 
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC   ((0UL << 12) | (1UL << 3) | (1UL << 2))
 
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE   ((1UL << 12) | (0UL << 3) | (0UL << 2))
 
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC   ((1UL << 12) | (1UL << 3) | (1UL << 2))
 
#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE   ((2UL << 12) | (0UL << 3) | (0UL << 2))
 
#define TT_DESCRIPTOR_PAGE_SIZE   (0x00001000)
 
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK   ((3UL << 6) | (1UL << 3) | (1UL << 2))
 
#define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK   (1UL << 3)
 
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED   ((0UL << 6) | (0UL << 3) | (0UL << 2))
 
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE   ((0UL << 6) | (0UL << 3) | (1UL << 2))
 
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC   ((0UL << 6) | (1UL << 3) | (0UL << 2))
 
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC   ((0UL << 6) | (1UL << 3) | (1UL << 2))
 
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE   ((1UL << 6) | (0UL << 3) | (0UL << 2))
 
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC   ((1UL << 6) | (1UL << 3) | (1UL << 2))
 
#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE   ((2UL << 6) | (0UL << 3) | (0UL << 2))
 
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc)   ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)
 
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc)   ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)
 
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc)   ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)
 
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AF(Desc)   ((((Desc) & TT_DESCRIPTOR_SECTION_AF) >> 6) & TT_DESCRIPTOR_PAGE_AF)
 
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc)   ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK)
 
#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc)   ((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))
 
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc)   ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)
 
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_S(Desc)   ((((Desc) & TT_DESCRIPTOR_PAGE_S_MASK) << 6) & TT_DESCRIPTOR_SECTION_S_MASK)
 
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AF(Desc)   ((((Desc) & TT_DESCRIPTOR_PAGE_AF) << 6) & TT_DESCRIPTOR_SECTION_AF)
 
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_XN(Desc)   ((((Desc) & TT_DESCRIPTOR_PAGE_XN_MASK) << 4) & TT_DESCRIPTOR_SECTION_XN_MASK)
 
#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc)   ((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))
 
#define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK
 
#define TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK
 
#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK   (0x0FUL << 5)
 
#define TT_DESCRIPTOR_SECTION_DOMAIN(a)   (((a) & 0x0FUL) << 5)
 
#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK   (0xFFF00000)
 
#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK   (0xFFFFFC00)
 
#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a)   ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)
 
#define TT_DESCRIPTOR_SECTION_BASE_SHIFT   20
 
#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK   (0xFFFFF000)
 
#define TT_DESCRIPTOR_PAGE_INDEX_MASK   (0x000FF000)
 
#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a)   ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)
 
#define TT_DESCRIPTOR_PAGE_BASE_SHIFT   12
 
#define TT_DESCRIPTOR_SECTION_DEFAULT
 
#define TT_DESCRIPTOR_SECTION_WRITE_BACK
 
#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH
 
#define TT_DESCRIPTOR_SECTION_DEVICE
 
#define TT_DESCRIPTOR_SECTION_UNCACHED
 
#define TT_DESCRIPTOR_PAGE_WRITE_BACK
 
#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH
 
#define TT_DESCRIPTOR_PAGE_DEVICE
 
#define TT_DESCRIPTOR_PAGE_UNCACHED
 

Typedefs

typedef UINT32 ARM_FIRST_LEVEL_DESCRIPTOR
 
typedef UINT32 ARM_PAGE_TABLE_ENTRY
 

Functions

UINT32 ConvertSectionAttributesToPageAttributes (IN UINT32 SectionAttributes)
 

Detailed Description

Copyright (c) 2011-2013, ARM Limited. All rights reserved.

SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file AArch32Mmu.h.

Macro Definition Documentation

◆ TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS

#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS (   table,
  address 
)    ((UINT32 *)(table) + (((UINTN)(address)) >> 20))

Definition at line 46 of file AArch32Mmu.h.

◆ TRANSLATION_TABLE_PAGE_ALIGNMENT

#define TRANSLATION_TABLE_PAGE_ALIGNMENT   (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)

Definition at line 43 of file AArch32Mmu.h.

◆ TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK

#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK   (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1)

Definition at line 44 of file AArch32Mmu.h.

◆ TRANSLATION_TABLE_PAGE_COUNT

#define TRANSLATION_TABLE_PAGE_COUNT   256

Definition at line 41 of file AArch32Mmu.h.

◆ TRANSLATION_TABLE_PAGE_SIZE

#define TRANSLATION_TABLE_PAGE_SIZE   (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT)

Definition at line 42 of file AArch32Mmu.h.

◆ TRANSLATION_TABLE_SECTION_ALIGNMENT

#define TRANSLATION_TABLE_SECTION_ALIGNMENT   (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)

Definition at line 38 of file AArch32Mmu.h.

◆ TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK

#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK   (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1)

Definition at line 39 of file AArch32Mmu.h.

◆ TRANSLATION_TABLE_SECTION_COUNT

#define TRANSLATION_TABLE_SECTION_COUNT   4096

Definition at line 36 of file AArch32Mmu.h.

◆ TRANSLATION_TABLE_SECTION_SIZE

#define TRANSLATION_TABLE_SECTION_SIZE   (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT)

Definition at line 37 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_PAGE_AF

#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AF (   Desc)    ((((Desc) & TT_DESCRIPTOR_SECTION_AF) >> 6) & TT_DESCRIPTOR_PAGE_AF)

Definition at line 127 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_PAGE_AP

#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP (   Desc)    ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK)

Definition at line 124 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY

#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY (   Desc)    ((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2)))

Definition at line 129 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_PAGE_NG

#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG (   Desc)    ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK)

Definition at line 125 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_PAGE_S

#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S (   Desc)    ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK)

Definition at line 126 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_PAGE_XN

#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN (   Desc)    ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK)

Definition at line 128 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_SECTION_AF

#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AF (   Desc)    ((((Desc) & TT_DESCRIPTOR_PAGE_AF) << 6) & TT_DESCRIPTOR_SECTION_AF)

Definition at line 133 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_SECTION_AP

#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (   Desc)    ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK)

Definition at line 131 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY

#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (   Desc)    ((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2)))

Definition at line 135 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_SECTION_S

#define TT_DESCRIPTOR_CONVERT_TO_SECTION_S (   Desc)    ((((Desc) & TT_DESCRIPTOR_PAGE_S_MASK) << 6) & TT_DESCRIPTOR_SECTION_S_MASK)

Definition at line 132 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_CONVERT_TO_SECTION_XN

#define TT_DESCRIPTOR_CONVERT_TO_SECTION_XN (   Desc)    ((((Desc) & TT_DESCRIPTOR_PAGE_XN_MASK) << 4) & TT_DESCRIPTOR_SECTION_XN_MASK)

Definition at line 134 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_AF

#define TT_DESCRIPTOR_PAGE_AF   (1UL << 4)

Definition at line 97 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_AP_MASK

#define TT_DESCRIPTOR_PAGE_AP_MASK   ((1UL << 9) | (1UL << 5))

Definition at line 91 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_AP_NO_RO

#define TT_DESCRIPTOR_PAGE_AP_NO_RO   ((1UL << 9) | (0UL << 5))

Definition at line 94 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_AP_NO_RW

#define TT_DESCRIPTOR_PAGE_AP_NO_RW   ((0UL << 9) | (0UL << 5))

Definition at line 92 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_AP_RO_RO

#define TT_DESCRIPTOR_PAGE_AP_RO_RO   ((1UL << 9) | (1UL << 5))

Definition at line 95 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_AP_RW_RW

#define TT_DESCRIPTOR_PAGE_AP_RW_RW   ((0UL << 9) | (1UL << 5))

Definition at line 93 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK

#define TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK
Value:
(TT_DESCRIPTOR_PAGE_NG_MASK | TT_DESCRIPTOR_PAGE_S_MASK | \
TT_DESCRIPTOR_PAGE_AP_MASK | TT_DESCRIPTOR_PAGE_XN_MASK | \
TT_DESCRIPTOR_PAGE_AF | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK)

Definition at line 142 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_BASE_ADDRESS

#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS (   a)    ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK)

Definition at line 157 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK

#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK   (0xFFFFF000)

Definition at line 155 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_BASE_SHIFT

#define TT_DESCRIPTOR_PAGE_BASE_SHIFT   12

Definition at line 158 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK

#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK   ((3UL << 6) | (1UL << 3) | (1UL << 2))

Definition at line 114 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE

#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE   ((1UL << 6) | (0UL << 3) | (0UL << 2))

Definition at line 120 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE

#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE   ((2UL << 6) | (0UL << 3) | (0UL << 2))

Definition at line 122 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE

#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE   ((0UL << 6) | (0UL << 3) | (1UL << 2))

Definition at line 117 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED

#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED   ((0UL << 6) | (0UL << 3) | (0UL << 2))

Definition at line 116 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC

#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC   ((1UL << 6) | (1UL << 3) | (1UL << 2))

Definition at line 121 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC

#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC   ((0UL << 6) | (1UL << 3) | (1UL << 2))

Definition at line 119 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC

#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC   ((0UL << 6) | (1UL << 3) | (0UL << 2))

Definition at line 118 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_CACHEABLE_MASK

#define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK   (1UL << 3)

Definition at line 115 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_DEVICE

#define TT_DESCRIPTOR_PAGE_DEVICE
Value:
(TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
TT_DESCRIPTOR_PAGE_AP_RW_RW | \
TT_DESCRIPTOR_PAGE_AF | \
TT_DESCRIPTOR_PAGE_XN_MASK | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE)

Definition at line 191 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_INDEX_MASK

#define TT_DESCRIPTOR_PAGE_INDEX_MASK   (0x000FF000)

Definition at line 156 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_NG_GLOBAL

#define TT_DESCRIPTOR_PAGE_NG_GLOBAL   (0UL << 11)

Definition at line 72 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_NG_LOCAL

#define TT_DESCRIPTOR_PAGE_NG_LOCAL   (1UL << 11)

Definition at line 73 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_NG_MASK

#define TT_DESCRIPTOR_PAGE_NG_MASK   (1UL << 11)

Definition at line 71 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_S_MASK

#define TT_DESCRIPTOR_PAGE_S_MASK   (1UL << 10)

Definition at line 79 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_S_NOT_SHARED

#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED   (0UL << 10)

Definition at line 80 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_S_SHARED

#define TT_DESCRIPTOR_PAGE_S_SHARED   (1UL << 10)

Definition at line 81 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_SIZE

#define TT_DESCRIPTOR_PAGE_SIZE   (0x00001000)

Definition at line 112 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_TYPE_FAULT

#define TT_DESCRIPTOR_PAGE_TYPE_FAULT   (0UL << 1)

Definition at line 58 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_TYPE_MASK

#define TT_DESCRIPTOR_PAGE_TYPE_MASK   (1UL << 1)

Definition at line 57 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_TYPE_PAGE

#define TT_DESCRIPTOR_PAGE_TYPE_PAGE   (1UL << 1)

Definition at line 59 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_UNCACHED

#define TT_DESCRIPTOR_PAGE_UNCACHED
Value:
(TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \
TT_DESCRIPTOR_PAGE_AP_RW_RW | \
TT_DESCRIPTOR_PAGE_AF | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE)

Definition at line 198 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_WRITE_BACK

#define TT_DESCRIPTOR_PAGE_WRITE_BACK
Value:
(TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
TT_DESCRIPTOR_PAGE_S_SHARED | \
TT_DESCRIPTOR_PAGE_AP_RW_RW | \
TT_DESCRIPTOR_PAGE_AF | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC)

Definition at line 179 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_WRITE_THROUGH

#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH
Value:
(TT_DESCRIPTOR_PAGE_TYPE_PAGE | \
TT_DESCRIPTOR_PAGE_NG_GLOBAL | \
TT_DESCRIPTOR_PAGE_S_SHARED | \
TT_DESCRIPTOR_PAGE_AP_RW_RW | \
TT_DESCRIPTOR_PAGE_AF | \
TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)

Definition at line 185 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_PAGE_XN_MASK

#define TT_DESCRIPTOR_PAGE_XN_MASK   (0x1UL << 0)

Definition at line 100 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_AF

#define TT_DESCRIPTOR_SECTION_AF   (1UL << 10)

Definition at line 89 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_AP_MASK

#define TT_DESCRIPTOR_SECTION_AP_MASK   ((1UL << 15) | (1UL << 11))

Definition at line 83 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_AP_NO_RO

#define TT_DESCRIPTOR_SECTION_AP_NO_RO   ((1UL << 15) | (0UL << 11))

Definition at line 86 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_AP_NO_RW

#define TT_DESCRIPTOR_SECTION_AP_NO_RW   ((0UL << 15) | (0UL << 11))

Definition at line 84 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_AP_RO_RO

#define TT_DESCRIPTOR_SECTION_AP_RO_RO   ((1UL << 15) | (1UL << 11))

Definition at line 87 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_AP_RW_RW

#define TT_DESCRIPTOR_SECTION_AP_RW_RW   ((0UL << 15) | (1UL << 11))

Definition at line 85 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK

#define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK
Value:
(TT_DESCRIPTOR_SECTION_NS_MASK | TT_DESCRIPTOR_SECTION_NG_MASK | \
TT_DESCRIPTOR_SECTION_S_MASK | TT_DESCRIPTOR_SECTION_AP_MASK | \
TT_DESCRIPTOR_SECTION_AF | \
TT_DESCRIPTOR_SECTION_XN_MASK | TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK)

Definition at line 137 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_BASE_ADDRESS

#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS (   a)    ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK)

Definition at line 152 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK

#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK   (0xFFF00000)

Definition at line 150 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_BASE_SHIFT

#define TT_DESCRIPTOR_SECTION_BASE_SHIFT   20

Definition at line 153 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK

#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK   ((3UL << 12) | (1UL << 3) | (1UL << 2))

Definition at line 102 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE

#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE   ((1UL << 12) | (0UL << 3) | (0UL << 2))

Definition at line 108 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE

#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE   ((2UL << 12) | (0UL << 3) | (0UL << 2))

Definition at line 110 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE

#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE   ((0UL << 12) | (0UL << 3) | (1UL << 2))

Definition at line 105 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED

#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED   ((0UL << 12) | (0UL << 3) | (0UL << 2))

Definition at line 104 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC

#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC   ((1UL << 12) | (1UL << 3) | (1UL << 2))

Definition at line 109 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC

#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC   ((0UL << 12) | (1UL << 3) | (1UL << 2))

Definition at line 107 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC

#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC   ((0UL << 12) | (1UL << 3) | (0UL << 2))

Definition at line 106 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_CACHEABLE_MASK

#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK   (1UL << 3)

Definition at line 103 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_DEFAULT

#define TT_DESCRIPTOR_SECTION_DEFAULT
Value:
(TT_DESCRIPTOR_SECTION_TYPE_SECTION | \
TT_DESCRIPTOR_SECTION_NG_GLOBAL | \
TT_DESCRIPTOR_SECTION_S_SHARED | \
TT_DESCRIPTOR_SECTION_DOMAIN(0) | \
TT_DESCRIPTOR_SECTION_AP_RW_RW | \
TT_DESCRIPTOR_SECTION_AF)

Definition at line 160 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_DEVICE

#define TT_DESCRIPTOR_SECTION_DEVICE
Value:
(TT_DESCRIPTOR_SECTION_DEFAULT | \
TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE)

Definition at line 173 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_DOMAIN

#define TT_DESCRIPTOR_SECTION_DOMAIN (   a)    (((a) & 0x0FUL) << 5)

Definition at line 148 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_DOMAIN_MASK

#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK   (0x0FUL << 5)

Definition at line 147 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_NG_GLOBAL

#define TT_DESCRIPTOR_SECTION_NG_GLOBAL   (0UL << 17)

Definition at line 68 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_NG_LOCAL

#define TT_DESCRIPTOR_SECTION_NG_LOCAL   (1UL << 17)

Definition at line 69 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_NG_MASK

#define TT_DESCRIPTOR_SECTION_NG_MASK   (1UL << 17)

Definition at line 67 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_NS

#define TT_DESCRIPTOR_SECTION_NS   (1UL << 19)

Definition at line 65 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_NS_MASK

#define TT_DESCRIPTOR_SECTION_NS_MASK   (1UL << 19)

Definition at line 64 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK

#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK   (0xFFFFFC00)

Definition at line 151 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_S_MASK

#define TT_DESCRIPTOR_SECTION_S_MASK   (1UL << 16)

Definition at line 75 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_S_NOT_SHARED

#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED   (0UL << 16)

Definition at line 76 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_S_SHARED

#define TT_DESCRIPTOR_SECTION_S_SHARED   (1UL << 16)

Definition at line 77 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_SIZE

#define TT_DESCRIPTOR_SECTION_SIZE   (0x00100000)

Definition at line 62 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_TYPE_FAULT

#define TT_DESCRIPTOR_SECTION_TYPE_FAULT   (0UL << 0)

Definition at line 50 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE

#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (   Desc)    (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE)

Definition at line 54 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_TYPE_MASK

#define TT_DESCRIPTOR_SECTION_TYPE_MASK   ((1UL << 18) | (3UL << 0))

Definition at line 49 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE

#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE   (1UL << 0)

Definition at line 51 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_TYPE_SECTION

#define TT_DESCRIPTOR_SECTION_TYPE_SECTION   ((0UL << 18) | (2UL << 0))

Definition at line 52 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION

#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION   ((1UL << 18) | (2UL << 0))

Definition at line 53 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_UNCACHED

#define TT_DESCRIPTOR_SECTION_UNCACHED
Value:
(TT_DESCRIPTOR_SECTION_DEFAULT | \
TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE)

Definition at line 176 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_WRITE_BACK

#define TT_DESCRIPTOR_SECTION_WRITE_BACK
Value:
(TT_DESCRIPTOR_SECTION_DEFAULT | \
TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC)

Definition at line 167 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_WRITE_THROUGH

#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH
Value:
(TT_DESCRIPTOR_SECTION_DEFAULT | \
TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC)

Definition at line 170 of file AArch32Mmu.h.

◆ TT_DESCRIPTOR_SECTION_XN_MASK

#define TT_DESCRIPTOR_SECTION_XN_MASK   (0x1UL << 4)

Definition at line 99 of file AArch32Mmu.h.

◆ TTBR_INNER_CACHEABLE

#define TTBR_INNER_CACHEABLE   BIT0

Definition at line 19 of file AArch32Mmu.h.

◆ TTBR_INNER_NON_CACHEABLE

#define TTBR_INNER_NON_CACHEABLE   0

Definition at line 20 of file AArch32Mmu.h.

◆ TTBR_MP_NON_CACHEABLE

#define TTBR_MP_NON_CACHEABLE   ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE )

Definition at line 33 of file AArch32Mmu.h.

◆ TTBR_MP_WRITE_BACK_ALLOC

#define TTBR_MP_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE)

Definition at line 34 of file AArch32Mmu.h.

◆ TTBR_MP_WRITE_BACK_NO_ALLOC

#define TTBR_MP_WRITE_BACK_NO_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE)

Definition at line 32 of file AArch32Mmu.h.

◆ TTBR_MP_WRITE_THROUGH

#define TTBR_MP_WRITE_THROUGH   ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE)

Definition at line 31 of file AArch32Mmu.h.

◆ TTBR_NON_CACHEABLE

#define TTBR_NON_CACHEABLE   ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_INNER_NON_CACHEABLE )

Definition at line 28 of file AArch32Mmu.h.

◆ TTBR_NON_SHAREABLE

#define TTBR_NON_SHAREABLE   0

Definition at line 18 of file AArch32Mmu.h.

◆ TTBR_NOT_OUTER_SHAREABLE

#define TTBR_NOT_OUTER_SHAREABLE   BIT5

Definition at line 12 of file AArch32Mmu.h.

◆ TTBR_RGN_INNER_NON_CACHEABLE

#define TTBR_RGN_INNER_NON_CACHEABLE   0

Definition at line 21 of file AArch32Mmu.h.

◆ TTBR_RGN_INNER_WRITE_BACK_ALLOC

#define TTBR_RGN_INNER_WRITE_BACK_ALLOC   BIT6

Definition at line 22 of file AArch32Mmu.h.

◆ TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC

#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC   (BIT0|BIT6)

Definition at line 24 of file AArch32Mmu.h.

◆ TTBR_RGN_INNER_WRITE_THROUGH

#define TTBR_RGN_INNER_WRITE_THROUGH   BIT0

Definition at line 23 of file AArch32Mmu.h.

◆ TTBR_RGN_OUTER_NON_CACHEABLE

#define TTBR_RGN_OUTER_NON_CACHEABLE   0

Definition at line 13 of file AArch32Mmu.h.

◆ TTBR_RGN_OUTER_WRITE_BACK_ALLOC

#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC   BIT3

Definition at line 14 of file AArch32Mmu.h.

◆ TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC

#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC   (BIT3|BIT4)

Definition at line 16 of file AArch32Mmu.h.

◆ TTBR_RGN_OUTER_WRITE_THROUGH

#define TTBR_RGN_OUTER_WRITE_THROUGH   BIT4

Definition at line 15 of file AArch32Mmu.h.

◆ TTBR_SHAREABLE

#define TTBR_SHAREABLE   BIT1

Definition at line 17 of file AArch32Mmu.h.

◆ TTBR_WRITE_BACK_ALLOC

#define TTBR_WRITE_BACK_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)

Definition at line 29 of file AArch32Mmu.h.

◆ TTBR_WRITE_BACK_NO_ALLOC

#define TTBR_WRITE_BACK_NO_ALLOC   ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)

Definition at line 27 of file AArch32Mmu.h.

◆ TTBR_WRITE_THROUGH

#define TTBR_WRITE_THROUGH   ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE)

Definition at line 26 of file AArch32Mmu.h.

Typedef Documentation

◆ ARM_FIRST_LEVEL_DESCRIPTOR

typedef UINT32 ARM_FIRST_LEVEL_DESCRIPTOR

Definition at line 206 of file AArch32Mmu.h.

◆ ARM_PAGE_TABLE_ENTRY

typedef UINT32 ARM_PAGE_TABLE_ENTRY

Definition at line 209 of file AArch32Mmu.h.

Function Documentation

◆ ConvertSectionAttributesToPageAttributes()

UINT32 ConvertSectionAttributesToPageAttributes ( IN UINT32  SectionAttributes)

Definition at line 17 of file ArmMmuLibConvert.c.