Data Structures
struct	DATA_32

union	DATA_64

struct	EFI_AHCI_COMMAND_LIST

struct	EFI_AHCI_COMMAND_FIS

struct	EFI_AHCI_ATAPI_COMMAND

struct	EFI_AHCI_COMMAND_PRDT

struct	EFI_AHCI_COMMAND_TABLE

struct	EFI_AHCI_RECEIVED_FIS

struct	DEVSLP_TIMING_VARIABLES

struct	EFI_AHCI_REGISTERS

Macros
#define	EFI_AHCI_BAR_INDEX 0x05

#define	EFI_AHCI_CAPABILITY_OFFSET 0x0000

#define	EFI_AHCI_CAP_SAM BIT18

#define	EFI_AHCI_CAP_SSS BIT27

#define	EFI_AHCI_CAP_S64A BIT31

#define	EFI_AHCI_GHC_OFFSET 0x0004

#define	EFI_AHCI_GHC_RESET BIT0

#define	EFI_AHCI_GHC_IE BIT1

#define	EFI_AHCI_GHC_ENABLE BIT31

#define	EFI_AHCI_IS_OFFSET 0x0008

#define	EFI_AHCI_PI_OFFSET 0x000C

#define	EFI_AHCI_MAX_PORTS 32

#define	AHCI_CAPABILITY2_OFFSET 0x0024

#define	AHCI_CAP2_SDS BIT3

#define	AHCI_CAP2_SADM BIT4

#define	EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15

#define	EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT EFI_TIMER_PERIOD_MILLISECONDS(500)

#define	EFI_AHCI_BUS_RESET_TIMEOUT EFI_TIMER_PERIOD_SECONDS(1)

#define	EFI_AHCI_ATAPI_DEVICE_SIG 0xEB140000

#define	EFI_AHCI_ATA_DEVICE_SIG 0x00000000

#define	EFI_AHCI_PORT_MULTIPLIER_SIG 0x96690000

#define	EFI_AHCI_ATAPI_SIG_MASK 0xFFFF0000

#define	EFI_AHCI_MAX_DATA_PER_PRDT 0x400000

#define	EFI_AHCI_FIS_REGISTER_H2D 0x27

#define	EFI_AHCI_FIS_REGISTER_H2D_LENGTH 20

#define	EFI_AHCI_FIS_REGISTER_D2H 0x34

#define	EFI_AHCI_FIS_REGISTER_D2H_LENGTH 20

#define	EFI_AHCI_FIS_DMA_ACTIVATE 0x39

#define	EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH 4

#define	EFI_AHCI_FIS_DMA_SETUP 0x41

#define	EFI_AHCI_FIS_DMA_SETUP_LENGTH 28

#define	EFI_AHCI_FIS_DATA 0x46

#define	EFI_AHCI_FIS_BIST 0x58

#define	EFI_AHCI_FIS_BIST_LENGTH 12

#define	EFI_AHCI_FIS_PIO_SETUP 0x5F

#define	EFI_AHCI_FIS_PIO_SETUP_LENGTH 20

#define	EFI_AHCI_FIS_SET_DEVICE 0xA1

#define	EFI_AHCI_FIS_SET_DEVICE_LENGTH 8

#define	EFI_AHCI_D2H_FIS_OFFSET 0x40

#define	EFI_AHCI_DMA_FIS_OFFSET 0x00

#define	EFI_AHCI_PIO_FIS_OFFSET 0x20

#define	EFI_AHCI_SDB_FIS_OFFSET 0x58

#define	EFI_AHCI_FIS_TYPE_MASK 0xFF

#define	EFI_AHCI_U_FIS_OFFSET 0x60

#define	EFI_AHCI_PORT_START 0x0100

#define	EFI_AHCI_PORT_REG_WIDTH 0x0080

#define	EFI_AHCI_PORT_CLB 0x0000

#define	EFI_AHCI_PORT_CLBU 0x0004

#define	EFI_AHCI_PORT_FB 0x0008

#define	EFI_AHCI_PORT_FBU 0x000C

#define	EFI_AHCI_PORT_IS 0x0010

#define	EFI_AHCI_PORT_IS_DHRS BIT0

#define	EFI_AHCI_PORT_IS_PSS BIT1

#define	EFI_AHCI_PORT_IS_DSS BIT2

#define	EFI_AHCI_PORT_IS_SDBS BIT3

#define	EFI_AHCI_PORT_IS_UFS BIT4

#define	EFI_AHCI_PORT_IS_DPS BIT5

#define	EFI_AHCI_PORT_IS_PCS BIT6

#define	EFI_AHCI_PORT_IS_DIS BIT7

#define	EFI_AHCI_PORT_IS_PRCS BIT22

#define	EFI_AHCI_PORT_IS_IPMS BIT23

#define	EFI_AHCI_PORT_IS_OFS BIT24

#define	EFI_AHCI_PORT_IS_INFS BIT26

#define	EFI_AHCI_PORT_IS_IFS BIT27

#define	EFI_AHCI_PORT_IS_HBDS BIT28

#define	EFI_AHCI_PORT_IS_HBFS BIT29

#define	EFI_AHCI_PORT_IS_TFES BIT30

#define	EFI_AHCI_PORT_IS_CPDS BIT31

#define	EFI_AHCI_PORT_IS_CLEAR 0xFFFFFFFF

#define	EFI_AHCI_PORT_IS_FIS_CLEAR 0x0000000F

#define	EFI_AHCI_PORT_IS_ERROR_MASK (EFI_AHCI_PORT_IS_INFS \| EFI_AHCI_PORT_IS_IFS \| EFI_AHCI_PORT_IS_HBDS \| EFI_AHCI_PORT_IS_HBFS \| EFI_AHCI_PORT_IS_TFES)

#define	EFI_AHCI_PORT_IS_FATAL_ERROR_MASK (EFI_AHCI_PORT_IS_IFS \| EFI_AHCI_PORT_IS_HBDS \| EFI_AHCI_PORT_IS_HBFS \| EFI_AHCI_PORT_IS_TFES)

#define	EFI_AHCI_PORT_IE 0x0014

#define	EFI_AHCI_PORT_CMD 0x0018

#define	EFI_AHCI_PORT_CMD_ST_MASK 0xFFFFFFFE

#define	EFI_AHCI_PORT_CMD_ST BIT0

#define	EFI_AHCI_PORT_CMD_SUD BIT1

#define	EFI_AHCI_PORT_CMD_POD BIT2

#define	EFI_AHCI_PORT_CMD_CLO BIT3

#define	EFI_AHCI_PORT_CMD_FRE BIT4

#define	EFI_AHCI_PORT_CMD_CCS_MASK (BIT8 \| BIT9 \| BIT10 \| BIT11 \| BIT12)

#define	EFI_AHCI_PORT_CMD_CCS_SHIFT 8

#define	EFI_AHCI_PORT_CMD_FR BIT14

#define	EFI_AHCI_PORT_CMD_CR BIT15

#define	EFI_AHCI_PORT_CMD_MASK ~(EFI_AHCI_PORT_CMD_ST \| EFI_AHCI_PORT_CMD_FRE \| EFI_AHCI_PORT_CMD_COL)

#define	EFI_AHCI_PORT_CMD_PMA BIT17

#define	EFI_AHCI_PORT_CMD_HPCP BIT18

#define	EFI_AHCI_PORT_CMD_MPSP BIT19

#define	EFI_AHCI_PORT_CMD_CPD BIT20

#define	EFI_AHCI_PORT_CMD_ESP BIT21

#define	EFI_AHCI_PORT_CMD_ATAPI BIT24

#define	EFI_AHCI_PORT_CMD_DLAE BIT25

#define	EFI_AHCI_PORT_CMD_ALPE BIT26

#define	EFI_AHCI_PORT_CMD_ASP BIT27

#define	EFI_AHCI_PORT_CMD_ICC_MASK (BIT28 \| BIT29 \| BIT30 \| BIT31)

#define	EFI_AHCI_PORT_CMD_ACTIVE (1 << 28 )

#define	EFI_AHCI_PORT_TFD 0x0020

#define	EFI_AHCI_PORT_TFD_MASK (BIT7 \| BIT3 \| BIT0)

#define	EFI_AHCI_PORT_TFD_BSY BIT7

#define	EFI_AHCI_PORT_TFD_DRQ BIT3

#define	EFI_AHCI_PORT_TFD_ERR BIT0

#define	EFI_AHCI_PORT_TFD_ERR_MASK 0x00FF00

#define	EFI_AHCI_PORT_TFD_ERR_INT_CRC BIT15

#define	EFI_AHCI_PORT_SIG 0x0024

#define	EFI_AHCI_PORT_SSTS 0x0028

#define	EFI_AHCI_PORT_SSTS_DET_MASK 0x000F

#define	EFI_AHCI_PORT_SSTS_DET 0x0001

#define	EFI_AHCI_PORT_SSTS_DET_PCE 0x0003

#define	EFI_AHCI_PORT_SSTS_SPD_MASK 0x00F0

#define	EFI_AHCI_PORT_SCTL 0x002C

#define	EFI_AHCI_PORT_SCTL_DET_MASK 0x000F

#define	EFI_AHCI_PORT_SCTL_MASK (~EFI_AHCI_PORT_SCTL_DET_MASK)

#define	EFI_AHCI_PORT_SCTL_DET_INIT 0x0001

#define	EFI_AHCI_PORT_SCTL_DET_PHYCOMM 0x0003

#define	EFI_AHCI_PORT_SCTL_SPD_MASK 0x00F0

#define	EFI_AHCI_PORT_SCTL_IPM_MASK 0x0F00

#define	EFI_AHCI_PORT_SCTL_IPM_INIT 0x0300

#define	EFI_AHCI_PORT_SCTL_IPM_PSD 0x0100

#define	EFI_AHCI_PORT_SCTL_IPM_SSD 0x0200

#define	EFI_AHCI_PORT_SERR 0x0030

#define	EFI_AHCI_PORT_SERR_RDIE BIT0

#define	EFI_AHCI_PORT_SERR_RCE BIT1

#define	EFI_AHCI_PORT_SERR_TDIE BIT8

#define	EFI_AHCI_PORT_SERR_PCDIE BIT9

#define	EFI_AHCI_PORT_SERR_PE BIT10

#define	EFI_AHCI_PORT_SERR_IE BIT11

#define	EFI_AHCI_PORT_SERR_PRC BIT16

#define	EFI_AHCI_PORT_SERR_PIE BIT17

#define	EFI_AHCI_PORT_SERR_CW BIT18

#define	EFI_AHCI_PORT_SERR_BDE BIT19

#define	EFI_AHCI_PORT_SERR_DE BIT20

#define	EFI_AHCI_PORT_SERR_CRCE BIT21

#define	EFI_AHCI_PORT_SERR_HE BIT22

#define	EFI_AHCI_PORT_SERR_LSE BIT23

#define	EFI_AHCI_PORT_SERR_TSTE BIT24

#define	EFI_AHCI_PORT_SERR_UFT BIT25

#define	EFI_AHCI_PORT_SERR_EX BIT26

#define	EFI_AHCI_PORT_ERR_CLEAR 0xFFFFFFFF

#define	EFI_AHCI_PORT_SACT 0x0034

#define	EFI_AHCI_PORT_CI 0x0038

#define	EFI_AHCI_PORT_SNTF 0x003C

#define	AHCI_PORT_DEVSLP 0x0044

#define	AHCI_PORT_DEVSLP_ADSE BIT0

#define	AHCI_PORT_DEVSLP_DSP BIT1

#define	AHCI_PORT_DEVSLP_DETO_MASK 0x000003FC

#define	AHCI_PORT_DEVSLP_MDAT_MASK 0x00007C00

#define	AHCI_PORT_DEVSLP_DITO_MASK 0x01FF8000

#define	AHCI_PORT_DEVSLP_DM_MASK 0x1E000000

#define	AHCI_COMMAND_RETRIES (PcdGet32 (PcdAhciCommandRetryCount))

Enumerations
enum	SATA_FIS_TYPE { SataFisD2H = 0 , SataFisPioSetup , SataFisDmaSetup }

Functions
EFI_STATUS EFIAPI	AhciPacketCommandExecute (IN EFI_PCI_IO_PROTOCOL PciIo, IN EFI_AHCI_REGISTERS AhciRegisters, IN UINT8 Port, IN UINT8 PortMultiplier, IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet)

EFI_STATUS EFIAPI	AhciStartCommand (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Port, IN UINT8 CommandSlot, IN UINT64 Timeout)

EFI_STATUS EFIAPI	AhciStopCommand (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Port, IN UINT64 Timeout)

Detailed Description

Header file for AHCI mode of ATA host controller.

Copyright (c) 2010 - 2020, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file AhciMode.h.

Macro Definition Documentation

◆ AHCI_CAP2_SADM

#define AHCI_CAP2_SADM BIT4

Definition at line 29 of file AhciMode.h.

◆ AHCI_CAP2_SDS

#define AHCI_CAP2_SDS BIT3

Definition at line 28 of file AhciMode.h.

◆ AHCI_CAPABILITY2_OFFSET

#define AHCI_CAPABILITY2_OFFSET 0x0024

Definition at line 27 of file AhciMode.h.

◆ AHCI_COMMAND_RETRIES

#define AHCI_COMMAND_RETRIES (PcdGet32 (PcdAhciCommandRetryCount))

Definition at line 197 of file AhciMode.h.

◆ AHCI_PORT_DEVSLP

#define AHCI_PORT_DEVSLP 0x0044

Definition at line 189 of file AhciMode.h.

◆ AHCI_PORT_DEVSLP_ADSE

#define AHCI_PORT_DEVSLP_ADSE BIT0

Definition at line 190 of file AhciMode.h.

◆ AHCI_PORT_DEVSLP_DETO_MASK

#define AHCI_PORT_DEVSLP_DETO_MASK 0x000003FC

Definition at line 192 of file AhciMode.h.

◆ AHCI_PORT_DEVSLP_DITO_MASK

#define AHCI_PORT_DEVSLP_DITO_MASK 0x01FF8000

Definition at line 194 of file AhciMode.h.

◆ AHCI_PORT_DEVSLP_DM_MASK

#define AHCI_PORT_DEVSLP_DM_MASK 0x1E000000

Definition at line 195 of file AhciMode.h.

◆ AHCI_PORT_DEVSLP_DSP

#define AHCI_PORT_DEVSLP_DSP BIT1

Definition at line 191 of file AhciMode.h.

◆ AHCI_PORT_DEVSLP_MDAT_MASK

#define AHCI_PORT_DEVSLP_MDAT_MASK 0x00007C00

Definition at line 193 of file AhciMode.h.

◆ EFI_AHCI_ATA_DEVICE_SIG

#define EFI_AHCI_ATA_DEVICE_SIG 0x00000000

Definition at line 56 of file AhciMode.h.

◆ EFI_AHCI_ATAPI_DEVICE_SIG

#define EFI_AHCI_ATAPI_DEVICE_SIG 0xEB140000

Definition at line 55 of file AhciMode.h.

◆ EFI_AHCI_ATAPI_SIG_MASK

#define EFI_AHCI_ATAPI_SIG_MASK 0xFFFF0000

Definition at line 58 of file AhciMode.h.

◆ EFI_AHCI_BAR_INDEX

#define EFI_AHCI_BAR_INDEX 0x05

Definition at line 12 of file AhciMode.h.

◆ EFI_AHCI_BUS_PHY_DETECT_TIMEOUT

#define EFI_AHCI_BUS_PHY_DETECT_TIMEOUT 15

Definition at line 45 of file AhciMode.h.

◆ EFI_AHCI_BUS_RESET_TIMEOUT

#define EFI_AHCI_BUS_RESET_TIMEOUT EFI_TIMER_PERIOD_SECONDS(1)

Definition at line 53 of file AhciMode.h.

◆ EFI_AHCI_CAP_S64A

#define EFI_AHCI_CAP_S64A BIT31

Definition at line 17 of file AhciMode.h.

◆ EFI_AHCI_CAP_SAM

#define EFI_AHCI_CAP_SAM BIT18

Definition at line 15 of file AhciMode.h.

◆ EFI_AHCI_CAP_SSS

#define EFI_AHCI_CAP_SSS BIT27

Definition at line 16 of file AhciMode.h.

◆ EFI_AHCI_CAPABILITY_OFFSET

#define EFI_AHCI_CAPABILITY_OFFSET 0x0000

Definition at line 14 of file AhciMode.h.

◆ EFI_AHCI_D2H_FIS_OFFSET

#define EFI_AHCI_D2H_FIS_OFFSET 0x40

Definition at line 81 of file AhciMode.h.

◆ EFI_AHCI_DMA_FIS_OFFSET

#define EFI_AHCI_DMA_FIS_OFFSET 0x00

Definition at line 82 of file AhciMode.h.

◆ EFI_AHCI_FIS_BIST

#define EFI_AHCI_FIS_BIST 0x58

Definition at line 74 of file AhciMode.h.

◆ EFI_AHCI_FIS_BIST_LENGTH

#define EFI_AHCI_FIS_BIST_LENGTH 12

Definition at line 75 of file AhciMode.h.

◆ EFI_AHCI_FIS_DATA

#define EFI_AHCI_FIS_DATA 0x46

Definition at line 73 of file AhciMode.h.

◆ EFI_AHCI_FIS_DMA_ACTIVATE

#define EFI_AHCI_FIS_DMA_ACTIVATE 0x39

Definition at line 69 of file AhciMode.h.

◆ EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH

#define EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH 4

Definition at line 70 of file AhciMode.h.

◆ EFI_AHCI_FIS_DMA_SETUP

#define EFI_AHCI_FIS_DMA_SETUP 0x41

Definition at line 71 of file AhciMode.h.

◆ EFI_AHCI_FIS_DMA_SETUP_LENGTH

#define EFI_AHCI_FIS_DMA_SETUP_LENGTH 28

Definition at line 72 of file AhciMode.h.

◆ EFI_AHCI_FIS_PIO_SETUP

#define EFI_AHCI_FIS_PIO_SETUP 0x5F

Definition at line 76 of file AhciMode.h.

◆ EFI_AHCI_FIS_PIO_SETUP_LENGTH

#define EFI_AHCI_FIS_PIO_SETUP_LENGTH 20

Definition at line 77 of file AhciMode.h.

◆ EFI_AHCI_FIS_REGISTER_D2H

#define EFI_AHCI_FIS_REGISTER_D2H 0x34

Definition at line 67 of file AhciMode.h.

◆ EFI_AHCI_FIS_REGISTER_D2H_LENGTH

#define EFI_AHCI_FIS_REGISTER_D2H_LENGTH 20

Definition at line 68 of file AhciMode.h.

◆ EFI_AHCI_FIS_REGISTER_H2D

#define EFI_AHCI_FIS_REGISTER_H2D 0x27

Definition at line 65 of file AhciMode.h.

◆ EFI_AHCI_FIS_REGISTER_H2D_LENGTH

#define EFI_AHCI_FIS_REGISTER_H2D_LENGTH 20

Definition at line 66 of file AhciMode.h.

◆ EFI_AHCI_FIS_SET_DEVICE

#define EFI_AHCI_FIS_SET_DEVICE 0xA1

Definition at line 78 of file AhciMode.h.

◆ EFI_AHCI_FIS_SET_DEVICE_LENGTH

#define EFI_AHCI_FIS_SET_DEVICE_LENGTH 8

Definition at line 79 of file AhciMode.h.

◆ EFI_AHCI_FIS_TYPE_MASK

#define EFI_AHCI_FIS_TYPE_MASK 0xFF

Definition at line 85 of file AhciMode.h.

◆ EFI_AHCI_GHC_ENABLE

#define EFI_AHCI_GHC_ENABLE BIT31

Definition at line 21 of file AhciMode.h.

◆ EFI_AHCI_GHC_IE

#define EFI_AHCI_GHC_IE BIT1

Definition at line 20 of file AhciMode.h.

◆ EFI_AHCI_GHC_OFFSET

#define EFI_AHCI_GHC_OFFSET 0x0004

Definition at line 18 of file AhciMode.h.

◆ EFI_AHCI_GHC_RESET

#define EFI_AHCI_GHC_RESET BIT0

Definition at line 19 of file AhciMode.h.

◆ EFI_AHCI_IS_OFFSET

#define EFI_AHCI_IS_OFFSET 0x0008

Definition at line 22 of file AhciMode.h.

◆ EFI_AHCI_MAX_DATA_PER_PRDT

#define EFI_AHCI_MAX_DATA_PER_PRDT 0x400000

Definition at line 63 of file AhciMode.h.

◆ EFI_AHCI_MAX_PORTS

#define EFI_AHCI_MAX_PORTS 32

Definition at line 25 of file AhciMode.h.

◆ EFI_AHCI_PI_OFFSET

#define EFI_AHCI_PI_OFFSET 0x000C

Definition at line 23 of file AhciMode.h.

◆ EFI_AHCI_PIO_FIS_OFFSET

#define EFI_AHCI_PIO_FIS_OFFSET 0x20

Definition at line 83 of file AhciMode.h.

◆ EFI_AHCI_PORT_CI

#define EFI_AHCI_PORT_CI 0x0038

Definition at line 187 of file AhciMode.h.

◆ EFI_AHCI_PORT_CLB

#define EFI_AHCI_PORT_CLB 0x0000

Definition at line 93 of file AhciMode.h.

◆ EFI_AHCI_PORT_CLBU

#define EFI_AHCI_PORT_CLBU 0x0004

Definition at line 94 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD

#define EFI_AHCI_PORT_CMD 0x0018

Definition at line 121 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_ACTIVE

#define EFI_AHCI_PORT_CMD_ACTIVE (1 << 28 )

Definition at line 143 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_ALPE

#define EFI_AHCI_PORT_CMD_ALPE BIT26

Definition at line 140 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_ASP

#define EFI_AHCI_PORT_CMD_ASP BIT27

Definition at line 141 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_ATAPI

#define EFI_AHCI_PORT_CMD_ATAPI BIT24

Definition at line 138 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_CCS_MASK

#define EFI_AHCI_PORT_CMD_CCS_MASK (BIT8 | BIT9 | BIT10 | BIT11 | BIT12)

Definition at line 128 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_CCS_SHIFT

#define EFI_AHCI_PORT_CMD_CCS_SHIFT 8

Definition at line 129 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_CLO

#define EFI_AHCI_PORT_CMD_CLO BIT3

Definition at line 126 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_CPD

#define EFI_AHCI_PORT_CMD_CPD BIT20

Definition at line 136 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_CR

#define EFI_AHCI_PORT_CMD_CR BIT15

Definition at line 131 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_DLAE

#define EFI_AHCI_PORT_CMD_DLAE BIT25

Definition at line 139 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_ESP

#define EFI_AHCI_PORT_CMD_ESP BIT21

Definition at line 137 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_FR

#define EFI_AHCI_PORT_CMD_FR BIT14

Definition at line 130 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT

#define EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT EFI_TIMER_PERIOD_MILLISECONDS(500)

Definition at line 49 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_FRE

#define EFI_AHCI_PORT_CMD_FRE BIT4

Definition at line 127 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_HPCP

#define EFI_AHCI_PORT_CMD_HPCP BIT18

Definition at line 134 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_ICC_MASK

#define EFI_AHCI_PORT_CMD_ICC_MASK (BIT28 | BIT29 | BIT30 | BIT31)

Definition at line 142 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_MASK

#define EFI_AHCI_PORT_CMD_MASK ~(EFI_AHCI_PORT_CMD_ST | EFI_AHCI_PORT_CMD_FRE | EFI_AHCI_PORT_CMD_COL)

Definition at line 132 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_MPSP

#define EFI_AHCI_PORT_CMD_MPSP BIT19

Definition at line 135 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_PMA

#define EFI_AHCI_PORT_CMD_PMA BIT17

Definition at line 133 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_POD

#define EFI_AHCI_PORT_CMD_POD BIT2

Definition at line 125 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_ST

#define EFI_AHCI_PORT_CMD_ST BIT0

Definition at line 123 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_ST_MASK

#define EFI_AHCI_PORT_CMD_ST_MASK 0xFFFFFFFE

Definition at line 122 of file AhciMode.h.

◆ EFI_AHCI_PORT_CMD_SUD

#define EFI_AHCI_PORT_CMD_SUD BIT1

Definition at line 124 of file AhciMode.h.

◆ EFI_AHCI_PORT_ERR_CLEAR

#define EFI_AHCI_PORT_ERR_CLEAR 0xFFFFFFFF

Definition at line 185 of file AhciMode.h.

◆ EFI_AHCI_PORT_FB

#define EFI_AHCI_PORT_FB 0x0008

Definition at line 95 of file AhciMode.h.

◆ EFI_AHCI_PORT_FBU

#define EFI_AHCI_PORT_FBU 0x000C

Definition at line 96 of file AhciMode.h.

◆ EFI_AHCI_PORT_IE

#define EFI_AHCI_PORT_IE 0x0014

Definition at line 120 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS

#define EFI_AHCI_PORT_IS 0x0010

Definition at line 97 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_CLEAR

#define EFI_AHCI_PORT_IS_CLEAR 0xFFFFFFFF

Definition at line 115 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_CPDS

#define EFI_AHCI_PORT_IS_CPDS BIT31

Definition at line 114 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_DHRS

#define EFI_AHCI_PORT_IS_DHRS BIT0

Definition at line 98 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_DIS

#define EFI_AHCI_PORT_IS_DIS BIT7

Definition at line 105 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_DPS

#define EFI_AHCI_PORT_IS_DPS BIT5

Definition at line 103 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_DSS

#define EFI_AHCI_PORT_IS_DSS BIT2

Definition at line 100 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_ERROR_MASK

#define EFI_AHCI_PORT_IS_ERROR_MASK (EFI_AHCI_PORT_IS_INFS | EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)

Definition at line 117 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_FATAL_ERROR_MASK

#define EFI_AHCI_PORT_IS_FATAL_ERROR_MASK (EFI_AHCI_PORT_IS_IFS | EFI_AHCI_PORT_IS_HBDS | EFI_AHCI_PORT_IS_HBFS | EFI_AHCI_PORT_IS_TFES)

Definition at line 118 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_FIS_CLEAR

#define EFI_AHCI_PORT_IS_FIS_CLEAR 0x0000000F

Definition at line 116 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_HBDS

#define EFI_AHCI_PORT_IS_HBDS BIT28

Definition at line 111 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_HBFS

#define EFI_AHCI_PORT_IS_HBFS BIT29

Definition at line 112 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_IFS

#define EFI_AHCI_PORT_IS_IFS BIT27

Definition at line 110 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_INFS

#define EFI_AHCI_PORT_IS_INFS BIT26

Definition at line 109 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_IPMS

#define EFI_AHCI_PORT_IS_IPMS BIT23

Definition at line 107 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_OFS

#define EFI_AHCI_PORT_IS_OFS BIT24

Definition at line 108 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_PCS

#define EFI_AHCI_PORT_IS_PCS BIT6

Definition at line 104 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_PRCS

#define EFI_AHCI_PORT_IS_PRCS BIT22

Definition at line 106 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_PSS

#define EFI_AHCI_PORT_IS_PSS BIT1

Definition at line 99 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_SDBS

#define EFI_AHCI_PORT_IS_SDBS BIT3

Definition at line 101 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_TFES

#define EFI_AHCI_PORT_IS_TFES BIT30

Definition at line 113 of file AhciMode.h.

◆ EFI_AHCI_PORT_IS_UFS

#define EFI_AHCI_PORT_IS_UFS BIT4

Definition at line 102 of file AhciMode.h.

◆ EFI_AHCI_PORT_MULTIPLIER_SIG

#define EFI_AHCI_PORT_MULTIPLIER_SIG 0x96690000

Definition at line 57 of file AhciMode.h.

◆ EFI_AHCI_PORT_REG_WIDTH

#define EFI_AHCI_PORT_REG_WIDTH 0x0080

Definition at line 92 of file AhciMode.h.

◆ EFI_AHCI_PORT_SACT

#define EFI_AHCI_PORT_SACT 0x0034

Definition at line 186 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL

#define EFI_AHCI_PORT_SCTL 0x002C

Definition at line 157 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_DET_INIT

#define EFI_AHCI_PORT_SCTL_DET_INIT 0x0001

Definition at line 160 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_DET_MASK

#define EFI_AHCI_PORT_SCTL_DET_MASK 0x000F

Definition at line 158 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_DET_PHYCOMM

#define EFI_AHCI_PORT_SCTL_DET_PHYCOMM 0x0003

Definition at line 161 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_IPM_INIT

#define EFI_AHCI_PORT_SCTL_IPM_INIT 0x0300

Definition at line 164 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_IPM_MASK

#define EFI_AHCI_PORT_SCTL_IPM_MASK 0x0F00

Definition at line 163 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_IPM_PSD

#define EFI_AHCI_PORT_SCTL_IPM_PSD 0x0100

Definition at line 165 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_IPM_SSD

#define EFI_AHCI_PORT_SCTL_IPM_SSD 0x0200

Definition at line 166 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_MASK

#define EFI_AHCI_PORT_SCTL_MASK (~EFI_AHCI_PORT_SCTL_DET_MASK)

Definition at line 159 of file AhciMode.h.

◆ EFI_AHCI_PORT_SCTL_SPD_MASK

#define EFI_AHCI_PORT_SCTL_SPD_MASK 0x00F0

Definition at line 162 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR

#define EFI_AHCI_PORT_SERR 0x0030

Definition at line 167 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_BDE

#define EFI_AHCI_PORT_SERR_BDE BIT19

Definition at line 177 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_CRCE

#define EFI_AHCI_PORT_SERR_CRCE BIT21

Definition at line 179 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_CW

#define EFI_AHCI_PORT_SERR_CW BIT18

Definition at line 176 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_DE

#define EFI_AHCI_PORT_SERR_DE BIT20

Definition at line 178 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_EX

#define EFI_AHCI_PORT_SERR_EX BIT26

Definition at line 184 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_HE

#define EFI_AHCI_PORT_SERR_HE BIT22

Definition at line 180 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_IE

#define EFI_AHCI_PORT_SERR_IE BIT11

Definition at line 173 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_LSE

#define EFI_AHCI_PORT_SERR_LSE BIT23

Definition at line 181 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_PCDIE

#define EFI_AHCI_PORT_SERR_PCDIE BIT9

Definition at line 171 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_PE

#define EFI_AHCI_PORT_SERR_PE BIT10

Definition at line 172 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_PIE

#define EFI_AHCI_PORT_SERR_PIE BIT17

Definition at line 175 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_PRC

#define EFI_AHCI_PORT_SERR_PRC BIT16

Definition at line 174 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_RCE

#define EFI_AHCI_PORT_SERR_RCE BIT1

Definition at line 169 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_RDIE

#define EFI_AHCI_PORT_SERR_RDIE BIT0

Definition at line 168 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_TDIE

#define EFI_AHCI_PORT_SERR_TDIE BIT8

Definition at line 170 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_TSTE

#define EFI_AHCI_PORT_SERR_TSTE BIT24

Definition at line 182 of file AhciMode.h.

◆ EFI_AHCI_PORT_SERR_UFT

#define EFI_AHCI_PORT_SERR_UFT BIT25

Definition at line 183 of file AhciMode.h.

◆ EFI_AHCI_PORT_SIG

#define EFI_AHCI_PORT_SIG 0x0024

Definition at line 151 of file AhciMode.h.

◆ EFI_AHCI_PORT_SNTF

#define EFI_AHCI_PORT_SNTF 0x003C

Definition at line 188 of file AhciMode.h.

◆ EFI_AHCI_PORT_SSTS

#define EFI_AHCI_PORT_SSTS 0x0028

Definition at line 152 of file AhciMode.h.

◆ EFI_AHCI_PORT_SSTS_DET

#define EFI_AHCI_PORT_SSTS_DET 0x0001

Definition at line 154 of file AhciMode.h.

◆ EFI_AHCI_PORT_SSTS_DET_MASK

#define EFI_AHCI_PORT_SSTS_DET_MASK 0x000F

Definition at line 153 of file AhciMode.h.

◆ EFI_AHCI_PORT_SSTS_DET_PCE

#define EFI_AHCI_PORT_SSTS_DET_PCE 0x0003

Definition at line 155 of file AhciMode.h.

◆ EFI_AHCI_PORT_SSTS_SPD_MASK

#define EFI_AHCI_PORT_SSTS_SPD_MASK 0x00F0

Definition at line 156 of file AhciMode.h.

◆ EFI_AHCI_PORT_START

#define EFI_AHCI_PORT_START 0x0100

Definition at line 91 of file AhciMode.h.

◆ EFI_AHCI_PORT_TFD

#define EFI_AHCI_PORT_TFD 0x0020

Definition at line 144 of file AhciMode.h.

◆ EFI_AHCI_PORT_TFD_BSY

#define EFI_AHCI_PORT_TFD_BSY BIT7

Definition at line 146 of file AhciMode.h.

◆ EFI_AHCI_PORT_TFD_DRQ

#define EFI_AHCI_PORT_TFD_DRQ BIT3

Definition at line 147 of file AhciMode.h.

◆ EFI_AHCI_PORT_TFD_ERR

#define EFI_AHCI_PORT_TFD_ERR BIT0

Definition at line 148 of file AhciMode.h.

◆ EFI_AHCI_PORT_TFD_ERR_INT_CRC

#define EFI_AHCI_PORT_TFD_ERR_INT_CRC BIT15

Definition at line 150 of file AhciMode.h.

◆ EFI_AHCI_PORT_TFD_ERR_MASK

#define EFI_AHCI_PORT_TFD_ERR_MASK 0x00FF00

Definition at line 149 of file AhciMode.h.

◆ EFI_AHCI_PORT_TFD_MASK

#define EFI_AHCI_PORT_TFD_MASK (BIT7 | BIT3 | BIT0)

Definition at line 145 of file AhciMode.h.

◆ EFI_AHCI_SDB_FIS_OFFSET

#define EFI_AHCI_SDB_FIS_OFFSET 0x58

Definition at line 84 of file AhciMode.h.

◆ EFI_AHCI_U_FIS_OFFSET

#define EFI_AHCI_U_FIS_OFFSET 0x60

Definition at line 86 of file AhciMode.h.

Enumeration Type Documentation

◆ SATA_FIS_TYPE

enum SATA_FIS_TYPE

Definition at line 251 of file AhciMode.h.

Function Documentation

◆ AhciPacketCommandExecute()

EFI_STATUS EFIAPI AhciPacketCommandExecute	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN EFI_AHCI_REGISTERS *	AhciRegisters,
		IN UINT8	Port,
		IN UINT8	PortMultiplier,
		IN EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *	Packet
	)

This function is used to send out ATAPI commands conforms to the Packet Command with PIO Protocol.

Parameters

PciIo	The PCI IO protocol instance.
AhciRegisters	The pointer to the EFI_AHCI_REGISTERS.
Port	The number of port.
PortMultiplier	The number of port multiplier.
Packet	A pointer to EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET structure.

Return values

EFI_SUCCESS	send out the ATAPI packet command successfully and device sends data successfully.
EFI_DEVICE_ERROR	the device failed to send data.

Definition at line 2126 of file AhciMode.c.

◆ AhciStartCommand()

EFI_STATUS EFIAPI AhciStartCommand	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Port,
		IN UINT8	CommandSlot,
		IN UINT64	Timeout
	)

Start command for give slot on specific port.

Parameters

PciIo	The PCI IO protocol instance.
Port	The number of port.
CommandSlot	The number of CommandSlot.
Timeout	The timeout value of start, uses 100ns as a unit.

Return values

EFI_DEVICE_ERROR	The command start unsuccessfully.
EFI_TIMEOUT	The operation is time out.
EFI_SUCCESS	The command start successfully.

Start command for give slot on specific port.

Parameters

PciIo	The PCI IO protocol instance.
Port	The number of port.
CommandSlot	The number of Command Slot.
Timeout	The timeout value of start, uses 100ns as a unit.

Return values

EFI_DEVICE_ERROR	The command start unsuccessfully.
EFI_TIMEOUT	The operation is time out.
EFI_SUCCESS	The command start successfully.

Definition at line 1580 of file AhciMode.c.

◆ AhciStopCommand()

EFI_STATUS EFIAPI AhciStopCommand	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Port,
		IN UINT64	Timeout
	)

Stop command running for giving port

Parameters

PciIo	The PCI IO protocol instance.
Port	The number of port.
Timeout	The timeout value of stop, uses 100ns as a unit.

Return values

EFI_DEVICE_ERROR	The command stop unsuccessfully.
EFI_TIMEOUT	The operation is time out.
EFI_SUCCESS	The command stop successfully.

Definition at line 1536 of file AhciMode.c.

Data Structures

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ AHCI_CAP2_SADM

◆ AHCI_CAP2_SDS

◆ AHCI_CAPABILITY2_OFFSET

◆ AHCI_COMMAND_RETRIES

◆ AHCI_PORT_DEVSLP

◆ AHCI_PORT_DEVSLP_ADSE

◆ AHCI_PORT_DEVSLP_DETO_MASK

◆ AHCI_PORT_DEVSLP_DITO_MASK

◆ AHCI_PORT_DEVSLP_DM_MASK

◆ AHCI_PORT_DEVSLP_DSP

◆ AHCI_PORT_DEVSLP_MDAT_MASK

◆ EFI_AHCI_ATA_DEVICE_SIG

◆ EFI_AHCI_ATAPI_DEVICE_SIG

◆ EFI_AHCI_ATAPI_SIG_MASK

◆ EFI_AHCI_BAR_INDEX

◆ EFI_AHCI_BUS_PHY_DETECT_TIMEOUT

◆ EFI_AHCI_BUS_RESET_TIMEOUT

◆ EFI_AHCI_CAP_S64A

◆ EFI_AHCI_CAP_SAM

◆ EFI_AHCI_CAP_SSS

◆ EFI_AHCI_CAPABILITY_OFFSET

◆ EFI_AHCI_D2H_FIS_OFFSET

◆ EFI_AHCI_DMA_FIS_OFFSET

◆ EFI_AHCI_FIS_BIST

◆ EFI_AHCI_FIS_BIST_LENGTH

◆ EFI_AHCI_FIS_DATA

◆ EFI_AHCI_FIS_DMA_ACTIVATE

◆ EFI_AHCI_FIS_DMA_ACTIVATE_LENGTH

◆ EFI_AHCI_FIS_DMA_SETUP

◆ EFI_AHCI_FIS_DMA_SETUP_LENGTH

◆ EFI_AHCI_FIS_PIO_SETUP

◆ EFI_AHCI_FIS_PIO_SETUP_LENGTH

◆ EFI_AHCI_FIS_REGISTER_D2H

◆ EFI_AHCI_FIS_REGISTER_D2H_LENGTH

◆ EFI_AHCI_FIS_REGISTER_H2D

◆ EFI_AHCI_FIS_REGISTER_H2D_LENGTH

◆ EFI_AHCI_FIS_SET_DEVICE

◆ EFI_AHCI_FIS_SET_DEVICE_LENGTH

◆ EFI_AHCI_FIS_TYPE_MASK

◆ EFI_AHCI_GHC_ENABLE

◆ EFI_AHCI_GHC_IE

◆ EFI_AHCI_GHC_OFFSET

◆ EFI_AHCI_GHC_RESET

◆ EFI_AHCI_IS_OFFSET

◆ EFI_AHCI_MAX_DATA_PER_PRDT

◆ EFI_AHCI_MAX_PORTS

◆ EFI_AHCI_PI_OFFSET

◆ EFI_AHCI_PIO_FIS_OFFSET

◆ EFI_AHCI_PORT_CI

◆ EFI_AHCI_PORT_CLB

◆ EFI_AHCI_PORT_CLBU

◆ EFI_AHCI_PORT_CMD

◆ EFI_AHCI_PORT_CMD_ACTIVE

◆ EFI_AHCI_PORT_CMD_ALPE

◆ EFI_AHCI_PORT_CMD_ASP

◆ EFI_AHCI_PORT_CMD_ATAPI

◆ EFI_AHCI_PORT_CMD_CCS_MASK

◆ EFI_AHCI_PORT_CMD_CCS_SHIFT

◆ EFI_AHCI_PORT_CMD_CLO

◆ EFI_AHCI_PORT_CMD_CPD

◆ EFI_AHCI_PORT_CMD_CR

◆ EFI_AHCI_PORT_CMD_DLAE

◆ EFI_AHCI_PORT_CMD_ESP

◆ EFI_AHCI_PORT_CMD_FR

◆ EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT

◆ EFI_AHCI_PORT_CMD_FRE

◆ EFI_AHCI_PORT_CMD_HPCP

◆ EFI_AHCI_PORT_CMD_ICC_MASK

◆ EFI_AHCI_PORT_CMD_MASK

◆ EFI_AHCI_PORT_CMD_MPSP

◆ EFI_AHCI_PORT_CMD_PMA

◆ EFI_AHCI_PORT_CMD_POD

◆ EFI_AHCI_PORT_CMD_ST

◆ EFI_AHCI_PORT_CMD_ST_MASK