18#ifndef ARM_ERROR_SOURCE_TABLE_H_
19#define ARM_ERROR_SOURCE_TABLE_H_
24#define EFI_ACPI_6_3_ARM_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('A', 'E', 'S', 'T')
26#define EFI_ACPI_ARM_ERROR_SOURCE_TABLE_REVISION 1
80#define EFI_ACPI_AEST_NODE_TYPE_PROCESSOR 0x0
81#define EFI_ACPI_AEST_NODE_TYPE_MEMORY 0x1
82#define EFI_ACPI_AEST_NODE_TYPE_SMMU 0x2
83#define EFI_ACPI_AEST_NODE_TYPE_VENDOR_DEFINED 0x3
84#define EFI_ACPI_AEST_NODE_TYPE_GIC 0x4
126#define EFI_ACPI_AEST_INTERFACE_TYPE_SR 0x0
127#define EFI_ACPI_AEST_INTERFACE_TYPE_MMIO 0x1
130#define EFI_ACPI_AEST_INTERFACE_FLAG_PRIVATE 0
131#define EFI_ACPI_AEST_INTERFACE_FLAG_SHARED BIT0
132#define EFI_ACPI_AEST_INTERFACE_FLAG_CLEAR_MISCX BIT1
165#define EFI_ACPI_AEST_INTERRUPT_TYPE_FAULT_HANDLING 0x0
166#define EFI_ACPI_AEST_INTERRUPT_TYPE_ERROR_RECOVERY 0x1
169#define EFI_ACPI_AEST_INTERRUPT_FLAG_TRIGGER_TYPE_EDGE 0
170#define EFI_ACPI_AEST_INTERRUPT_FLAG_TRIGGER_TYPE_LEVEL BIT0
256#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_CACHE 0x0
257#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_TLB 0x1
258#define EFI_ACPI_AEST_PROCESSOR_RESOURCE_TYPE_GENERIC 0x2
261#define EFI_ACPI_AEST_PROCESSOR_FLAG_GLOBAL BIT0
262#define EFI_ACPI_AEST_PROCESSOR_FLAG_SHARED BIT1
316 UINT8 VendorData[16];
350#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICC 0x0
351#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICD 0x1
352#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GICR 0x2
353#define EFI_ACPI_AEST_GIC_INTERFACE_TYPE_GITS 0x3
EFI_ACPI_AEST_NODE_STRUCT NodeHeader
AEST Node header.
UINT32 GicInterfaceRefId
Identifier for the interface instance.
UINT32 StartErrorRecordIndex
UINT64 ErrorRecordStatusReportingSupported
UINT64 ErrorRecordImplemented
UINT32 NumberErrorRecords
UINT64 BaseAddress
Base address of error group that contains the error node.
UINT32 Flags
AEST node interface flags.
UINT32 InterruptGsiv
GSIV of interrupt, if interrupt is an SPI or a PPI.
UINT32 ProximityDomain
SRAT proximity domain.
EFI_ACPI_AEST_NODE_STRUCT NodeHeader
AEST Node header.
UINT32 InterfaceOffset
Offset from the start of the node to the node interface structure.
UINT32 DataOffset
Offset from the start of the node to node-specific data.
UINT8 Reserved
Reserved - Must be zero.
UINT16 Length
Length of structure in bytes.
UINT64 ErrorInjectionCountdownRate
The rate in Hz at which the Error Generation Counter decrements.
UINT32 InterruptArrayOffset
Offset from the start of the node to node interrupt array.
UINT64 Reserved1
Reserved - Must be zero.
UINT64 TimestampRate
The timestamp frequency of the counter in Hz.
UINT32 InterruptArrayCount
Number of entries in the interrupt array.
UINT32 CacheRefId
Reference to the cache structure in the PPTT table.
UINT32 Data
Vendor-defined supplementary data.
UINT32 AcpiProcessorId
Processor ID of node.
UINT64 ProcessorAffinityLevelIndicator
UINT8 Flags
Processor structure flags.
UINT8 Revision
Processor structure revision.
UINT8 Reserved
Reserved - must be zero.
EFI_ACPI_AEST_PROCESSOR_RESOURCE Resource
Processor resource.
EFI_ACPI_AEST_NODE_STRUCT NodeHeader
AEST Node header.
UINT32 TlbRefId
TLB level from perspective of current processor.
UINT32 SmmuRefId
Reference to the IORT table node that describes this SMMU.
EFI_ACPI_AEST_NODE_STRUCT NodeHeader
AEST Node header.
UINT32 UniqueId
The ACPI Unique identifier of the component.
UINT32 HardwareId
ACPI HID of the component.
EFI_ACPI_AEST_NODE_STRUCT NodeHeader
AEST Node header.
EFI_ACPI_AEST_PROCESSOR_CACHE_RESOURCE_STRUCT Cache
Processor Cache resource.
EFI_ACPI_AEST_PROCESSOR_GENERIC_RESOURCE_STRUCT Generic
Processor Generic resource.
EFI_ACPI_AEST_PROCESSOR_TLB_RESOURCE_STRUCT Tlb
Processor TLB resource.