Macros
#define	ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00

#define	ARM_SMC_ID_STD_UID 0x8400ff01

#define	ARM_SMC_ID_STD_REVISION 0x8400ff03

#define	ARM_SMC_STD_UUID0 0x108d905b

#define	ARM_SMC_STD_UUID1 0x47e8f863

#define	ARM_SMC_STD_UUID2 0xfbc02dae

#define	ARM_SMC_STD_UUID3 0xe2f64156

#define	ARM_SMC_STD_REVISION_MAJOR 0x0

#define	ARM_SMC_STD_REVISION_MINOR 0x1

#define	ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040

#define	ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040

#define	ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041

#define	ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041

#define	ARM_SMC_MM_RET_SUCCESS 0

#define	ARM_SMC_MM_RET_NOT_SUPPORTED -1

#define	ARM_SMC_MM_RET_INVALID_PARAMS -2

#define	ARM_SMC_MM_RET_DENIED -3

#define	ARM_SMC_MM_RET_NO_MEMORY -4

#define	SMCCC_VERSION 0x80000000

#define	SMCCC_ARCH_FEATURES 0x80000001

#define	SMCCC_ARCH_SOC_ID 0x80000002

#define	SMCCC_ARCH_WORKAROUND_1 0x80008000

#define	SMCCC_ARCH_WORKAROUND_2 0x80007FFF

#define	SMC_ARCH_CALL_SUCCESS 0

#define	SMC_ARCH_CALL_NOT_SUPPORTED -1

#define	SMC_ARCH_CALL_NOT_REQUIRED -2

#define	SMC_ARCH_CALL_INVALID_PARAMETER -3

#define	ARM_SMC_ID_PSCI_VERSION 0x84000000

#define	ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64 0xc4000001

#define	ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32 0x84000001

#define	ARM_SMC_ID_PSCI_CPU_OFF 0x84000002

#define	ARM_SMC_ID_PSCI_CPU_ON_AARCH64 0xc4000003

#define	ARM_SMC_ID_PSCI_CPU_ON_AARCH32 0x84000003

#define	ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64 0xc4000004

#define	ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32 0x84000004

#define	ARM_SMC_ID_PSCI_MIGRATE_AARCH64 0xc4000005

#define	ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005

#define	ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008

#define	ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009

#define	ARM_SMC_ID_PSCI_FEATURES 0x8400000A

#define	ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64 0xC4000012

#define	ARM_SMC_PSCI_VERSION_MAJOR 0

#define	ARM_SMC_PSCI_VERSION_MINOR 2

#define	ARM_SMC_PSCI_VERSION ((ARM_SMC_PSCI_VERSION_MAJOR << 16) \| ARM_SMC_PSCI_VERSION_MINOR)

#define	ARM_SMC_PSCI_RET_SUCCESS 0

#define	ARM_SMC_PSCI_RET_NOT_SUPPORTED -1

#define	ARM_SMC_PSCI_RET_INVALID_PARAMS -2

#define	ARM_SMC_PSCI_RET_DENIED -3

#define	ARM_SMC_PSCI_RET_ALREADY_ON -4

#define	ARM_SMC_PSCI_RET_ON_PENDING -5

#define	ARM_SMC_PSCI_RET_INTERN_FAIL -6

#define	ARM_SMC_PSCI_RET_NOT_PRESENT -7

#define	ARM_SMC_PSCI_RET_DISABLED -8

#define	ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) ((((Aff2) & 0xFF) << 16) \| (((Aff1) & 0xFF) << 8) \| ((Aff0) & 0xFF))

#define	ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) ((((Aff3) & 0xFFULL) << 32) \| (((Aff2) & 0xFF) << 16) \| (((Aff1) & 0xFF) << 8) \| ((Aff0) & 0xFF))

#define	ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF)

#define	ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF)

#define	ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0

#define	ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1

#define	ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2

#define	ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3

#define	ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0

#define	ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1

#define	ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2

#define	ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00

#define	ARM_SMC_ID_TOS_UID 0xbf00ff01

#define	ARM_SMC_ID_TOS_REVISION 0xbf00ff03

#define	ARM_SMC_ID_TRNG_VERSION 0x84000050

#define	ARM_SMC_ID_TRNG_FEATURES 0x84000051

#define	ARM_SMC_ID_TRNG_GET_UUID 0x84000052

#define	ARM_SMC_ID_TRNG_RND_AARCH32 0x84000053

#define	ARM_SMC_ID_TRNG_RND_AARCH64 0xC4000053

#define	TRNG_STATUS_SUCCESS (INT32)(0)

#define	TRNG_STATUS_NOT_SUPPORTED (INT32)(-1)

#define	TRNG_STATUS_INVALID_PARAMETER (INT32)(-2)

#define	TRNG_STATUS_NO_ENTROPY (INT32)(-3)

#define	SMC_FASTCALL 0x80000000

#define	SMC64_FUNCTION (SMC_FASTCALL \| 0x40000000)

#define	SMC_SIP_FUNCTION (SMC64_FUNCTION \| 0x02000000)

#define	SMC_SIP_FUNCTION_ID(n) (SMC_SIP_FUNCTION \| (n))

Detailed Description

SPDX-License-Identifier: BSD-2-Clause-Patent

Revision Reference:

[1] SMC Calling Convention version 1.2 (https://developer.arm.com/documentation/den0028/c/?lang=en)
[2] Arm True Random Number Generator Firmware, Interface 1.0, Platform Design Document. (https://developer.arm.com/documentation/den0098/latest/)

Glossary:

TRNG - True Random Number Generator

Definition in file ArmStdSmc.h.

Macro Definition Documentation

◆ ARM_SMC_ID_MM_COMMUNICATE_AARCH32

#define ARM_SMC_ID_MM_COMMUNICATE_AARCH32 0x84000041

Definition at line 56 of file ArmStdSmc.h.

◆ ARM_SMC_ID_MM_COMMUNICATE_AARCH64

#define ARM_SMC_ID_MM_COMMUNICATE_AARCH64 0xC4000041

Definition at line 57 of file ArmStdSmc.h.

◆ ARM_SMC_ID_MM_VERSION_AARCH32

#define ARM_SMC_ID_MM_VERSION_AARCH32 0x84000040

Definition at line 52 of file ArmStdSmc.h.

◆ ARM_SMC_ID_MM_VERSION_AARCH64

#define ARM_SMC_ID_MM_VERSION_AARCH64 0xC4000040

Definition at line 53 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32

#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32 0x84000004

Definition at line 98 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64

#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64 0xc4000004

Definition at line 97 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF

#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1

Definition at line 138 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_INFO_ON

#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0

Definition at line 137 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING

#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2

Definition at line 139 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0

#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0

Definition at line 132 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1

#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1

Definition at line 133 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2

#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2

Definition at line 134 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3

#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3

Definition at line 135 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_CPU_OFF

#define ARM_SMC_ID_PSCI_CPU_OFF 0x84000002

Definition at line 94 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_CPU_ON_AARCH32

#define ARM_SMC_ID_PSCI_CPU_ON_AARCH32 0x84000003

Definition at line 96 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_CPU_ON_AARCH64

#define ARM_SMC_ID_PSCI_CPU_ON_AARCH64 0xc4000003

Definition at line 95 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32

#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32 0x84000001

Definition at line 93 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64

#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64 0xc4000001

Definition at line 92 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_FEATURES

#define ARM_SMC_ID_PSCI_FEATURES 0x8400000A

Definition at line 103 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_MIGRATE_AARCH32

#define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005

Definition at line 100 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_MIGRATE_AARCH64

#define ARM_SMC_ID_PSCI_MIGRATE_AARCH64 0xc4000005

Definition at line 99 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_SYSTEM_OFF

#define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008

Definition at line 101 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_SYSTEM_RESET

#define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009

Definition at line 102 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64

#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64 0xC4000012

Definition at line 104 of file ArmStdSmc.h.

◆ ARM_SMC_ID_PSCI_VERSION

#define ARM_SMC_ID_PSCI_VERSION 0x84000000

Definition at line 91 of file ArmStdSmc.h.

◆ ARM_SMC_ID_STD_CALL_COUNT

#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00

Definition at line 27 of file ArmStdSmc.h.

◆ ARM_SMC_ID_STD_REVISION

#define ARM_SMC_ID_STD_REVISION 0x8400ff03

Definition at line 30 of file ArmStdSmc.h.

◆ ARM_SMC_ID_STD_UID

#define ARM_SMC_ID_STD_UID 0x8400ff01

Definition at line 28 of file ArmStdSmc.h.

◆ ARM_SMC_ID_TOS_CALL_COUNT

#define ARM_SMC_ID_TOS_CALL_COUNT 0xbf00ff00

Definition at line 144 of file ArmStdSmc.h.

◆ ARM_SMC_ID_TOS_REVISION

#define ARM_SMC_ID_TOS_REVISION 0xbf00ff03

Definition at line 147 of file ArmStdSmc.h.

◆ ARM_SMC_ID_TOS_UID

#define ARM_SMC_ID_TOS_UID 0xbf00ff01

Definition at line 145 of file ArmStdSmc.h.

◆ ARM_SMC_ID_TRNG_FEATURES

#define ARM_SMC_ID_TRNG_FEATURES 0x84000051

Definition at line 184 of file ArmStdSmc.h.

◆ ARM_SMC_ID_TRNG_GET_UUID

#define ARM_SMC_ID_TRNG_GET_UUID 0x84000052

Definition at line 201 of file ArmStdSmc.h.

◆ ARM_SMC_ID_TRNG_RND_AARCH32

#define ARM_SMC_ID_TRNG_RND_AARCH32 0x84000053

Definition at line 220 of file ArmStdSmc.h.

◆ ARM_SMC_ID_TRNG_RND_AARCH64

#define ARM_SMC_ID_TRNG_RND_AARCH64 0xC4000053

Definition at line 239 of file ArmStdSmc.h.

◆ ARM_SMC_ID_TRNG_VERSION

#define ARM_SMC_ID_TRNG_VERSION 0x84000050

Definition at line 165 of file ArmStdSmc.h.

◆ ARM_SMC_MM_RET_DENIED

#define ARM_SMC_MM_RET_DENIED -3

Definition at line 71 of file ArmStdSmc.h.

◆ ARM_SMC_MM_RET_INVALID_PARAMS

#define ARM_SMC_MM_RET_INVALID_PARAMS -2

Definition at line 70 of file ArmStdSmc.h.

◆ ARM_SMC_MM_RET_NO_MEMORY

#define ARM_SMC_MM_RET_NO_MEMORY -4

Definition at line 72 of file ArmStdSmc.h.

◆ ARM_SMC_MM_RET_NOT_SUPPORTED

#define ARM_SMC_MM_RET_NOT_SUPPORTED -1

Definition at line 69 of file ArmStdSmc.h.

◆ ARM_SMC_MM_RET_SUCCESS

#define ARM_SMC_MM_RET_SUCCESS 0

Definition at line 68 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_ALREADY_ON

#define ARM_SMC_PSCI_RET_ALREADY_ON -4

Definition at line 117 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_DENIED

#define ARM_SMC_PSCI_RET_DENIED -3

Definition at line 116 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_DISABLED

#define ARM_SMC_PSCI_RET_DISABLED -8

Definition at line 121 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_INTERN_FAIL

#define ARM_SMC_PSCI_RET_INTERN_FAIL -6

Definition at line 119 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_INVALID_PARAMS

#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2

Definition at line 115 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_NOT_PRESENT

#define ARM_SMC_PSCI_RET_NOT_PRESENT -7

Definition at line 120 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_NOT_SUPPORTED

#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1

Definition at line 114 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_ON_PENDING

#define ARM_SMC_PSCI_RET_ON_PENDING -5

Definition at line 118 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_RET_SUCCESS

#define ARM_SMC_PSCI_RET_SUCCESS 0

Definition at line 113 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_TARGET_CPU32

#define ARM_SMC_PSCI_TARGET_CPU32	(	Aff2,
		Aff1,
		Aff0
	)	((((Aff2) & 0xFF) << 16) \| (((Aff1) & 0xFF) << 8) \| ((Aff0) & 0xFF))

Definition at line 123 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_TARGET_CPU64

#define ARM_SMC_PSCI_TARGET_CPU64	(	Aff3,
		Aff2,
		Aff1,
		Aff0
	)	((((Aff3) & 0xFFULL) << 32) \| (((Aff2) & 0xFF) << 16) \| (((Aff1) & 0xFF) << 8) \| ((Aff0) & 0xFF))

Definition at line 126 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_TARGET_GET_AFF0

#define ARM_SMC_PSCI_TARGET_GET_AFF0 ( TargetId ) ((TargetId) & 0xFF)

Definition at line 129 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_TARGET_GET_AFF1

#define ARM_SMC_PSCI_TARGET_GET_AFF1 ( TargetId ) (((TargetId) >> 8) & 0xFF)

Definition at line 130 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_VERSION

#define ARM_SMC_PSCI_VERSION ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)

Definition at line 109 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_VERSION_MAJOR

#define ARM_SMC_PSCI_VERSION_MAJOR 0

Definition at line 107 of file ArmStdSmc.h.

◆ ARM_SMC_PSCI_VERSION_MINOR

#define ARM_SMC_PSCI_VERSION_MINOR 2

Definition at line 108 of file ArmStdSmc.h.

◆ ARM_SMC_STD_REVISION_MAJOR

#define ARM_SMC_STD_REVISION_MAJOR 0x0

Definition at line 45 of file ArmStdSmc.h.

◆ ARM_SMC_STD_REVISION_MINOR

#define ARM_SMC_STD_REVISION_MINOR 0x1

Definition at line 46 of file ArmStdSmc.h.

◆ ARM_SMC_STD_UUID0

#define ARM_SMC_STD_UUID0 0x108d905b

Definition at line 36 of file ArmStdSmc.h.

◆ ARM_SMC_STD_UUID1

#define ARM_SMC_STD_UUID1 0x47e8f863

Definition at line 37 of file ArmStdSmc.h.

◆ ARM_SMC_STD_UUID2

#define ARM_SMC_STD_UUID2 0xfbc02dae

Definition at line 38 of file ArmStdSmc.h.

◆ ARM_SMC_STD_UUID3

#define ARM_SMC_STD_UUID3 0xe2f64156

Definition at line 39 of file ArmStdSmc.h.

◆ SMC64_FUNCTION

#define SMC64_FUNCTION (SMC_FASTCALL | 0x40000000)

Definition at line 252 of file ArmStdSmc.h.

◆ SMC_ARCH_CALL_INVALID_PARAMETER

#define SMC_ARCH_CALL_INVALID_PARAMETER -3

Definition at line 84 of file ArmStdSmc.h.

◆ SMC_ARCH_CALL_NOT_REQUIRED

#define SMC_ARCH_CALL_NOT_REQUIRED -2

Definition at line 83 of file ArmStdSmc.h.

◆ SMC_ARCH_CALL_NOT_SUPPORTED

#define SMC_ARCH_CALL_NOT_SUPPORTED -1

Definition at line 82 of file ArmStdSmc.h.

◆ SMC_ARCH_CALL_SUCCESS

#define SMC_ARCH_CALL_SUCCESS 0

Definition at line 81 of file ArmStdSmc.h.

◆ SMC_FASTCALL

#define SMC_FASTCALL 0x80000000

Definition at line 251 of file ArmStdSmc.h.

◆ SMC_SIP_FUNCTION

#define SMC_SIP_FUNCTION (SMC64_FUNCTION | 0x02000000)

Definition at line 253 of file ArmStdSmc.h.

◆ SMC_SIP_FUNCTION_ID

#define SMC_SIP_FUNCTION_ID ( n ) (SMC_SIP_FUNCTION | (n))

Definition at line 254 of file ArmStdSmc.h.

◆ SMCCC_ARCH_FEATURES

#define SMCCC_ARCH_FEATURES 0x80000001

Definition at line 76 of file ArmStdSmc.h.

◆ SMCCC_ARCH_SOC_ID

#define SMCCC_ARCH_SOC_ID 0x80000002

Definition at line 77 of file ArmStdSmc.h.

◆ SMCCC_ARCH_WORKAROUND_1

#define SMCCC_ARCH_WORKAROUND_1 0x80008000

Definition at line 78 of file ArmStdSmc.h.

◆ SMCCC_ARCH_WORKAROUND_2

#define SMCCC_ARCH_WORKAROUND_2 0x80007FFF

Definition at line 79 of file ArmStdSmc.h.

◆ SMCCC_VERSION

#define SMCCC_VERSION 0x80000000

Definition at line 75 of file ArmStdSmc.h.

◆ TRNG_STATUS_INVALID_PARAMETER

#define TRNG_STATUS_INVALID_PARAMETER (INT32)(-2)

Definition at line 244 of file ArmStdSmc.h.

◆ TRNG_STATUS_NO_ENTROPY

#define TRNG_STATUS_NO_ENTROPY (INT32)(-3)

Definition at line 245 of file ArmStdSmc.h.

◆ TRNG_STATUS_NOT_SUPPORTED

#define TRNG_STATUS_NOT_SUPPORTED (INT32)(-1)

Definition at line 243 of file ArmStdSmc.h.

◆ TRNG_STATUS_SUCCESS

#define TRNG_STATUS_SUCCESS (INT32)(0)

Definition at line 242 of file ArmStdSmc.h.

Macros