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Copyright (c) 2014, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file CacheLibInternal.h.
#define B_EFI_MSR_CACHE_MEMORY_TYPE (BIT2 | BIT1 | BIT0) |
Definition at line 30 of file CacheLibInternal.h.
#define B_EFI_MSR_CACHE_MTRR_VALID BIT11 |
Definition at line 27 of file CacheLibInternal.h.
#define B_EFI_MSR_FIXED_MTRR_ENABLE BIT10 |
Definition at line 29 of file CacheLibInternal.h.
#define B_EFI_MSR_GLOBAL_MTRR_ENABLE BIT11 |
Definition at line 28 of file CacheLibInternal.h.
#define B_EFI_MSR_IA32_MTRR_CAP_EMRR_SUPPORT BIT12 |
Definition at line 43 of file CacheLibInternal.h.
#define B_EFI_MSR_IA32_MTRR_CAP_FIXED_SUPPORT BIT8 |
Definition at line 46 of file CacheLibInternal.h.
#define B_EFI_MSR_IA32_MTRR_CAP_SMRR_SUPPORT BIT11 |
Definition at line 44 of file CacheLibInternal.h.
#define B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0) |
Definition at line 47 of file CacheLibInternal.h.
#define B_EFI_MSR_IA32_MTRR_CAP_WC_SUPPORT BIT10 |
Definition at line 45 of file CacheLibInternal.h.
#define CPUID_EXTENDED_FUNCTION 0x80000000 |
Definition at line 50 of file CacheLibInternal.h.
#define CPUID_VIR_PHY_ADDRESS_SIZE 0x80000008 |
Definition at line 49 of file CacheLibInternal.h.
#define EFI_CACHE_LAST_VARIABLE_MTRR_FOR_BIOS |
Definition at line 39 of file CacheLibInternal.h.
#define EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS 1 |
Definition at line 38 of file CacheLibInternal.h.
#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000 |
Definition at line 33 of file CacheLibInternal.h.
#define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000 |
Definition at line 35 of file CacheLibInternal.h.
#define EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE 0x000002FF |
Definition at line 26 of file CacheLibInternal.h.
#define EFI_MSR_CACHE_VARIABLE_MTRR_BASE 0x00000200 |
Definition at line 11 of file CacheLibInternal.h.
#define EFI_MSR_CACHE_VARIABLE_MTRR_END 0x0000020F |
Definition at line 12 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_CAP 0x000000FE |
Definition at line 42 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX16K_80000 0x00000258 |
Definition at line 16 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX16K_A0000 0x00000259 |
Definition at line 17 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX4K_C0000 0x00000268 |
Definition at line 18 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX4K_C8000 0x00000269 |
Definition at line 19 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX4K_D0000 0x0000026A |
Definition at line 20 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX4K_D8000 0x0000026B |
Definition at line 21 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX4K_E0000 0x0000026C |
Definition at line 22 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX4K_E8000 0x0000026D |
Definition at line 23 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX4K_F0000 0x0000026E |
Definition at line 24 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX4K_F8000 0x0000026F |
Definition at line 25 of file CacheLibInternal.h.
#define EFI_MSR_IA32_MTRR_FIX64K_00000 0x00000250 |
Definition at line 15 of file CacheLibInternal.h.
#define EFI_MSR_VALID_MASK 0xFFFFFFFFF |
Definition at line 32 of file CacheLibInternal.h.
#define EFI_SMRR_CACHE_VALID_ADDRESS 0xFFFFF000 |
Definition at line 34 of file CacheLibInternal.h.
#define V_EFI_FIXED_MTRR_NUMBER 11 |
Definition at line 13 of file CacheLibInternal.h.