TianoCore EDK2 master
CpuIo2Dxe.c File Reference
#include "CpuIo2Dxe.h"

Go to the source code of this file.

Functions

EFI_STATUS CpuIoCheckParameter (IN BOOLEAN MmioOperation, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
 
EFI_STATUS EFIAPI CpuMemoryServiceRead (IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
 
EFI_STATUS EFIAPI CpuMemoryServiceWrite (IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
 
EFI_STATUS EFIAPI CpuIoServiceRead (IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
 
EFI_STATUS EFIAPI CpuIoServiceWrite (IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
 
EFI_STATUS EFIAPI CpuIo2Initialize (IN EFI_HANDLE ImageHandle, IN EFI_SYSTEM_TABLE *SystemTable)
 

Variables

EFI_HANDLE mHandle = NULL
 
EFI_CPU_IO2_PROTOCOL mCpuIo2
 
UINT8 mInStride []
 
UINT8 mOutStride []
 

Detailed Description

Produces the CPU I/O 2 Protocol.

Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
Copyright (c) 2017, AMD Incorporated. All rights reserved.

SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file CpuIo2Dxe.c.

Function Documentation

◆ CpuIo2Initialize()

EFI_STATUS EFIAPI CpuIo2Initialize ( IN EFI_HANDLE  ImageHandle,
IN EFI_SYSTEM_TABLE SystemTable 
)

The user Entry Point for module CpuIo2Dxe. The user code starts with this function.

Parameters
[in]ImageHandleThe firmware allocated handle for the EFI image.
[in]SystemTableA pointer to the EFI System Table.
Return values
EFI_SUCCESSThe entry point is executed successfully.
otherSome error occurs when executing this entry point.

Definition at line 569 of file CpuIo2Dxe.c.

◆ CpuIoCheckParameter()

EFI_STATUS CpuIoCheckParameter ( IN BOOLEAN  MmioOperation,
IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
IN UINT64  Address,
IN UINTN  Count,
IN VOID Buffer 
)

Check parameters to a CPU I/O 2 Protocol service request.

The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.

Parameters
[in]MmioOperationTRUE for an MMIO operation, FALSE for I/O Port operation.
[in]WidthSignifies the width of the I/O or Memory operation.
[in]AddressThe base address of the I/O operation.
[in]CountThe number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address.
[in]BufferFor read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data.
Return values
EFI_SUCCESSThe parameters for this request pass the checks.
EFI_INVALID_PARAMETERWidth is invalid for this PI system.
EFI_INVALID_PARAMETERBuffer is NULL.
EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
EFI_UNSUPPORTEDThe address range specified by Address, Width, and Count is not valid for this PI system.

Definition at line 94 of file CpuIo2Dxe.c.

◆ CpuIoServiceRead()

EFI_STATUS EFIAPI CpuIoServiceRead ( IN EFI_CPU_IO2_PROTOCOL This,
IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
IN UINT64  Address,
IN UINTN  Count,
OUT VOID Buffer 
)

Reads I/O registers.

The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.

If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for each of the Count operations that is performed.

If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is incremented for each of the Count operations that is performed. The read or write operation is performed Count times on the same Address.

If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is incremented for each of the Count operations that is performed. The read or write operation is performed Count times from the first element of Buffer.

Parameters
[in]ThisA pointer to the EFI_CPU_IO2_PROTOCOL instance.
[in]WidthSignifies the width of the I/O or Memory operation.
[in]AddressThe base address of the I/O operation.
[in]CountThe number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address.
[out]BufferFor read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data.
Return values
EFI_SUCCESSThe data was read from or written to the PI system.
EFI_INVALID_PARAMETERWidth is invalid for this PI system.
EFI_INVALID_PARAMETERBuffer is NULL.
EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
EFI_UNSUPPORTEDThe address range specified by Address, Width, and Count is not valid for this PI system.

Definition at line 387 of file CpuIo2Dxe.c.

◆ CpuIoServiceWrite()

EFI_STATUS EFIAPI CpuIoServiceWrite ( IN EFI_CPU_IO2_PROTOCOL This,
IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
IN UINT64  Address,
IN UINTN  Count,
IN VOID Buffer 
)

Write I/O registers.

The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.

If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for each of the Count operations that is performed.

If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is incremented for each of the Count operations that is performed. The read or write operation is performed Count times on the same Address.

If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is incremented for each of the Count operations that is performed. The read or write operation is performed Count times from the first element of Buffer.

Parameters
[in]ThisA pointer to the EFI_CPU_IO2_PROTOCOL instance.
[in]WidthSignifies the width of the I/O or Memory operation.
[in]AddressThe base address of the I/O operation.
[in]CountThe number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address.
[in]BufferFor read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data.
Return values
EFI_SUCCESSThe data was read from or written to the PI system.
EFI_INVALID_PARAMETERWidth is invalid for this PI system.
EFI_INVALID_PARAMETERBuffer is NULL.
EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
EFI_UNSUPPORTEDThe address range specified by Address, Width, and Count is not valid for this PI system.

Definition at line 491 of file CpuIo2Dxe.c.

◆ CpuMemoryServiceRead()

EFI_STATUS EFIAPI CpuMemoryServiceRead ( IN EFI_CPU_IO2_PROTOCOL This,
IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
IN UINT64  Address,
IN UINTN  Count,
OUT VOID Buffer 
)

Reads memory-mapped registers.

The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.

If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for each of the Count operations that is performed.

If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is incremented for each of the Count operations that is performed. The read or write operation is performed Count times on the same Address.

If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is incremented for each of the Count operations that is performed. The read or write operation is performed Count times from the first element of Buffer.

Parameters
[in]ThisA pointer to the EFI_CPU_IO2_PROTOCOL instance.
[in]WidthSignifies the width of the I/O or Memory operation.
[in]AddressThe base address of the I/O operation.
[in]CountThe number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address.
[out]BufferFor read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data.
Return values
EFI_SUCCESSThe data was read from or written to the PI system.
EFI_INVALID_PARAMETERWidth is invalid for this PI system.
EFI_INVALID_PARAMETERBuffer is NULL.
EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
EFI_UNSUPPORTEDThe address range specified by Address, Width, and Count is not valid for this PI system.

Definition at line 225 of file CpuIo2Dxe.c.

◆ CpuMemoryServiceWrite()

EFI_STATUS EFIAPI CpuMemoryServiceWrite ( IN EFI_CPU_IO2_PROTOCOL This,
IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
IN UINT64  Address,
IN UINTN  Count,
IN VOID Buffer 
)

Writes memory-mapped registers.

The I/O operations are carried out exactly as requested. The caller is responsible for satisfying any alignment and I/O width restrictions that a PI System on a platform might require. For example on some platforms, width requests of EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will be handled by the driver.

If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for each of the Count operations that is performed.

If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is incremented for each of the Count operations that is performed. The read or write operation is performed Count times on the same Address.

If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is incremented for each of the Count operations that is performed. The read or write operation is performed Count times from the first element of Buffer.

Parameters
[in]ThisA pointer to the EFI_CPU_IO2_PROTOCOL instance.
[in]WidthSignifies the width of the I/O or Memory operation.
[in]AddressThe base address of the I/O operation.
[in]CountThe number of I/O operations to perform. The number of bytes moved is Width size * Count, starting at Address.
[in]BufferFor read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data.
Return values
EFI_SUCCESSThe data was read from or written to the PI system.
EFI_INVALID_PARAMETERWidth is invalid for this PI system.
EFI_INVALID_PARAMETERBuffer is NULL.
EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
EFI_UNSUPPORTEDThe address range specified by Address, Width, and Count is not valid for this PI system.

Definition at line 306 of file CpuIo2Dxe.c.

Variable Documentation

◆ mCpuIo2

Initial value:
= {
{
},
{
}
}
EFI_STATUS EFIAPI CpuIoServiceWrite(IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
Definition: CpuIo2Dxe.c:491
EFI_STATUS EFIAPI CpuMemoryServiceWrite(IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
Definition: CpuIo2Dxe.c:306
EFI_STATUS EFIAPI CpuMemoryServiceRead(IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
Definition: CpuIo2Dxe.c:225
EFI_STATUS EFIAPI CpuIoServiceRead(IN EFI_CPU_IO2_PROTOCOL *This, IN EFI_CPU_IO_PROTOCOL_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
Definition: CpuIo2Dxe.c:387

Definition at line 21 of file CpuIo2Dxe.c.

◆ mHandle

EFI_HANDLE mHandle = NULL

Handle for the Capsule Update Policy Protocol

Definition at line 16 of file CpuIo2Dxe.c.

◆ mInStride

UINT8 mInStride[]
Initial value:
= {
1,
2,
4,
8,
0,
0,
0,
0,
1,
2,
4,
8
}

Definition at line 35 of file CpuIo2Dxe.c.

◆ mOutStride

UINT8 mOutStride[]
Initial value:
= {
1,
2,
4,
8,
1,
2,
4,
8,
0,
0,
0,
0
}

Definition at line 53 of file CpuIo2Dxe.c.