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CpuIoPei.c
Go to the documentation of this file.
1
11#include "CpuIoPei.h"
12
13//
14// Instance of CPU I/O PPI
15//
16EFI_PEI_CPU_IO_PPI gCpuIoPpi = {
17 {
20 },
21 {
24 },
41};
42
43//
44// PPI Descriptor used to install the CPU I/O PPI
45//
46EFI_PEI_PPI_DESCRIPTOR gPpiList = {
47 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
48 &gEfiPeiCpuIoPpiInstalledGuid,
49 NULL
50};
51
52//
53// Lookup table for increment values based on transfer widths
54//
55UINT8 mInStride[] = {
56 1, // EfiPeiCpuIoWidthUint8
57 2, // EfiPeiCpuIoWidthUint16
58 4, // EfiPeiCpuIoWidthUint32
59 8, // EfiPeiCpuIoWidthUint64
60 0, // EfiPeiCpuIoWidthFifoUint8
61 0, // EfiPeiCpuIoWidthFifoUint16
62 0, // EfiPeiCpuIoWidthFifoUint32
63 0, // EfiPeiCpuIoWidthFifoUint64
64 1, // EfiPeiCpuIoWidthFillUint8
65 2, // EfiPeiCpuIoWidthFillUint16
66 4, // EfiPeiCpuIoWidthFillUint32
67 8 // EfiPeiCpuIoWidthFillUint64
68};
69
70//
71// Lookup table for increment values based on transfer widths
72//
73UINT8 mOutStride[] = {
74 1, // EfiPeiCpuIoWidthUint8
75 2, // EfiPeiCpuIoWidthUint16
76 4, // EfiPeiCpuIoWidthUint32
77 8, // EfiPeiCpuIoWidthUint64
78 1, // EfiPeiCpuIoWidthFifoUint8
79 2, // EfiPeiCpuIoWidthFifoUint16
80 4, // EfiPeiCpuIoWidthFifoUint32
81 8, // EfiPeiCpuIoWidthFifoUint64
82 0, // EfiPeiCpuIoWidthFillUint8
83 0, // EfiPeiCpuIoWidthFillUint16
84 0, // EfiPeiCpuIoWidthFillUint32
85 0 // EfiPeiCpuIoWidthFillUint64
86};
87
106 IN BOOLEAN MmioOperation,
108 IN UINT64 Address,
109 IN UINTN Count,
110 IN VOID *Buffer
111 )
112{
113 UINT64 MaxCount;
114 UINT64 Limit;
115
116 //
117 // Check to see if Buffer is NULL
118 //
119 if (Buffer == NULL) {
120 return EFI_INVALID_PARAMETER;
121 }
122
123 //
124 // Check to see if Width is in the valid range
125 //
126 if ((UINT32)Width >= EfiPeiCpuIoWidthMaximum) {
127 return EFI_INVALID_PARAMETER;
128 }
129
130 //
131 // For FIFO type, the target address won't increase during the access,
132 // so treat Count as 1
133 //
134 if ((Width >= EfiPeiCpuIoWidthFifoUint8) && (Width <= EfiPeiCpuIoWidthFifoUint64)) {
135 Count = 1;
136 }
137
138 //
139 // Check to see if Width is in the valid range for I/O Port operations
140 //
141 Width = (EFI_PEI_CPU_IO_PPI_WIDTH)(Width & 0x03);
142 if (!MmioOperation && (Width == EfiPeiCpuIoWidthUint64)) {
143 return EFI_INVALID_PARAMETER;
144 }
145
146 //
147 // Check to see if any address associated with this transfer exceeds the maximum
148 // allowed address. The maximum address implied by the parameters passed in is
149 // Address + Size * Count. If the following condition is met, then the transfer
150 // is not supported.
151 //
152 // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
153 //
154 // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
155 // can also be the maximum integer value supported by the CPU, this range
156 // check must be adjusted to avoid all overflow conditions.
157 //
158 // The following form of the range check is equivalent but assumes that
159 // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
160 //
161 Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
162 if (Count == 0) {
163 if (Address > Limit) {
164 return EFI_UNSUPPORTED;
165 }
166 } else {
167 MaxCount = RShiftU64 (Limit, Width);
168 if (MaxCount < (Count - 1)) {
169 return EFI_UNSUPPORTED;
170 }
171
172 if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
173 return EFI_UNSUPPORTED;
174 }
175 }
176
177 return EFI_SUCCESS;
178}
179
199EFIAPI
201 IN CONST EFI_PEI_SERVICES **PeiServices,
204 IN UINT64 Address,
205 IN UINTN Count,
206 OUT VOID *Buffer
207 )
208{
209 EFI_STATUS Status;
210 UINT8 InStride;
211 UINT8 OutStride;
212 EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
213 BOOLEAN Aligned;
214 UINT8 *Uint8Buffer;
215
216 Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
217 if (EFI_ERROR (Status)) {
218 return Status;
219 }
220
221 //
222 // Select loop based on the width of the transfer
223 //
224 InStride = mInStride[Width];
225 OutStride = mOutStride[Width];
226 OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH)(Width & 0x03);
227 Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
228 for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
229 if (OperationWidth == EfiPeiCpuIoWidthUint8) {
230 *Uint8Buffer = MmioRead8 ((UINTN)Address);
231 } else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
232 if (Aligned) {
233 *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
234 } else {
235 WriteUnaligned16 ((UINT16 *)Uint8Buffer, MmioRead16 ((UINTN)Address));
236 }
237 } else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
238 if (Aligned) {
239 *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
240 } else {
241 WriteUnaligned32 ((UINT32 *)Uint8Buffer, MmioRead32 ((UINTN)Address));
242 }
243 } else if (OperationWidth == EfiPeiCpuIoWidthUint64) {
244 if (Aligned) {
245 *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
246 } else {
247 WriteUnaligned64 ((UINT64 *)Uint8Buffer, MmioRead64 ((UINTN)Address));
248 }
249 }
250 }
251
252 return EFI_SUCCESS;
253}
254
274EFIAPI
276 IN CONST EFI_PEI_SERVICES **PeiServices,
279 IN UINT64 Address,
280 IN UINTN Count,
281 IN VOID *Buffer
282 )
283{
284 EFI_STATUS Status;
285 UINT8 InStride;
286 UINT8 OutStride;
287 EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
288 BOOLEAN Aligned;
289 UINT8 *Uint8Buffer;
290
291 Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
292 if (EFI_ERROR (Status)) {
293 return Status;
294 }
295
296 //
297 // Select loop based on the width of the transfer
298 //
299 InStride = mInStride[Width];
300 OutStride = mOutStride[Width];
301 OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH)(Width & 0x03);
302 Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
303 for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
304 if (OperationWidth == EfiPeiCpuIoWidthUint8) {
305 MmioWrite8 ((UINTN)Address, *Uint8Buffer);
306 } else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
307 if (Aligned) {
308 MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
309 } else {
310 MmioWrite16 ((UINTN)Address, ReadUnaligned16 ((UINT16 *)Uint8Buffer));
311 }
312 } else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
313 if (Aligned) {
314 MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
315 } else {
316 MmioWrite32 ((UINTN)Address, ReadUnaligned32 ((UINT32 *)Uint8Buffer));
317 }
318 } else if (OperationWidth == EfiPeiCpuIoWidthUint64) {
319 if (Aligned) {
320 MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
321 } else {
322 MmioWrite64 ((UINTN)Address, ReadUnaligned64 ((UINT64 *)Uint8Buffer));
323 }
324 }
325 }
326
327 return EFI_SUCCESS;
328}
329
349EFIAPI
351 IN CONST EFI_PEI_SERVICES **PeiServices,
354 IN UINT64 Address,
355 IN UINTN Count,
356 OUT VOID *Buffer
357 )
358{
359 EFI_STATUS Status;
360 UINT8 InStride;
361 UINT8 OutStride;
362 EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
363 BOOLEAN Aligned;
364 UINT8 *Uint8Buffer;
365
366 Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
367 if (EFI_ERROR (Status)) {
368 return Status;
369 }
370
371 //
372 // Select loop based on the width of the transfer
373 //
374 InStride = mInStride[Width];
375 OutStride = mOutStride[Width];
376 OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH)(Width & 0x03);
377
378 //
379 // Fifo operations supported for (mInStride[Width] == 0)
380 //
381 if (InStride == 0) {
382 switch (OperationWidth) {
383 case EfiPeiCpuIoWidthUint8:
384 IoReadFifo8 ((UINTN)Address, Count, Buffer);
385 return EFI_SUCCESS;
386 case EfiPeiCpuIoWidthUint16:
387 IoReadFifo16 ((UINTN)Address, Count, Buffer);
388 return EFI_SUCCESS;
389 case EfiPeiCpuIoWidthUint32:
390 IoReadFifo32 ((UINTN)Address, Count, Buffer);
391 return EFI_SUCCESS;
392 default:
393 //
394 // The CpuIoCheckParameter call above will ensure that this
395 // path is not taken.
396 //
397 ASSERT (FALSE);
398 break;
399 }
400 }
401
402 Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
403 for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
404 if (OperationWidth == EfiPeiCpuIoWidthUint8) {
405 *Uint8Buffer = IoRead8 ((UINTN)Address);
406 } else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
407 if (Aligned) {
408 *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
409 } else {
410 WriteUnaligned16 ((UINT16 *)Uint8Buffer, IoRead16 ((UINTN)Address));
411 }
412 } else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
413 if (Aligned) {
414 *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
415 } else {
416 WriteUnaligned32 ((UINT32 *)Uint8Buffer, IoRead32 ((UINTN)Address));
417 }
418 }
419 }
420
421 return EFI_SUCCESS;
422}
423
443EFIAPI
445 IN CONST EFI_PEI_SERVICES **PeiServices,
448 IN UINT64 Address,
449 IN UINTN Count,
450 IN VOID *Buffer
451 )
452{
453 EFI_STATUS Status;
454 UINT8 InStride;
455 UINT8 OutStride;
456 EFI_PEI_CPU_IO_PPI_WIDTH OperationWidth;
457 BOOLEAN Aligned;
458 UINT8 *Uint8Buffer;
459
460 //
461 // Make sure the parameters are valid
462 //
463 Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
464 if (EFI_ERROR (Status)) {
465 return Status;
466 }
467
468 //
469 // Select loop based on the width of the transfer
470 //
471 InStride = mInStride[Width];
472 OutStride = mOutStride[Width];
473 OperationWidth = (EFI_PEI_CPU_IO_PPI_WIDTH)(Width & 0x03);
474
475 //
476 // Fifo operations supported for (mInStride[Width] == 0)
477 //
478 if (InStride == 0) {
479 switch (OperationWidth) {
480 case EfiPeiCpuIoWidthUint8:
481 IoWriteFifo8 ((UINTN)Address, Count, Buffer);
482 return EFI_SUCCESS;
483 case EfiPeiCpuIoWidthUint16:
484 IoWriteFifo16 ((UINTN)Address, Count, Buffer);
485 return EFI_SUCCESS;
486 case EfiPeiCpuIoWidthUint32:
487 IoWriteFifo32 ((UINTN)Address, Count, Buffer);
488 return EFI_SUCCESS;
489 default:
490 //
491 // The CpuIoCheckParameter call above will ensure that this
492 // path is not taken.
493 //
494 ASSERT (FALSE);
495 break;
496 }
497 }
498
499 Aligned = (BOOLEAN)(((UINTN)Buffer & (mInStride[OperationWidth] - 1)) == 0x00);
500 for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
501 if (OperationWidth == EfiPeiCpuIoWidthUint8) {
502 IoWrite8 ((UINTN)Address, *Uint8Buffer);
503 } else if (OperationWidth == EfiPeiCpuIoWidthUint16) {
504 if (Aligned) {
505 IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
506 } else {
507 IoWrite16 ((UINTN)Address, ReadUnaligned16 ((UINT16 *)Uint8Buffer));
508 }
509 } else if (OperationWidth == EfiPeiCpuIoWidthUint32) {
510 if (Aligned) {
511 IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
512 } else {
513 IoWrite32 ((UINTN)Address, ReadUnaligned32 ((UINT32 *)Uint8Buffer));
514 }
515 }
516 }
517
518 return EFI_SUCCESS;
519}
520
531UINT8
532EFIAPI
534 IN CONST EFI_PEI_SERVICES **PeiServices,
536 IN UINT64 Address
537 )
538{
539 return IoRead8 ((UINTN)Address);
540}
541
553UINT16
554EFIAPI
556 IN CONST EFI_PEI_SERVICES **PeiServices,
558 IN UINT64 Address
559 )
560{
561 return IoRead16 ((UINTN)Address);
562}
563
575UINT32
576EFIAPI
578 IN CONST EFI_PEI_SERVICES **PeiServices,
580 IN UINT64 Address
581 )
582{
583 return IoRead32 ((UINTN)Address);
584}
585
597UINT64
598EFIAPI
600 IN CONST EFI_PEI_SERVICES **PeiServices,
602 IN UINT64 Address
603 )
604{
605 return IoRead64 ((UINTN)Address);
606}
607
618VOID
619EFIAPI
621 IN CONST EFI_PEI_SERVICES **PeiServices,
623 IN UINT64 Address,
624 IN UINT8 Data
625 )
626{
627 IoWrite8 ((UINTN)Address, Data);
628}
629
640VOID
641EFIAPI
643 IN CONST EFI_PEI_SERVICES **PeiServices,
645 IN UINT64 Address,
646 IN UINT16 Data
647 )
648{
649 IoWrite16 ((UINTN)Address, Data);
650}
651
662VOID
663EFIAPI
665 IN CONST EFI_PEI_SERVICES **PeiServices,
667 IN UINT64 Address,
668 IN UINT32 Data
669 )
670{
671 IoWrite32 ((UINTN)Address, Data);
672}
673
684VOID
685EFIAPI
687 IN CONST EFI_PEI_SERVICES **PeiServices,
689 IN UINT64 Address,
690 IN UINT64 Data
691 )
692{
693 IoWrite64 ((UINTN)Address, Data);
694}
695
707UINT8
708EFIAPI
710 IN CONST EFI_PEI_SERVICES **PeiServices,
712 IN UINT64 Address
713 )
714{
715 return MmioRead8 ((UINTN)Address);
716}
717
729UINT16
730EFIAPI
732 IN CONST EFI_PEI_SERVICES **PeiServices,
734 IN UINT64 Address
735 )
736{
737 return MmioRead16 ((UINTN)Address);
738}
739
751UINT32
752EFIAPI
754 IN CONST EFI_PEI_SERVICES **PeiServices,
756 IN UINT64 Address
757 )
758{
759 return MmioRead32 ((UINTN)Address);
760}
761
773UINT64
774EFIAPI
776 IN CONST EFI_PEI_SERVICES **PeiServices,
778 IN UINT64 Address
779 )
780{
781 return MmioRead64 ((UINTN)Address);
782}
783
794VOID
795EFIAPI
797 IN CONST EFI_PEI_SERVICES **PeiServices,
799 IN UINT64 Address,
800 IN UINT8 Data
801 )
802{
803 MmioWrite8 ((UINTN)Address, Data);
804}
805
816VOID
817EFIAPI
819 IN CONST EFI_PEI_SERVICES **PeiServices,
821 IN UINT64 Address,
822 IN UINT16 Data
823 )
824{
825 MmioWrite16 ((UINTN)Address, Data);
826}
827
838VOID
839EFIAPI
841 IN CONST EFI_PEI_SERVICES **PeiServices,
843 IN UINT64 Address,
844 IN UINT32 Data
845 )
846{
847 MmioWrite32 ((UINTN)Address, Data);
848}
849
860VOID
861EFIAPI
863 IN CONST EFI_PEI_SERVICES **PeiServices,
865 IN UINT64 Address,
866 IN UINT64 Data
867 )
868{
869 MmioWrite64 ((UINTN)Address, Data);
870}
871
884EFIAPI
886 IN EFI_PEI_FILE_HANDLE FileHandle,
887 IN CONST EFI_PEI_SERVICES **PeiServices
888 )
889{
890 EFI_STATUS Status;
891
892 //
893 // Register so it will be automatically shadowed to memory
894 //
895 Status = PeiServicesRegisterForShadow (FileHandle);
896
897 //
898 // Make CpuIo pointer in PeiService table point to gCpuIoPpi
899 //
900 (*((EFI_PEI_SERVICES **)PeiServices))->CpuIo = &gCpuIoPpi;
901
902 if (Status == EFI_ALREADY_STARTED) {
903 //
904 // Shadow completed and running from memory
905 //
906 DEBUG ((DEBUG_INFO, "CpuIO PPI has been loaded into memory. Reinstalled PPI=0x%x\n", &gCpuIoPpi));
907 } else {
908 Status = PeiServicesInstallPpi (&gPpiList);
909 ASSERT_EFI_ERROR (Status);
910 }
911
912 return EFI_SUCCESS;
913}
UINT64 UINTN
#define MAX_ADDRESS
UINT64 EFIAPI ReadUnaligned64(IN CONST UINT64 *Buffer)
Definition: Unaligned.c:204
UINT16 EFIAPI ReadUnaligned16(IN CONST UINT16 *Buffer)
Definition: Unaligned.c:29
UINT64 EFIAPI RShiftU64(IN UINT64 Operand, IN UINTN Count)
Definition: RShiftU64.c:28
UINT32 EFIAPI WriteUnaligned32(OUT UINT32 *Buffer, IN UINT32 Value)
Definition: Unaligned.c:177
UINT16 EFIAPI WriteUnaligned16(OUT UINT16 *Buffer, IN UINT16 Value)
Definition: Unaligned.c:61
UINT64 EFIAPI LShiftU64(IN UINT64 Operand, IN UINTN Count)
Definition: LShiftU64.c:28
UINT64 EFIAPI WriteUnaligned64(OUT UINT64 *Buffer, IN UINT64 Value)
Definition: Unaligned.c:236
UINT32 EFIAPI ReadUnaligned32(IN CONST UINT32 *Buffer)
Definition: Unaligned.c:145
EFI_PEI_CPU_IO_PPI_WIDTH
Definition: CpuIo.h:24
VOID EFIAPI CpuMemWrite32(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address, IN UINT32 Data)
Definition: CpuIoPei.c:840
UINT8 EFIAPI CpuMemRead8(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address)
Definition: CpuIoPei.c:709
VOID EFIAPI CpuIoWrite64(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address, IN UINT64 Data)
Definition: CpuIoPei.c:686
UINT64 EFIAPI CpuMemRead64(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address)
Definition: CpuIoPei.c:775
EFI_STATUS EFIAPI CpuIoServiceRead(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN EFI_PEI_CPU_IO_PPI_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
Definition: CpuIoPei.c:350
VOID EFIAPI CpuMemWrite64(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address, IN UINT64 Data)
Definition: CpuIoPei.c:862
VOID EFIAPI CpuIoWrite8(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address, IN UINT8 Data)
Definition: CpuIoPei.c:620
UINT8 EFIAPI CpuIoRead8(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address)
Definition: CpuIoPei.c:533
VOID EFIAPI CpuMemWrite8(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address, IN UINT8 Data)
Definition: CpuIoPei.c:796
EFI_STATUS EFIAPI CpuIoServiceWrite(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN EFI_PEI_CPU_IO_PPI_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
Definition: CpuIoPei.c:444
VOID EFIAPI CpuIoWrite16(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address, IN UINT16 Data)
Definition: CpuIoPei.c:642
EFI_STATUS EFIAPI CpuIoInitialize(IN EFI_PEI_FILE_HANDLE FileHandle, IN CONST EFI_PEI_SERVICES **PeiServices)
Definition: CpuIoPei.c:885
UINT16 EFIAPI CpuMemRead16(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address)
Definition: CpuIoPei.c:731
EFI_STATUS CpuIoCheckParameter(IN BOOLEAN MmioOperation, IN EFI_PEI_CPU_IO_PPI_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
Definition: CpuIoPei.c:105
UINT32 EFIAPI CpuMemRead32(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address)
Definition: CpuIoPei.c:753
UINT64 EFIAPI CpuIoRead64(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address)
Definition: CpuIoPei.c:599
UINT32 EFIAPI CpuIoRead32(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address)
Definition: CpuIoPei.c:577
UINT16 EFIAPI CpuIoRead16(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address)
Definition: CpuIoPei.c:555
EFI_STATUS EFIAPI CpuMemoryServiceWrite(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN EFI_PEI_CPU_IO_PPI_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
Definition: CpuIoPei.c:275
VOID EFIAPI CpuIoWrite32(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address, IN UINT32 Data)
Definition: CpuIoPei.c:664
EFI_STATUS EFIAPI CpuMemoryServiceRead(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN EFI_PEI_CPU_IO_PPI_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
Definition: CpuIoPei.c:200
VOID EFIAPI CpuMemWrite16(IN CONST EFI_PEI_SERVICES **PeiServices, IN CONST EFI_PEI_CPU_IO_PPI *This, IN UINT64 Address, IN UINT16 Data)
Definition: CpuIoPei.c:818
EFI_STATUS EFIAPI PeiServicesInstallPpi(IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList)
EFI_STATUS EFIAPI PeiServicesRegisterForShadow(IN EFI_PEI_FILE_HANDLE FileHandle)
UINT8 EFIAPI IoWrite8(IN UINTN Port, IN UINT8 Value)
Definition: IoLibArmVirt.c:200
UINT64 EFIAPI MmioWrite64(IN UINTN Address, IN UINT64 Value)
Definition: IoLib.c:400
VOID EFIAPI IoWriteFifo32(IN UINTN Port, IN UINTN Count, IN VOID *Buffer)
Definition: IoLibArmVirt.c:520
VOID EFIAPI IoReadFifo8(IN UINTN Port, IN UINTN Count, OUT VOID *Buffer)
Definition: IoLibArmVirt.c:380
UINT64 EFIAPI IoRead64(IN UINTN Port)
Definition: IoLib.c:29
VOID EFIAPI IoReadFifo16(IN UINTN Port, IN UINTN Count, OUT VOID *Buffer)
Definition: IoLibArmVirt.c:436
UINT64 EFIAPI IoWrite64(IN UINTN Port, IN UINT64 Value)
Definition: IoLib.c:55
VOID EFIAPI IoWriteFifo16(IN UINTN Port, IN UINTN Count, IN VOID *Buffer)
Definition: IoLibArmVirt.c:464
UINT64 EFIAPI MmioRead64(IN UINTN Address)
Definition: IoLib.c:355
VOID EFIAPI IoReadFifo32(IN UINTN Port, IN UINTN Count, OUT VOID *Buffer)
Definition: IoLibArmVirt.c:492
UINT16 EFIAPI MmioRead16(IN UINTN Address)
Definition: IoLib.c:170
UINT8 EFIAPI MmioRead8(IN UINTN Address)
Definition: IoLib.c:82
UINT8 EFIAPI MmioWrite8(IN UINTN Address, IN UINT8 Value)
Definition: IoLib.c:126
UINT8 EFIAPI IoRead8(IN UINTN Port)
Definition: IoLibArmVirt.c:175
UINT32 EFIAPI MmioRead32(IN UINTN Address)
Definition: IoLib.c:262
VOID EFIAPI IoWriteFifo8(IN UINTN Port, IN UINTN Count, IN VOID *Buffer)
Definition: IoLibArmVirt.c:408
UINT16 EFIAPI IoRead16(IN UINTN Port)
Definition: IoLibArmVirt.c:225
UINT16 EFIAPI MmioWrite16(IN UINTN Address, IN UINT16 Value)
Definition: IoLib.c:216
UINT32 EFIAPI IoRead32(IN UINTN Port)
Definition: IoLibArmVirt.c:275
UINT32 EFIAPI IoWrite32(IN UINTN Port, IN UINT32 Value)
Definition: IoLibArmVirt.c:300
UINT16 EFIAPI IoWrite16(IN UINTN Port, IN UINT16 Value)
Definition: IoLibArmVirt.c:250
UINT32 EFIAPI MmioWrite32(IN UINTN Address, IN UINT32 Value)
Definition: IoLib.c:309
#define NULL
Definition: Base.h:319
#define CONST
Definition: Base.h:259
#define TRUE
Definition: Base.h:301
#define FALSE
Definition: Base.h:307
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
#define ASSERT_EFI_ERROR(StatusParameter)
Definition: DebugLib.h:462
#define DEBUG(Expression)
Definition: DebugLib.h:434
VOID * EFI_PEI_FILE_HANDLE
Definition: PiPeiCis.h:26
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:29
#define EFI_SUCCESS
Definition: UefiBaseType.h:112