Cxl30.h File Reference

#include <IndustryStandard/Cxl20.h>

Go to the source code of this file.

Data Structures
union	CXL_CM_EXTENTED_REGISTER_CAPABILITY
union	CXL_BI_RT_CAPABILITY
union	CXL_BI_RT_CONTROL
union	CXL_BI_RT_STATUS
struct	CXL_BI_ROUTE_TABLE_CAPABILITY
union	CXL_BI_DECODER_CAP
union	CXL_BI_DECODER_CONTROL
union	CXL_BI_DECODER_STATUS
struct	CXL_BI_DECODER_CAPABILITY
union	CXL_CACHE_ID_RT_CAPABILITY
union	CXL_CACHE_ID_RT_CONTROL
union	CXL_CACHE_ID_RT_STATUS
union	CXL_CACHE_ID_RT_TARGET
struct	CXL_CACHE_ID_ROUTE_TABLE_CAPABILITY
union	CXL_CACHE_ID_DECODER_CAP
union	CXL_CACHE_ID_DECODER_CONTROL
union	CXL_CACHE_ID_DECODER_STATUS
struct	CXL_CACHE_ID_DECODER_CAPABILITY
union	CXL_3_0_CXL_TIMEOUT_AND_ISOLATION_CAPABILITY
union	CXL_3_0_CXL_TIMEOUT_AND_ISOLATION_CONTROL
union	CXL_3_0_CXL_TIMEOUT_AND_ISOLATION_STATUS
struct	CXL_3_0_CXL_TIMEOUT_AND_ISOLATION_CAPABILITY_STRUCTURE

Macros
#define	CXL_CACHE_MEM_CAPABILITY_ID_TIMEOUT_AND_ISOLATION   0x0009
#define	CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED   0x000A
#define	CXL_CACHE_MEM_CAPABILITY_ID_BI_ROUTE_TABLE   0x000B
#define	CXL_CACHE_MEM_CAPABILITY_ID_BI_DECODER   0x000C
#define	CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_ROUTE_TABLE   0x000D
#define	CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_DECODER   0x000E
#define	CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED_HDM_DECODER   0x000F
#define	CXL_HDM_DECODER_VERSION_30   0x3
#define	CXL_HDM_16_WAY_INTERLEAVING   0x4
#define	CXL_HDM_3_WAY_INTERLEAVING   0x8
#define	CXL_HDM_6_WAY_INTERLEAVING   0x9
#define	CXL_HDM_12_WAY_INTERLEAVING   0xA
#define	CXL_CM_EXTENTED_RANGES_BITMAP   (BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7 | BIT8 | BIT9 | BIT10 | BIT11 | BIT12 | BIT13 | BIT15)

Detailed Description

CXL 3.0 Register definitions

This file contains the register definitions based on the Compute Express Link (CXL) Specification Revision 3.0.

Copyright (c) 2024, Intel Corporation. All rights reserved.

SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file Cxl30.h.

Macro Definition Documentation

CXL_CACHE_MEM_CAPABILITY_ID_BI_DECODER

#define CXL_CACHE_MEM_CAPABILITY_ID_BI_DECODER   0x000C

Definition at line 25 of file Cxl30.h.

CXL_CACHE_MEM_CAPABILITY_ID_BI_ROUTE_TABLE

#define CXL_CACHE_MEM_CAPABILITY_ID_BI_ROUTE_TABLE   0x000B

Definition at line 24 of file Cxl30.h.

CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_DECODER

#define CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_DECODER   0x000E

Definition at line 27 of file Cxl30.h.

CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_ROUTE_TABLE

#define CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_ROUTE_TABLE   0x000D

Definition at line 26 of file Cxl30.h.

CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED

#define CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED   0x000A

Definition at line 23 of file Cxl30.h.

CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED_HDM_DECODER

#define CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED_HDM_DECODER   0x000F

Definition at line 28 of file Cxl30.h.

CXL_CACHE_MEM_CAPABILITY_ID_TIMEOUT_AND_ISOLATION

#define CXL_CACHE_MEM_CAPABILITY_ID_TIMEOUT_AND_ISOLATION   0x0009

Definition at line 22 of file Cxl30.h.

CXL_CM_EXTENTED_RANGES_BITMAP

#define CXL_CM_EXTENTED_RANGES_BITMAP   (BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7 | BIT8 | BIT9 | BIT10 | BIT11 | BIT12 | BIT13 | BIT15)

Definition at line 65 of file Cxl30.h.

CXL_HDM_12_WAY_INTERLEAVING

#define CXL_HDM_12_WAY_INTERLEAVING   0xA

Definition at line 46 of file Cxl30.h.

CXL_HDM_16_WAY_INTERLEAVING

#define CXL_HDM_16_WAY_INTERLEAVING   0x4

Definition at line 43 of file Cxl30.h.

CXL_HDM_3_WAY_INTERLEAVING

#define CXL_HDM_3_WAY_INTERLEAVING   0x8

Definition at line 44 of file Cxl30.h.

CXL_HDM_6_WAY_INTERLEAVING

#define CXL_HDM_6_WAY_INTERLEAVING   0x9

Definition at line 45 of file Cxl30.h.

CXL_HDM_DECODER_VERSION_30

#define CXL_HDM_DECODER_VERSION_30   0x3

Definition at line 34 of file Cxl30.h.