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DxeResetShutdown.c
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1
9#include <Base.h> // BIT13
10
11#include <Library/BaseLib.h> // CpuDeadLoop()
12#include <Library/DebugLib.h> // ASSERT()
13#include <Library/IoLib.h> // IoOr16()
14#include <Library/PcdLib.h> // PcdGet16()
15#include <Library/ResetSystemLib.h> // ResetShutdown()
16#include <OvmfPlatforms.h> // PIIX4_PMBA_VALUE
17
18STATIC UINT16 mAcpiPmBaseAddress;
19STATIC UINT16 mAcpiHwReducedSleepCtl;
20
22EFIAPI
23DxeResetInit (
24 IN EFI_HANDLE ImageHandle,
25 IN EFI_SYSTEM_TABLE *SystemTable
26 )
27{
28 UINT16 HostBridgeDevId;
29
30 HostBridgeDevId = PcdGet16 (PcdOvmfHostBridgePciDevId);
31 switch (HostBridgeDevId) {
32 case INTEL_82441_DEVICE_ID:
33 mAcpiPmBaseAddress = PIIX4_PMBA_VALUE;
34 break;
35 case INTEL_Q35_MCH_DEVICE_ID:
36 mAcpiPmBaseAddress = ICH9_PMBASE_VALUE;
37 break;
38 case CLOUDHV_DEVICE_ID:
39 mAcpiHwReducedSleepCtl = CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS;
40 break;
41 default:
42 ASSERT (FALSE);
43 CpuDeadLoop ();
44 return EFI_UNSUPPORTED;
45 }
46
47 return EFI_SUCCESS;
48}
49
57VOID
58EFIAPI
60 VOID
61 )
62{
63 if (mAcpiHwReducedSleepCtl) {
64 IoWrite8 (mAcpiHwReducedSleepCtl, 5 << 2 | 1 << 5);
65 } else {
66 IoBitFieldWrite16 (mAcpiPmBaseAddress + 4, 10, 13, 0);
67 IoOr16 (mAcpiPmBaseAddress + 4, BIT13);
68 }
69
70 CpuDeadLoop ();
71}
VOID EFIAPI CpuDeadLoop(VOID)
Definition: CpuDeadLoop.c:25
VOID EFIAPI ResetShutdown(VOID)
UINT8 EFIAPI IoWrite8(IN UINTN Port, IN UINT8 Value)
Definition: IoLibArmVirt.c:200
UINT16 EFIAPI IoOr16(IN UINTN Port, IN UINT16 OrData)
Definition: IoHighLevel.c:325
UINT16 EFIAPI IoBitFieldWrite16(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 Value)
Definition: IoHighLevel.c:453
#define STATIC
Definition: Base.h:264
#define FALSE
Definition: Base.h:307
#define IN
Definition: Base.h:279
#define PcdGet16(TokenName)
Definition: PcdLib.h:349
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:29
VOID * EFI_HANDLE
Definition: UefiBaseType.h:33
#define EFI_SUCCESS
Definition: UefiBaseType.h:112