Data Structures
struct	_EMMC_COMMAND_BLOCK

struct	_EMMC_STATUS_BLOCK

struct	_EMMC_COMMAND_PACKET

struct	EMMC_HC_ADMA_DESC_LINE

struct	EMMC_HC_SLOT_CAP

Macros
#define	EMMC_HC_SDMA_ADDR 0x00

#define	EMMC_HC_ARG2 0x00

#define	EMMC_HC_BLK_SIZE 0x04

#define	EMMC_HC_BLK_COUNT 0x06

#define	EMMC_HC_ARG1 0x08

#define	EMMC_HC_TRANS_MOD 0x0C

#define	EMMC_HC_COMMAND 0x0E

#define	EMMC_HC_RESPONSE 0x10

#define	EMMC_HC_BUF_DAT_PORT 0x20

#define	EMMC_HC_PRESENT_STATE 0x24

#define	EMMC_HC_HOST_CTRL1 0x28

#define	EMMC_HC_POWER_CTRL 0x29

#define	EMMC_HC_BLK_GAP_CTRL 0x2A

#define	EMMC_HC_WAKEUP_CTRL 0x2B

#define	EMMC_HC_CLOCK_CTRL 0x2C

#define	EMMC_HC_TIMEOUT_CTRL 0x2E

#define	EMMC_HC_SW_RST 0x2F

#define	EMMC_HC_NOR_INT_STS 0x30

#define	EMMC_HC_ERR_INT_STS 0x32

#define	EMMC_HC_NOR_INT_STS_EN 0x34

#define	EMMC_HC_ERR_INT_STS_EN 0x36

#define	EMMC_HC_NOR_INT_SIG_EN 0x38

#define	EMMC_HC_ERR_INT_SIG_EN 0x3A

#define	EMMC_HC_AUTO_CMD_ERR_STS 0x3C

#define	EMMC_HC_HOST_CTRL2 0x3E

#define	EMMC_HC_CAP 0x40

#define	EMMC_HC_MAX_CURRENT_CAP 0x48

#define	EMMC_HC_FORCE_EVT_AUTO_CMD 0x50

#define	EMMC_HC_FORCE_EVT_ERR_INT 0x52

#define	EMMC_HC_ADMA_ERR_STS 0x54

#define	EMMC_HC_ADMA_SYS_ADDR 0x58

#define	EMMC_HC_PRESET_VAL 0x60

#define	EMMC_HC_SHARED_BUS_CTRL 0xE0

#define	EMMC_HC_SLOT_INT_STS 0xFC

#define	EMMC_HC_CTRL_VER 0xFE

#define	ADMA_MAX_DATA_PER_LINE 0x10000

#define	EMMC_SDMA_BOUNDARY 512 * 1024

#define	EMMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))

Typedefs
typedef struct _EMMC_COMMAND_BLOCK	EMMC_COMMAND_BLOCK

typedef struct _EMMC_STATUS_BLOCK	EMMC_STATUS_BLOCK

typedef struct _EMMC_COMMAND_PACKET	EMMC_COMMAND_PACKET

Enumerations
enum	EMMC_HC_TRANSFER_MODE { EmmcNoData , EmmcPioMode , EmmcSdmaMode , EmmcAdmaMode }

enum	EMMC_COMMAND_TYPE { EmmcCommandTypeBc , EmmcCommandTypeBcr , EmmcCommandTypeAc , EmmcCommandTypeAdtc }

enum	EMMC_RESPONSE_TYPE { EmmcResponceTypeR1 , EmmcResponceTypeR1b , EmmcResponceTypeR2 , EmmcResponceTypeR3 , EmmcResponceTypeR4 , EmmcResponceTypeR5 , EmmcResponceTypeR5b , EmmcResponceTypeR6 , EmmcResponceTypeR7 }

Functions
EFI_STATUS	EmmcPeimHcReset (IN UINTN Bar)

EFI_STATUS	EmmcPeimHcEnableInterrupt (IN UINTN Bar)

EFI_STATUS	EmmcPeimHcGetCapability (IN UINTN Bar, OUT EMMC_HC_SLOT_CAP *Capability)

EFI_STATUS	EmmcPeimHcCardDetect (IN UINTN Bar)

EFI_STATUS	EmmcPeimHcInitHost (IN UINTN Bar)

EFI_STATUS	EmmcPeimSwitch (IN EMMC_PEIM_HC_SLOT *Slot, IN UINT8 Access, IN UINT8 Index, IN UINT8 Value, IN UINT8 CmdSet)

EFI_STATUS	EmmcPeimSetBlkCount (IN EMMC_PEIM_HC_SLOT *Slot, IN UINT16 BlockCount)

EFI_STATUS	EmmcPeimRwMultiBlocks (IN EMMC_PEIM_HC_SLOT Slot, IN EFI_LBA Lba, IN UINT32 BlockSize, IN VOID Buffer, IN UINTN BufferSize, IN BOOLEAN IsRead)

EFI_STATUS	EmmcPeimIdentification (IN EMMC_PEIM_HC_SLOT *Slot)

VOID	EmmcPeimFreeTrb (IN EMMC_TRB *Trb)

Detailed Description

Copyright (c) 2015, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file EmmcHci.h.

Macro Definition Documentation

◆ ADMA_MAX_DATA_PER_LINE

#define ADMA_MAX_DATA_PER_LINE 0x10000

Definition at line 64 of file EmmcHci.h.

◆ EMMC_HC_ADMA_ERR_STS

#define EMMC_HC_ADMA_ERR_STS 0x54

Definition at line 43 of file EmmcHci.h.

◆ EMMC_HC_ADMA_SYS_ADDR

#define EMMC_HC_ADMA_SYS_ADDR 0x58

Definition at line 44 of file EmmcHci.h.

◆ EMMC_HC_ARG1

#define EMMC_HC_ARG1 0x08

Definition at line 18 of file EmmcHci.h.

◆ EMMC_HC_ARG2

#define EMMC_HC_ARG2 0x00

Definition at line 15 of file EmmcHci.h.

◆ EMMC_HC_AUTO_CMD_ERR_STS

#define EMMC_HC_AUTO_CMD_ERR_STS 0x3C

Definition at line 37 of file EmmcHci.h.

◆ EMMC_HC_BLK_COUNT

#define EMMC_HC_BLK_COUNT 0x06

Definition at line 17 of file EmmcHci.h.

◆ EMMC_HC_BLK_GAP_CTRL

#define EMMC_HC_BLK_GAP_CTRL 0x2A

Definition at line 26 of file EmmcHci.h.

◆ EMMC_HC_BLK_SIZE

#define EMMC_HC_BLK_SIZE 0x04

Definition at line 16 of file EmmcHci.h.

◆ EMMC_HC_BUF_DAT_PORT

#define EMMC_HC_BUF_DAT_PORT 0x20

Definition at line 22 of file EmmcHci.h.

◆ EMMC_HC_CAP

#define EMMC_HC_CAP 0x40

Definition at line 39 of file EmmcHci.h.

◆ EMMC_HC_CLOCK_CTRL

#define EMMC_HC_CLOCK_CTRL 0x2C

Definition at line 28 of file EmmcHci.h.

◆ EMMC_HC_COMMAND

#define EMMC_HC_COMMAND 0x0E

Definition at line 20 of file EmmcHci.h.

◆ EMMC_HC_CTRL_VER

#define EMMC_HC_CTRL_VER 0xFE

Definition at line 48 of file EmmcHci.h.

◆ EMMC_HC_ERR_INT_SIG_EN

#define EMMC_HC_ERR_INT_SIG_EN 0x3A

Definition at line 36 of file EmmcHci.h.

◆ EMMC_HC_ERR_INT_STS

#define EMMC_HC_ERR_INT_STS 0x32

Definition at line 32 of file EmmcHci.h.

◆ EMMC_HC_ERR_INT_STS_EN

#define EMMC_HC_ERR_INT_STS_EN 0x36

Definition at line 34 of file EmmcHci.h.

◆ EMMC_HC_FORCE_EVT_AUTO_CMD

#define EMMC_HC_FORCE_EVT_AUTO_CMD 0x50

Definition at line 41 of file EmmcHci.h.

◆ EMMC_HC_FORCE_EVT_ERR_INT

#define EMMC_HC_FORCE_EVT_ERR_INT 0x52

Definition at line 42 of file EmmcHci.h.

◆ EMMC_HC_HOST_CTRL1

#define EMMC_HC_HOST_CTRL1 0x28

Definition at line 24 of file EmmcHci.h.

◆ EMMC_HC_HOST_CTRL2

#define EMMC_HC_HOST_CTRL2 0x3E

Definition at line 38 of file EmmcHci.h.

◆ EMMC_HC_MAX_CURRENT_CAP

#define EMMC_HC_MAX_CURRENT_CAP 0x48

Definition at line 40 of file EmmcHci.h.

◆ EMMC_HC_NOR_INT_SIG_EN

#define EMMC_HC_NOR_INT_SIG_EN 0x38

Definition at line 35 of file EmmcHci.h.

◆ EMMC_HC_NOR_INT_STS

#define EMMC_HC_NOR_INT_STS 0x30

Definition at line 31 of file EmmcHci.h.

◆ EMMC_HC_NOR_INT_STS_EN

#define EMMC_HC_NOR_INT_STS_EN 0x34

Definition at line 33 of file EmmcHci.h.

◆ EMMC_HC_POWER_CTRL

#define EMMC_HC_POWER_CTRL 0x29

Definition at line 25 of file EmmcHci.h.

◆ EMMC_HC_PRESENT_STATE

#define EMMC_HC_PRESENT_STATE 0x24

Definition at line 23 of file EmmcHci.h.

◆ EMMC_HC_PRESET_VAL

#define EMMC_HC_PRESET_VAL 0x60

Definition at line 45 of file EmmcHci.h.

◆ EMMC_HC_RESPONSE

#define EMMC_HC_RESPONSE 0x10

Definition at line 21 of file EmmcHci.h.

◆ EMMC_HC_SDMA_ADDR

#define EMMC_HC_SDMA_ADDR 0x00

Definition at line 14 of file EmmcHci.h.

◆ EMMC_HC_SHARED_BUS_CTRL

#define EMMC_HC_SHARED_BUS_CTRL 0xE0

Definition at line 46 of file EmmcHci.h.

◆ EMMC_HC_SLOT_INT_STS

#define EMMC_HC_SLOT_INT_STS 0xFC

Definition at line 47 of file EmmcHci.h.

◆ EMMC_HC_SW_RST

#define EMMC_HC_SW_RST 0x2F

Definition at line 30 of file EmmcHci.h.

◆ EMMC_HC_TIMEOUT_CTRL

#define EMMC_HC_TIMEOUT_CTRL 0x2E

Definition at line 29 of file EmmcHci.h.

◆ EMMC_HC_TRANS_MOD

#define EMMC_HC_TRANS_MOD 0x0C

Definition at line 19 of file EmmcHci.h.

◆ EMMC_HC_WAKEUP_CTRL

#define EMMC_HC_WAKEUP_CTRL 0x2B

Definition at line 27 of file EmmcHci.h.

◆ EMMC_SDMA_BOUNDARY

#define EMMC_SDMA_BOUNDARY 512 * 1024

Definition at line 65 of file EmmcHci.h.

◆ EMMC_SDMA_ROUND_UP

#define EMMC_SDMA_ROUND_UP	(	x,
		n
	)	(((x) + n) & ~(n - 1))

Definition at line 66 of file EmmcHci.h.

Enumeration Type Documentation

◆ EMMC_COMMAND_TYPE

enum EMMC_COMMAND_TYPE

Definition at line 68 of file EmmcHci.h.

◆ EMMC_HC_TRANSFER_MODE

enum EMMC_HC_TRANSFER_MODE

Definition at line 54 of file EmmcHci.h.

◆ EMMC_RESPONSE_TYPE

enum EMMC_RESPONSE_TYPE

Definition at line 75 of file EmmcHci.h.

Function Documentation

◆ EmmcPeimFreeTrb()

VOID EmmcPeimFreeTrb ( IN EMMC_TRB * Trb )

Free the resource used by the TRB.

Parameters

[in] Trb The pointer to the EMMC_TRB instance.

Definition at line 1099 of file EmmcHci.c.

◆ EmmcPeimHcCardDetect()

EFI_STATUS EmmcPeimHcCardDetect ( IN UINTN Bar )

Detect whether there is a EMMC card attached at the specified EMMC host controller slot.

Refer to SD Host Controller Simplified spec 3.0 Section 3.1 for details.

Parameters

[in] Bar The mmio base address of the slot to be accessed.

Return values

EFI_SUCCESS	There is a EMMC card attached.
EFI_NO_MEDIA	There is not a EMMC card attached.
Others	The detection fails.

Definition at line 414 of file EmmcHci.c.

◆ EmmcPeimHcEnableInterrupt()

EFI_STATUS EmmcPeimHcEnableInterrupt ( IN UINTN Bar )

Set all interrupt status bits in Normal and Error Interrupt Status Enable register.

Parameters

[in] Bar The mmio base address of the slot to be accessed.

Return values

EFI_SUCCESS	The operation executes successfully.
Others	The operation fails.

Definition at line 346 of file EmmcHci.c.

◆ EmmcPeimHcGetCapability()

EFI_STATUS EmmcPeimHcGetCapability	(	IN UINTN	Bar,
		OUT EMMC_HC_SLOT_CAP *	Capability
	)

Get the capability data from the specified slot.

Parameters

[in]	Bar	The mmio base address of the slot to be accessed.
[out]	Capability	The buffer to store the capability data.

Return values

EFI_SUCCESS	The operation executes successfully.
Others	The operation fails.

Definition at line 382 of file EmmcHci.c.

◆ EmmcPeimHcInitHost()

EFI_STATUS EmmcPeimHcInitHost ( IN UINTN Bar )

Initial EMMC host controller with lowest clock frequency, max power and max timeout value at initialization.

Parameters

[in] Bar The mmio base address of the slot to be accessed.

Return values

EFI_SUCCESS	The host controller is initialized successfully.
Others	The host controller isn't initialized successfully.

Definition at line 868 of file EmmcHci.c.

◆ EmmcPeimHcReset()

EFI_STATUS EmmcPeimHcReset ( IN UINTN Bar )

Software reset the specified EMMC host controller and enable all interrupts.

Parameters

[in] Bar The mmio base address of the slot to be accessed.

Return values

EFI_SUCCESS	The software reset executes successfully.
Others	The software reset fails.

Definition at line 300 of file EmmcHci.c.

◆ EmmcPeimIdentification()

EFI_STATUS EmmcPeimIdentification ( IN EMMC_PEIM_HC_SLOT * Slot )

Execute EMMC device identification procedure.

Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.

Parameters

[in] Slot The slot number of the Emmc card to send the command to.

Return values

EFI_SUCCESS	There is a EMMC card.
Others	There is not a EMMC card.

Definition at line 2894 of file EmmcHci.c.

◆ EmmcPeimRwMultiBlocks()

EFI_STATUS EmmcPeimRwMultiBlocks	(	IN EMMC_PEIM_HC_SLOT *	Slot,
		IN EFI_LBA	Lba,
		IN UINT32	BlockSize,
		IN VOID *	Buffer,
		IN UINTN	BufferSize,
		IN BOOLEAN	IsRead
	)

Send command READ_MULTIPLE_BLOCK/WRITE_MULTIPLE_BLOCK to the addressed EMMC device to read/write the specified number of blocks.

Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.

Parameters

[in]	Slot	The slot number of the Emmc card to send the command to.
[in]	Lba	The logical block address of starting access.
[in]	BlockSize	The block size of specified EMMC device partition.
[in]	Buffer	The pointer to the transfer buffer.
[in]	BufferSize	The size of transfer buffer.
[in]	IsRead	Boolean to show the operation direction.

Return values

EFI_SUCCESS	The operation is done correctly.
Others	The operation fails.

Definition at line 2204 of file EmmcHci.c.

◆ EmmcPeimSetBlkCount()

EFI_STATUS EmmcPeimSetBlkCount	(	IN EMMC_PEIM_HC_SLOT *	Slot,
		IN UINT16	BlockCount
	)

Send command SET_BLOCK_COUNT to the addressed EMMC device to set the number of blocks for the following block read/write cmd.

Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.

Parameters

[in]	Slot	The slot number of the Emmc card to send the command to.
[in]	BlockCount	The number of the logical block to access.

Return values

EFI_SUCCESS	The operation is done correctly.
Others	The operation fails.

Definition at line 2158 of file EmmcHci.c.

◆ EmmcPeimSwitch()

EFI_STATUS EmmcPeimSwitch	(	IN EMMC_PEIM_HC_SLOT *	Slot,
		IN UINT8	Access,
		IN UINT8	Index,
		IN UINT8	Value,
		IN UINT8	CmdSet
	)

Send command SWITCH to the EMMC device to switch the mode of operation of the selected Device or modifies the EXT_CSD registers.

Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.

Parameters

[in]	Slot	The slot number of the Emmc card to send the command to.
[in]	Access	The access mode of SWITCH command.
[in]	Index	The offset of the field to be access.
[in]	Value	The value to be set to the specified field of EXT_CSD register.
[in]	CmdSet	The value of CmdSet field of EXT_CSD register.

Return values

EFI_SUCCESS	The operation is done correctly.
Others	The operation fails.

Definition at line 2067 of file EmmcHci.c.

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ ADMA_MAX_DATA_PER_LINE

◆ EMMC_HC_ADMA_ERR_STS

◆ EMMC_HC_ADMA_SYS_ADDR

◆ EMMC_HC_ARG1

◆ EMMC_HC_ARG2

◆ EMMC_HC_AUTO_CMD_ERR_STS

◆ EMMC_HC_BLK_COUNT

◆ EMMC_HC_BLK_GAP_CTRL

◆ EMMC_HC_BLK_SIZE

◆ EMMC_HC_BUF_DAT_PORT

◆ EMMC_HC_CAP

◆ EMMC_HC_CLOCK_CTRL

◆ EMMC_HC_COMMAND

◆ EMMC_HC_CTRL_VER

◆ EMMC_HC_ERR_INT_SIG_EN

◆ EMMC_HC_ERR_INT_STS

◆ EMMC_HC_ERR_INT_STS_EN

◆ EMMC_HC_FORCE_EVT_AUTO_CMD

◆ EMMC_HC_FORCE_EVT_ERR_INT

◆ EMMC_HC_HOST_CTRL1

◆ EMMC_HC_HOST_CTRL2

◆ EMMC_HC_MAX_CURRENT_CAP

◆ EMMC_HC_NOR_INT_SIG_EN

◆ EMMC_HC_NOR_INT_STS

◆ EMMC_HC_NOR_INT_STS_EN

◆ EMMC_HC_POWER_CTRL

◆ EMMC_HC_PRESENT_STATE

◆ EMMC_HC_PRESET_VAL

◆ EMMC_HC_RESPONSE

◆ EMMC_HC_SDMA_ADDR

◆ EMMC_HC_SHARED_BUS_CTRL

◆ EMMC_HC_SLOT_INT_STS

◆ EMMC_HC_SW_RST

◆ EMMC_HC_TIMEOUT_CTRL

◆ EMMC_HC_TRANS_MOD

◆ EMMC_HC_WAKEUP_CTRL

◆ EMMC_SDMA_BOUNDARY

◆ EMMC_SDMA_ROUND_UP

Enumeration Type Documentation

◆ EMMC_COMMAND_TYPE

◆ EMMC_HC_TRANSFER_MODE

◆ EMMC_RESPONSE_TYPE

Function Documentation

◆ EmmcPeimFreeTrb()

◆ EmmcPeimHcCardDetect()

◆ EmmcPeimHcEnableInterrupt()

◆ EmmcPeimHcGetCapability()

◆ EmmcPeimHcInitHost()

◆ EmmcPeimHcReset()

◆ EmmcPeimIdentification()

◆ EmmcPeimRwMultiBlocks()

◆ EmmcPeimSetBlkCount()

◆ EmmcPeimSwitch()