TianoCore EDK2
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FlushCacheLine.c
Go to the documentation of this file.
1
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VOID *
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EFIAPI
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AsmFlushCacheLine
(
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IN
VOID *LinearAddress
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)
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{
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//
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// If the CPU does not support CLFLUSH instruction,
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// then promote flush range to flush entire cache.
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//
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_asm {
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mov eax, 1
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cpuid
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test edx, BIT19
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jz NoClflush
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mov eax, dword ptr [LinearAddress]
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clflush [eax]
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jmp Done
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NoClflush:
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wbinvd
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Done:
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}
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return
LinearAddress;
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}
AsmFlushCacheLine
VOID *EFIAPI AsmFlushCacheLine(IN VOID *LinearAddress)
Definition:
FlushCacheLine.c:26
IN
#define IN
Definition:
Base.h:279
MdePkg
Library
BaseLib
Ia32
FlushCacheLine.c
Generated on Fri Nov 15 2024 18:01:17 for TianoCore EDK2 by
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