TianoCore EDK2 master
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InternalGetSpinLockProperties.c
Go to the documentation of this file.
1
10
20 VOID
21 )
22{
23 UINT32 RegEax;
24 UINT32 RegEbx;
25 UINTN FamilyId;
26 UINTN ModelId;
27 UINTN CacheLineSize;
28
29 //
30 // Retrieve CPUID Version Information
31 //
32 AsmCpuid (0x01, &RegEax, &RegEbx, NULL, NULL);
33 //
34 // EBX: Bits 15 - 08: CLFLUSH line size (Value * 8 = cache line size)
35 //
36 CacheLineSize = ((RegEbx >> 8) & 0xff) * 8;
37 //
38 // Retrieve CPU Family and Model
39 //
40 FamilyId = (RegEax >> 8) & 0xf;
41 ModelId = (RegEax >> 4) & 0xf;
42 if (FamilyId == 0x0f) {
43 //
44 // In processors based on Intel NetBurst microarchitecture, use two cache lines
45 //
46 ModelId = ModelId | ((RegEax >> 12) & 0xf0);
47 if ((ModelId <= 0x04) || (ModelId == 0x06)) {
48 CacheLineSize *= 2;
49 }
50 }
51
52 if (CacheLineSize < 32) {
53 CacheLineSize = 32;
54 }
55
56 return CacheLineSize;
57}
UINT64 UINTN
UINTN InternalGetSpinLockProperties(VOID)
#define NULL
Definition: Base.h:319
UINT32 EFIAPI AsmCpuid(IN UINT32 Index, OUT UINT32 *RegisterEax OPTIONAL, OUT UINT32 *RegisterEbx OPTIONAL, OUT UINT32 *RegisterEcx OPTIONAL, OUT UINT32 *RegisterEdx OPTIONAL)
Definition: CpuId.c:36