Go to the source code of this file.
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enum | IPMI_KCS_STATE { IpmiKcsIdleState = 0
, IpmiKcsReadState
, IpmiKcsWriteState
, IpmiKcsErrorState
} |
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IPMI KCS Register Definitions
Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
- Revision Reference:
- IPMI Specification Version 2.0, Rev. 1.1 https://www.intel.com/content/www/us/en/products/docs/servers/ipmi/ipmi-second-gen-interface-spec-v2-rev1-1.html
Definition in file IpmiKcs.h.
◆ IPMI_KCS_COMMAND_DATA
#define IPMI_KCS_COMMAND_DATA BIT3 |
◆ IPMI_KCS_COMMAND_REGISTER_OFFSET
#define IPMI_KCS_COMMAND_REGISTER_OFFSET 1 |
◆ IPMI_KCS_CONTROL_CODE_GET_STATUS_ABORT
#define IPMI_KCS_CONTROL_CODE_GET_STATUS_ABORT 0x60 |
IPMI KCS Interface Control Codes
Definition at line 36 of file IpmiKcs.h.
◆ IPMI_KCS_CONTROL_CODE_READ
#define IPMI_KCS_CONTROL_CODE_READ 0x68 |
◆ IPMI_KCS_CONTROL_CODE_WRITE_END
#define IPMI_KCS_CONTROL_CODE_WRITE_END 0x62 |
◆ IPMI_KCS_CONTROL_CODE_WRITE_START
#define IPMI_KCS_CONTROL_CODE_WRITE_START 0x61 |
◆ IPMI_KCS_DATA_IN_REGISTER_OFFSET
#define IPMI_KCS_DATA_IN_REGISTER_OFFSET 0 |
◆ IPMI_KCS_DATA_OUT_REGISTER_OFFSET
#define IPMI_KCS_DATA_OUT_REGISTER_OFFSET 0 |
◆ IPMI_KCS_IBF
#define IPMI_KCS_IBF BIT1 |
◆ IPMI_KCS_OBF
#define IPMI_KCS_OBF BIT0 |
IPMI KCS Interface Status Bits
Definition at line 24 of file IpmiKcs.h.
◆ IPMI_KCS_OEM1
#define IPMI_KCS_OEM1 BIT4 |
◆ IPMI_KCS_OEM2
#define IPMI_KCS_OEM2 BIT5 |
◆ IPMI_KCS_S0
◆ IPMI_KCS_S1
◆ IPMI_KCS_SMS_ATN
#define IPMI_KCS_SMS_ATN BIT2 |
◆ IPMI_KCS_STATUS_ABORT
#define IPMI_KCS_STATUS_ABORT 0x01 |
◆ IPMI_KCS_STATUS_ILLEGAL
#define IPMI_KCS_STATUS_ILLEGAL 0x02 |
◆ IPMI_KCS_STATUS_LENGTH_ERROR
#define IPMI_KCS_STATUS_LENGTH_ERROR 0x06 |
◆ IPMI_KCS_STATUS_NO_ERROR
#define IPMI_KCS_STATUS_NO_ERROR 0x00 |
◆ IPMI_KCS_STATUS_REGISTER_OFFSET
#define IPMI_KCS_STATUS_REGISTER_OFFSET 1 |
◆ IPMI_KCS_STATUS_UNSPECIFIED
#define IPMI_KCS_STATUS_UNSPECIFIED 0xFF |
◆ IPMI_KCS_STATE
KCS Interface State Bit
Definition at line 53 of file IpmiKcs.h.