TianoCore EDK2 master
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MmCpu.h
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1
14#ifndef _MM_CPU_H_
15#define _MM_CPU_H_
16
17#define EFI_MM_CPU_PROTOCOL_GUID \
18 { \
19 0xeb346b97, 0x975f, 0x4a9f, { 0x8b, 0x22, 0xf8, 0xe9, 0x2b, 0xb3, 0xd5, 0x69 } \
20 }
21
25typedef enum {
30 EFI_MM_SAVE_STATE_REGISTER_IDTBASE = 5,
31 EFI_MM_SAVE_STATE_REGISTER_LDTBASE = 6,
32 EFI_MM_SAVE_STATE_REGISTER_GDTLIMIT = 7,
33 EFI_MM_SAVE_STATE_REGISTER_IDTLIMIT = 8,
34 EFI_MM_SAVE_STATE_REGISTER_LDTLIMIT = 9,
35 EFI_MM_SAVE_STATE_REGISTER_LDTINFO = 10,
36 EFI_MM_SAVE_STATE_REGISTER_ES = 20,
37 EFI_MM_SAVE_STATE_REGISTER_CS = 21,
38 EFI_MM_SAVE_STATE_REGISTER_SS = 22,
39 EFI_MM_SAVE_STATE_REGISTER_DS = 23,
40 EFI_MM_SAVE_STATE_REGISTER_FS = 24,
41 EFI_MM_SAVE_STATE_REGISTER_GS = 25,
42 EFI_MM_SAVE_STATE_REGISTER_LDTR_SEL = 26,
43 EFI_MM_SAVE_STATE_REGISTER_TR_SEL = 27,
44 EFI_MM_SAVE_STATE_REGISTER_DR7 = 28,
45 EFI_MM_SAVE_STATE_REGISTER_DR6 = 29,
46 EFI_MM_SAVE_STATE_REGISTER_R8 = 30,
47 EFI_MM_SAVE_STATE_REGISTER_R9 = 31,
48 EFI_MM_SAVE_STATE_REGISTER_R10 = 32,
49 EFI_MM_SAVE_STATE_REGISTER_R11 = 33,
50 EFI_MM_SAVE_STATE_REGISTER_R12 = 34,
51 EFI_MM_SAVE_STATE_REGISTER_R13 = 35,
52 EFI_MM_SAVE_STATE_REGISTER_R14 = 36,
53 EFI_MM_SAVE_STATE_REGISTER_R15 = 37,
54 EFI_MM_SAVE_STATE_REGISTER_RAX = 38,
55 EFI_MM_SAVE_STATE_REGISTER_RBX = 39,
56 EFI_MM_SAVE_STATE_REGISTER_RCX = 40,
57 EFI_MM_SAVE_STATE_REGISTER_RDX = 41,
58 EFI_MM_SAVE_STATE_REGISTER_RSP = 42,
59 EFI_MM_SAVE_STATE_REGISTER_RBP = 43,
60 EFI_MM_SAVE_STATE_REGISTER_RSI = 44,
61 EFI_MM_SAVE_STATE_REGISTER_RDI = 45,
62 EFI_MM_SAVE_STATE_REGISTER_RIP = 46,
63 EFI_MM_SAVE_STATE_REGISTER_RFLAGS = 51,
64 EFI_MM_SAVE_STATE_REGISTER_CR0 = 52,
65 EFI_MM_SAVE_STATE_REGISTER_CR3 = 53,
66 EFI_MM_SAVE_STATE_REGISTER_CR4 = 54,
67 EFI_MM_SAVE_STATE_REGISTER_FCW = 256,
68 EFI_MM_SAVE_STATE_REGISTER_FSW = 257,
69 EFI_MM_SAVE_STATE_REGISTER_FTW = 258,
70 EFI_MM_SAVE_STATE_REGISTER_OPCODE = 259,
71 EFI_MM_SAVE_STATE_REGISTER_FP_EIP = 260,
72 EFI_MM_SAVE_STATE_REGISTER_FP_CS = 261,
73 EFI_MM_SAVE_STATE_REGISTER_DATAOFFSET = 262,
74 EFI_MM_SAVE_STATE_REGISTER_FP_DS = 263,
75 EFI_MM_SAVE_STATE_REGISTER_MM0 = 264,
76 EFI_MM_SAVE_STATE_REGISTER_MM1 = 265,
77 EFI_MM_SAVE_STATE_REGISTER_MM2 = 266,
78 EFI_MM_SAVE_STATE_REGISTER_MM3 = 267,
79 EFI_MM_SAVE_STATE_REGISTER_MM4 = 268,
80 EFI_MM_SAVE_STATE_REGISTER_MM5 = 269,
81 EFI_MM_SAVE_STATE_REGISTER_MM6 = 270,
82 EFI_MM_SAVE_STATE_REGISTER_MM7 = 271,
83 EFI_MM_SAVE_STATE_REGISTER_XMM0 = 272,
84 EFI_MM_SAVE_STATE_REGISTER_XMM1 = 273,
85 EFI_MM_SAVE_STATE_REGISTER_XMM2 = 274,
86 EFI_MM_SAVE_STATE_REGISTER_XMM3 = 275,
87 EFI_MM_SAVE_STATE_REGISTER_XMM4 = 276,
88 EFI_MM_SAVE_STATE_REGISTER_XMM5 = 277,
89 EFI_MM_SAVE_STATE_REGISTER_XMM6 = 278,
90 EFI_MM_SAVE_STATE_REGISTER_XMM7 = 279,
91 EFI_MM_SAVE_STATE_REGISTER_XMM8 = 280,
92 EFI_MM_SAVE_STATE_REGISTER_XMM9 = 281,
93 EFI_MM_SAVE_STATE_REGISTER_XMM10 = 282,
94 EFI_MM_SAVE_STATE_REGISTER_XMM11 = 283,
95 EFI_MM_SAVE_STATE_REGISTER_XMM12 = 284,
96 EFI_MM_SAVE_STATE_REGISTER_XMM13 = 285,
97 EFI_MM_SAVE_STATE_REGISTER_XMM14 = 286,
98 EFI_MM_SAVE_STATE_REGISTER_XMM15 = 287,
103 EFI_MM_SAVE_STATE_REGISTER_LMA = 513,
104 EFI_MM_SAVE_STATE_REGISTER_PROCESSOR_ID = 514
106
113#define EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT 32
114#define EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT 64
115
119typedef enum {
120 EFI_MM_SAVE_STATE_IO_WIDTH_UINT8 = 0,
121 EFI_MM_SAVE_STATE_IO_WIDTH_UINT16 = 1,
122 EFI_MM_SAVE_STATE_IO_WIDTH_UINT32 = 2,
123 EFI_MM_SAVE_STATE_IO_WIDTH_UINT64 = 3
125
129typedef enum {
130 EFI_MM_SAVE_STATE_IO_TYPE_INPUT = 1,
131 EFI_MM_SAVE_STATE_IO_TYPE_OUTPUT = 2,
132 EFI_MM_SAVE_STATE_IO_TYPE_STRING = 4,
133 EFI_MM_SAVE_STATE_IO_TYPE_REP_PREFIX = 8
135
149 UINT64 IoData;
153 UINT16 IoPort;
163
165
185typedef
187(EFIAPI *EFI_MM_READ_SAVE_STATE)(
189 IN UINTN Width,
191 IN UINTN CpuIndex,
192 OUT VOID *Buffer
193 );
194
214typedef
218 IN UINTN Width,
220 IN UINTN CpuIndex,
221 IN CONST VOID *Buffer
222 );
223
233 EFI_MM_READ_SAVE_STATE ReadSaveState;
234 EFI_MM_WRITE_SAVE_STATE WriteSaveState;
235};
236
237extern EFI_GUID gEfiMmCpuProtocolGuid;
238
239#endif
UINT64 UINTN
#define CONST
Definition: Base.h:259
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
EFI_STATUS(EFIAPI * EFI_MM_READ_SAVE_STATE)(IN CONST EFI_MM_CPU_PROTOCOL *This, IN UINTN Width, IN EFI_MM_SAVE_STATE_REGISTER Register, IN UINTN CpuIndex, OUT VOID *Buffer)
Definition: MmCpu.h:187
struct _EFI_MM_SAVE_STATE_IO_INFO EFI_MM_SAVE_STATE_IO_INFO
EFI_MM_SAVE_STATE_IO_WIDTH
Definition: MmCpu.h:119
EFI_STATUS(EFIAPI * EFI_MM_WRITE_SAVE_STATE)(IN CONST EFI_MM_CPU_PROTOCOL *This, IN UINTN Width, IN EFI_MM_SAVE_STATE_REGISTER Register, IN UINTN CpuIndex, IN CONST VOID *Buffer)
Definition: MmCpu.h:216
EFI_MM_SAVE_STATE_REGISTER
Definition: MmCpu.h:25
@ EFI_MM_SAVE_STATE_REGISTER_GDTBASE
Definition: MmCpu.h:29
@ EFI_MM_SAVE_STATE_REGISTER_IO
Definition: MmCpu.h:102
EFI_MM_SAVE_STATE_IO_TYPE
Definition: MmCpu.h:129
EFI_STATUS EFIAPI Register(IN EFI_PEI_RSC_HANDLER_CALLBACK Callback)
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:29
EFI_MM_SAVE_STATE_IO_TYPE IoType
Definition: MmCpu.h:161
EFI_MM_SAVE_STATE_IO_WIDTH IoWidth
Definition: MmCpu.h:157
Definition: Base.h:213