MM CPU I/O 2 protocol as defined in the PI 1.5 specification.
This protocol provides CPU I/O and memory access within MM.
Copyright (c) 2017, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file MmCpuIo.h.
Provides the basic memory and I/O interfaces used toabstract accesses to devices.
The I/O operations are carried out exactly as requested. The caller is responsible for any alignment and I/O width issues that the bus, device, platform, or type of I/O might require.
- Parameters
-
[in] | This | The EFI_MM_CPU_IO_PROTOCOL instance. |
[in] | Width | Signifies the width of the I/O operations. |
[in] | Address | The base address of the I/O operations. The caller is responsible for aligning the Address if required. |
[in] | Count | The number of I/O operations to perform. |
[in,out] | Buffer | For read operations, the destination buffer to store the results. For write operations, the source buffer from which to write data. |
- Return values
-
EFI_SUCCESS | The data was read from or written to the device. |
EFI_UNSUPPORTED | The Address is not valid for this system. |
EFI_INVALID_PARAMETER | Width or Count, or both, were invalid. |
EFI_OUT_OF_RESOURCES | The request could not be completed due to a lack of resources. |
Definition at line 54 of file MmCpuIo.h.