TianoCore EDK2 master
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MpHandOff.h
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1
10#ifndef MP_HANDOFF_H_
11#define MP_HANDOFF_H_
12
13#define MP_HANDOFF_GUID \
14 { \
15 0x11e2bd88, 0xed38, 0x4abd, {0xa3, 0x99, 0x21, 0xf2, 0x5f, 0xd0, 0x7a, 0x60 } \
16 }
17
18#define MP_HANDOFF_CONFIG_GUID \
19 { \
20 0xdabbd793, 0x7b46, 0x4144, {0x8a, 0xd4, 0x10, 0x1c, 0x7c, 0x08, 0xeb, 0xfa } \
21 }
22
23extern EFI_GUID mMpHandOffGuid;
24extern EFI_GUID mMpHandOffConfigGuid;
25
26//
27// The information required to transfer from the PEI phase to the
28// DXE phase is contained within the MP_HAND_OFF and PROCESSOR_HAND_OFF.
29// If the SizeOfPointer (WaitLoopExecutionMode) of both phases are equal,
30// and the APs is not in halt mode,
31// then the APs can be awakened by triggering the start-up
32// signal, rather than using INIT-SIPI-SIPI.
33// To trigger the start-up signal, BSP writes the specified
34// StartupSignalValue to the StartupSignalAddress of each processor.
35// This address is monitored by the APs.
36//
37typedef struct {
38 UINT32 ApicId;
39 UINT32 Health;
40 UINT64 StartupSignalAddress;
41 UINT64 StartupProcedureAddress;
43
44typedef struct {
45 //
46 // The ProcessorIndex indicates the range of processors. If it is set to 0, it signifies
47 // processors from 0 to CpuCount - 1. Multiple instances in the HOB list describe
48 // processors from ProcessorIndex to ProcessorIndex + CpuCount - 1.
49 //
50 UINT32 ProcessorIndex;
51 UINT32 CpuCount;
52 PROCESSOR_HAND_OFF Info[];
54
55typedef struct {
56 UINT32 WaitLoopExecutionMode;
57 UINT32 StartupSignalValue;
59#endif
Definition: Base.h:213