TianoCore EDK2
master
Loading...
Searching...
No Matches
NonDiscoverablePciDeviceIo.h
Go to the documentation of this file.
1
9
#ifndef __NON_DISCOVERABLE_PCI_DEVICE_IO_H__
10
#define __NON_DISCOVERABLE_PCI_DEVICE_IO_H__
11
12
#include <
PiDxe.h
>
13
14
#include <
Library/BaseMemoryLib.h
>
15
#include <
Library/DebugLib.h
>
16
#include <
Library/MemoryAllocationLib.h
>
17
#include <
Library/UefiBootServicesTableLib.h
>
18
#include <
Library/UefiLib.h
>
19
20
#include <
IndustryStandard/Pci.h
>
21
22
#include <
Protocol/ComponentName.h
>
23
#include <
Protocol/NonDiscoverableDevice.h
>
24
#include <
Protocol/Cpu.h
>
25
#include <
Protocol/PciIo.h
>
26
27
#define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', 'D')
28
29
#define NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(PciIoPointer) \
30
CR (PciIoPointer, NON_DISCOVERABLE_PCI_DEVICE, PciIo, \
31
NON_DISCOVERABLE_PCI_DEVICE_SIG)
32
33
#define DEV_SUPPORTED_ATTRIBUTES \
34
(EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
35
36
#define PCI_ID_VENDOR_UNKNOWN 0xffff
37
#define PCI_ID_DEVICE_DONTCARE 0x0000
38
39
extern
EFI_CPU_ARCH_PROTOCOL
*
mCpu
;
40
41
typedef
struct
{
42
//
43
// The linked-list next pointer
44
//
45
LIST_ENTRY
List;
46
//
47
// The address of the uncached allocation
48
//
49
VOID *HostAddress;
50
//
51
// The number of pages in the allocation
52
//
53
UINTN
NumPages;
54
//
55
// The attributes of the allocation
56
//
57
UINT64 Attributes;
58
}
NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION
;
59
60
typedef
struct
{
61
UINT32 Signature;
62
//
63
// The bound non-discoverable device protocol instance
64
//
65
NON_DISCOVERABLE_DEVICE
*Device;
66
//
67
// The exposed PCI I/O protocol instance.
68
//
69
EFI_PCI_IO_PROTOCOL
PciIo;
70
//
71
// The emulated PCI config space of the device. Only the minimally required
72
// items are assigned.
73
//
74
PCI_TYPE00
ConfigSpace;
75
//
76
// The first virtual BAR to assign based on the resources described
77
// by the non-discoverable device.
78
//
79
UINT32 BarOffset;
80
//
81
// The number of virtual BARs we expose based on the number of
82
// resources
83
//
84
UINT32 BarCount;
85
//
86
// The PCI I/O attributes for this device
87
//
88
UINT64 Attributes;
89
//
90
// Whether this device has been enabled
91
//
92
BOOLEAN Enabled;
93
//
94
// Linked list to keep track of uncached allocations performed
95
// on behalf of this device
96
//
97
LIST_ENTRY
UncachedAllocationList;
98
//
99
// Unique ID for this device instance: needed so that we can report unique
100
// segment/bus/device number for each device instance. Note that this number
101
// may change when disconnecting/reconnecting the driver.
102
//
103
UINTN
UniqueId;
104
}
NON_DISCOVERABLE_PCI_DEVICE
;
105
112
VOID
113
InitializePciIoProtocol
(
114
NON_DISCOVERABLE_PCI_DEVICE
*Device
115
);
116
117
extern
EFI_COMPONENT_NAME_PROTOCOL
gComponentName;
118
extern
EFI_COMPONENT_NAME2_PROTOCOL
gComponentName2;
119
120
#endif
UINTN
UINT64 UINTN
Definition:
ProcessorBind.h:112
BaseMemoryLib.h
Cpu.h
Pci.h
DebugLib.h
ComponentName.h
PciIo.h
MemoryAllocationLib.h
InitializePciIoProtocol
VOID InitializePciIoProtocol(NON_DISCOVERABLE_PCI_DEVICE *Device)
Definition:
NonDiscoverablePciDeviceIo.c:1765
mCpu
EFI_CPU_ARCH_PROTOCOL * mCpu
Definition:
ArmCrashDumpDxe.c:15
PiDxe.h
NonDiscoverableDevice.h
UefiBootServicesTableLib.h
UefiLib.h
_EFI_COMPONENT_NAME2_PROTOCOL
Definition:
ComponentName2.h:148
_EFI_COMPONENT_NAME_PROTOCOL
Definition:
ComponentName.h:108
_EFI_CPU_ARCH_PROTOCOL
Definition:
Cpu.h:259
_EFI_PCI_IO_PROTOCOL
Definition:
PciIo.h:516
_LIST_ENTRY
Definition:
Base.h:247
_NON_DISCOVERABLE_DEVICE
Definition:
NonDiscoverableDevice.h:50
NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION
Definition:
NonDiscoverablePciDeviceIo.h:41
NON_DISCOVERABLE_PCI_DEVICE
Definition:
NonDiscoverablePciDeviceIo.h:60
PCI_TYPE00
Definition:
Pci22.h:65
MdeModulePkg
Bus
Pci
NonDiscoverablePciDeviceDxe
NonDiscoverablePciDeviceIo.h
Generated on Fri Nov 15 2024 18:01:08 for TianoCore EDK2 by
1.9.6