- Generated on Fri Nov 15 2024 18:01:27 for TianoCore EDK2 by
1.9.6
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TianoCore EDK2 master
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Go to the source code of this file.
Macros | |
| #define | PL111_REG_LCD_TIMING_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x000) |
| #define | PL111_REG_LCD_TIMING_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x004) |
| #define | PL111_REG_LCD_TIMING_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x008) |
| #define | PL111_REG_LCD_TIMING_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x00C) |
| #define | PL111_REG_LCD_UP_BASE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x010) |
| #define | PL111_REG_LCD_LP_BASE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x014) |
| #define | PL111_REG_LCD_CONTROL ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x018) |
| #define | PL111_REG_LCD_IMSC ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x01C) |
| #define | PL111_REG_LCD_RIS ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x020) |
| #define | PL111_REG_LCD_MIS ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x024) |
| #define | PL111_REG_LCD_ICR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x028) |
| #define | PL111_REG_LCD_UP_CURR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x02C) |
| #define | PL111_REG_LCD_LP_CURR ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x030) |
| #define | PL111_REG_LCD_PALETTE ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x200) |
| #define | PL111_REG_CLCD_PERIPH_ID_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE0) |
| #define | PL111_REG_CLCD_PERIPH_ID_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE4) |
| #define | PL111_REG_CLCD_PERIPH_ID_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE8) |
| #define | PL111_REG_CLCD_PERIPH_ID_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFEC) |
| #define | PL111_REG_CLCD_P_CELL_ID_0 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF0) |
| #define | PL111_REG_CLCD_P_CELL_ID_1 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF4) |
| #define | PL111_REG_CLCD_P_CELL_ID_2 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF8) |
| #define | PL111_REG_CLCD_P_CELL_ID_3 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFFC) |
| #define | PL111_CLCD_PERIPH_ID_0 0x11 |
| #define | PL111_CLCD_PERIPH_ID_1 0x11 |
| #define | PL111_CLCD_PERIPH_ID_2 0x04 |
| #define | PL111_CLCD_PERIPH_ID_3 0x00 |
| #define | PL111_CLCD_P_CELL_ID_0 0x0D |
| #define | PL111_CLCD_P_CELL_ID_1 0xF0 |
| #define | PL111_CLCD_P_CELL_ID_2 0x05 |
| #define | PL111_CLCD_P_CELL_ID_3 0xB1 |
| #define | HOR_AXIS_PANEL(hbp, hfp, hsw, hor_res) (UINT32)(((UINT32)(hbp) << 24) | ((UINT32)(hfp) << 16) | ((UINT32)(hsw) << 8) | (((UINT32)((hor_res)/16)-1) << 2)) |
| #define | VER_AXIS_PANEL(vbp, vfp, vsw, ver_res) (UINT32)(((UINT32)(vbp) << 24) | ((UINT32)(vfp) << 16) | ((UINT32)(vsw) << 10) | ((ver_res)-1)) |
| #define | PL111_BIT_SHIFT_PCD_HI 27 |
| #define | PL111_BIT_SHIFT_BCD 26 |
| #define | PL111_BIT_SHIFT_CPL 16 |
| #define | PL111_BIT_SHIFT_IOE 14 |
| #define | PL111_BIT_SHIFT_IPC 13 |
| #define | PL111_BIT_SHIFT_IHS 12 |
| #define | PL111_BIT_SHIFT_IVS 11 |
| #define | PL111_BIT_SHIFT_ACB 6 |
| #define | PL111_BIT_SHIFT_CLKSEL 5 |
| #define | PL111_BIT_SHIFT_PCD_LO 0 |
| #define | PL111_BCD (1 << 26) |
| #define | PL111_IPC (1 << 13) |
| #define | PL111_IHS (1 << 12) |
| #define | PL111_IVS (1 << 11) |
| #define | CLK_SIG_POLARITY(hor_res) (UINT32)(PL111_BCD | PL111_IPC | PL111_IHS | PL111_IVS | (((hor_res)-1) << 16)) |
| #define | PL111_BIT_SHIFT_LEE 16 |
| #define | PL111_BIT_SHIFT_LED 0 |
| #define | PL111_CTRL_WATERMARK (1 << 16) |
| #define | PL111_CTRL_LCD_V_COMP (1 << 12) |
| #define | PL111_CTRL_LCD_PWR (1 << 11) |
| #define | PL111_CTRL_BEPO (1 << 10) |
| #define | PL111_CTRL_BEBO (1 << 9) |
| #define | PL111_CTRL_BGR (1 << 8) |
| #define | PL111_CTRL_LCD_DUAL (1 << 7) |
| #define | PL111_CTRL_LCD_MONO_8 (1 << 6) |
| #define | PL111_CTRL_LCD_TFT (1 << 5) |
| #define | PL111_CTRL_LCD_BW (1 << 4) |
| #define | PL111_CTRL_LCD_1BPP (0 << 1) |
| #define | PL111_CTRL_LCD_2BPP (1 << 1) |
| #define | PL111_CTRL_LCD_4BPP (2 << 1) |
| #define | PL111_CTRL_LCD_8BPP (3 << 1) |
| #define | PL111_CTRL_LCD_16BPP (4 << 1) |
| #define | PL111_CTRL_LCD_24BPP (5 << 1) |
| #define | PL111_CTRL_LCD_16BPP_565 (6 << 1) |
| #define | PL111_CTRL_LCD_12BPP_444 (7 << 1) |
| #define | PL111_CTRL_LCD_BPP(Bpp) ((Bpp) << 1) |
| #define | PL111_CTRL_LCD_EN 1U |
| #define | PL111_LCD_TIMING_0_HBP(hbp) (((hbp) & 0xFF) << 24) |
| #define | PL111_LCD_TIMING_0_HFP(hfp) (((hfp) & 0xFF) << 16) |
| #define | PL111_LCD_TIMING_0_HSW(hsw) (((hsw) & 0xFF) << 8) |
| #define | PL111_LCD_TIMING_0_PPL(ppl) (((hsw) & 0x3F) << 2) |
| #define | PL111_LCD_TIMING_1_VBP(vbp) (((vbp) & 0xFF) << 24) |
| #define | PL111_LCD_TIMING_1_VFP(vfp) (((vfp) & 0xFF) << 16) |
| #define | PL111_LCD_TIMING_1_VSW(vsw) (((vsw) & 0x3F) << 10) |
| #define | PL111_LCD_TIMING_1_LPP(lpp) ((lpp) & 0xFC) |
| #define | PL111_BIT_MASK_PCD_HI 0xF8000000 |
| #define | PL111_BIT_MASK_BCD 0x04000000 |
| #define | PL111_BIT_MASK_CPL 0x03FF0000 |
| #define | PL111_BIT_MASK_IOE 0x00004000 |
| #define | PL111_BIT_MASK_IPC 0x00002000 |
| #define | PL111_BIT_MASK_IHS 0x00001000 |
| #define | PL111_BIT_MASK_IVS 0x00000800 |
| #define | PL111_BIT_MASK_ACB 0x000007C0 |
| #define | PL111_BIT_MASK_CLKSEL 0x00000020 |
| #define | PL111_BIT_MASK_PCD_LO 0x0000001F |
| #define | PL111_BIT_MASK_LEE 0x00010000 |
| #define | PL111_BIT_MASK_LED 0x0000007F |
Copyright (c) 2011, ARM Ltd. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file PL111Lcd.h.
| #define CLK_SIG_POLARITY | ( | hor_res | ) | (UINT32)(PL111_BCD | PL111_IPC | PL111_IHS | PL111_IVS | (((hor_res)-1) << 16)) |
Definition at line 86 of file PL111Lcd.h.
| #define HOR_AXIS_PANEL | ( | hbp, | |
| hfp, | |||
| hsw, | |||
| hor_res | |||
| ) | (UINT32)(((UINT32)(hbp) << 24) | ((UINT32)(hfp) << 16) | ((UINT32)(hsw) << 8) | (((UINT32)((hor_res)/16)-1) << 2)) |
Definition at line 64 of file PL111Lcd.h.
| #define PL111_BCD (1 << 26) |
Definition at line 81 of file PL111Lcd.h.
| #define PL111_BIT_MASK_ACB 0x000007C0 |
Definition at line 135 of file PL111Lcd.h.
| #define PL111_BIT_MASK_BCD 0x04000000 |
Definition at line 129 of file PL111Lcd.h.
| #define PL111_BIT_MASK_CLKSEL 0x00000020 |
Definition at line 136 of file PL111Lcd.h.
| #define PL111_BIT_MASK_CPL 0x03FF0000 |
Definition at line 130 of file PL111Lcd.h.
| #define PL111_BIT_MASK_IHS 0x00001000 |
Definition at line 133 of file PL111Lcd.h.
| #define PL111_BIT_MASK_IOE 0x00004000 |
Definition at line 131 of file PL111Lcd.h.
| #define PL111_BIT_MASK_IPC 0x00002000 |
Definition at line 132 of file PL111Lcd.h.
| #define PL111_BIT_MASK_IVS 0x00000800 |
Definition at line 134 of file PL111Lcd.h.
| #define PL111_BIT_MASK_LED 0x0000007F |
Definition at line 141 of file PL111Lcd.h.
| #define PL111_BIT_MASK_LEE 0x00010000 |
Definition at line 140 of file PL111Lcd.h.
| #define PL111_BIT_MASK_PCD_HI 0xF8000000 |
Definition at line 128 of file PL111Lcd.h.
| #define PL111_BIT_MASK_PCD_LO 0x0000001F |
Definition at line 137 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_ACB 6 |
Definition at line 77 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_BCD 26 |
Definition at line 71 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_CLKSEL 5 |
Definition at line 78 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_CPL 16 |
Definition at line 72 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_IHS 12 |
Definition at line 75 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_IOE 14 |
Definition at line 73 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_IPC 13 |
Definition at line 74 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_IVS 11 |
Definition at line 76 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_LED 0 |
Definition at line 90 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_LEE 16 |
Definition at line 89 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_PCD_HI 27 |
Definition at line 70 of file PL111Lcd.h.
| #define PL111_BIT_SHIFT_PCD_LO 0 |
Definition at line 79 of file PL111Lcd.h.
| #define PL111_CLCD_P_CELL_ID_0 0x0D |
Definition at line 48 of file PL111Lcd.h.
| #define PL111_CLCD_P_CELL_ID_1 0xF0 |
Definition at line 49 of file PL111Lcd.h.
| #define PL111_CLCD_P_CELL_ID_2 0x05 |
Definition at line 50 of file PL111Lcd.h.
| #define PL111_CLCD_P_CELL_ID_3 0xB1 |
Definition at line 51 of file PL111Lcd.h.
| #define PL111_CLCD_PERIPH_ID_0 0x11 |
Definition at line 44 of file PL111Lcd.h.
| #define PL111_CLCD_PERIPH_ID_1 0x11 |
Definition at line 45 of file PL111Lcd.h.
| #define PL111_CLCD_PERIPH_ID_2 0x04 |
Definition at line 46 of file PL111Lcd.h.
| #define PL111_CLCD_PERIPH_ID_3 0x00 |
Definition at line 47 of file PL111Lcd.h.
| #define PL111_CTRL_BEBO (1 << 9) |
Definition at line 96 of file PL111Lcd.h.
| #define PL111_CTRL_BEPO (1 << 10) |
Definition at line 95 of file PL111Lcd.h.
| #define PL111_CTRL_BGR (1 << 8) |
Definition at line 97 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_12BPP_444 (7 << 1) |
Definition at line 109 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_16BPP (4 << 1) |
Definition at line 106 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_16BPP_565 (6 << 1) |
Definition at line 108 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_1BPP (0 << 1) |
Definition at line 102 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_24BPP (5 << 1) |
Definition at line 107 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_2BPP (1 << 1) |
Definition at line 103 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_4BPP (2 << 1) |
Definition at line 104 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_8BPP (3 << 1) |
Definition at line 105 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_BPP | ( | Bpp | ) | ((Bpp) << 1) |
Definition at line 110 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_BW (1 << 4) |
Definition at line 101 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_DUAL (1 << 7) |
Definition at line 98 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_EN 1U |
Definition at line 111 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_MONO_8 (1 << 6) |
Definition at line 99 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_PWR (1 << 11) |
Definition at line 94 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_TFT (1 << 5) |
Definition at line 100 of file PL111Lcd.h.
| #define PL111_CTRL_LCD_V_COMP (1 << 12) |
Definition at line 93 of file PL111Lcd.h.
| #define PL111_CTRL_WATERMARK (1 << 16) |
Definition at line 92 of file PL111Lcd.h.
| #define PL111_IHS (1 << 12) |
Definition at line 83 of file PL111Lcd.h.
| #define PL111_IPC (1 << 13) |
Definition at line 82 of file PL111Lcd.h.
| #define PL111_IVS (1 << 11) |
Definition at line 84 of file PL111Lcd.h.
| #define PL111_LCD_TIMING_0_HBP | ( | hbp | ) | (((hbp) & 0xFF) << 24) |
Definition at line 116 of file PL111Lcd.h.
| #define PL111_LCD_TIMING_0_HFP | ( | hfp | ) | (((hfp) & 0xFF) << 16) |
Definition at line 117 of file PL111Lcd.h.
| #define PL111_LCD_TIMING_0_HSW | ( | hsw | ) | (((hsw) & 0xFF) << 8) |
Definition at line 118 of file PL111Lcd.h.
| #define PL111_LCD_TIMING_0_PPL | ( | ppl | ) | (((hsw) & 0x3F) << 2) |
Definition at line 119 of file PL111Lcd.h.
| #define PL111_LCD_TIMING_1_LPP | ( | lpp | ) | ((lpp) & 0xFC) |
Definition at line 125 of file PL111Lcd.h.
| #define PL111_LCD_TIMING_1_VBP | ( | vbp | ) | (((vbp) & 0xFF) << 24) |
Definition at line 122 of file PL111Lcd.h.
| #define PL111_LCD_TIMING_1_VFP | ( | vfp | ) | (((vfp) & 0xFF) << 16) |
Definition at line 123 of file PL111Lcd.h.
| #define PL111_LCD_TIMING_1_VSW | ( | vsw | ) | (((vsw) & 0x3F) << 10) |
Definition at line 124 of file PL111Lcd.h.
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| #define VER_AXIS_PANEL | ( | vbp, | |
| vfp, | |||
| vsw, | |||
| ver_res | |||
| ) | (UINT32)(((UINT32)(vbp) << 24) | ((UINT32)(vfp) << 16) | ((UINT32)(vsw) << 10) | ((ver_res)-1)) |
Definition at line 67 of file PL111Lcd.h.
1.9.6