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PciCf8Lib.c
Go to the documentation of this file.
1
10#include <Base.h>
11
12#include <Library/BaseLib.h>
13#include <Library/PciCf8Lib.h>
14#include <Library/IoLib.h>
15#include <Library/DebugLib.h>
16
17//
18// Declare I/O Ports used to perform PCI Confguration Cycles
19//
20#define PCI_CONFIGURATION_ADDRESS_PORT 0xCF8
21#define PCI_CONFIGURATION_DATA_PORT 0xCFC
22
42#define PCI_TO_CF8_ADDRESS(A) \
43 ((UINT32) ((((A) >> 4) & 0x00ffff00) | ((A) & 0xfc) | 0x80000000))
44
53#define ASSERT_INVALID_PCI_ADDRESS(A, M) \
54 ASSERT (((A) & (~0xffff0ff | (M))) == 0)
55
78RETURN_STATUS
79EFIAPI
80PciCf8RegisterForRuntimeAccess (
81 IN UINTN Address
82 )
83{
84 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
85 return RETURN_SUCCESS;
86}
87
104UINT8
105EFIAPI
106PciCf8Read8 (
107 IN UINTN Address
108 )
109{
110 BOOLEAN InterruptState;
111 UINT32 AddressPort;
112 UINT8 Result;
113
114 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
115 InterruptState = SaveAndDisableInterrupts ();
116 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
117 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
118 Result = IoRead8 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3));
119 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
120 SetInterruptState (InterruptState);
121 return Result;
122}
123
141UINT8
142EFIAPI
143PciCf8Write8 (
144 IN UINTN Address,
145 IN UINT8 Value
146 )
147{
148 BOOLEAN InterruptState;
149 UINT32 AddressPort;
150 UINT8 Result;
151
152 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
153 InterruptState = SaveAndDisableInterrupts ();
154 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
155 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
156 Result = IoWrite8 (
157 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
158 Value
159 );
160 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
161 SetInterruptState (InterruptState);
162 return Result;
163}
164
186UINT8
187EFIAPI
188PciCf8Or8 (
189 IN UINTN Address,
190 IN UINT8 OrData
191 )
192{
193 BOOLEAN InterruptState;
194 UINT32 AddressPort;
195 UINT8 Result;
196
197 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
198 InterruptState = SaveAndDisableInterrupts ();
199 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
200 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
201 Result = IoOr8 (
202 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
203 OrData
204 );
205 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
206 SetInterruptState (InterruptState);
207 return Result;
208}
209
231UINT8
232EFIAPI
233PciCf8And8 (
234 IN UINTN Address,
235 IN UINT8 AndData
236 )
237{
238 BOOLEAN InterruptState;
239 UINT32 AddressPort;
240 UINT8 Result;
241
242 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
243 InterruptState = SaveAndDisableInterrupts ();
244 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
245 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
246 Result = IoAnd8 (
247 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
248 AndData
249 );
250 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
251 SetInterruptState (InterruptState);
252 return Result;
253}
254
278UINT8
279EFIAPI
280PciCf8AndThenOr8 (
281 IN UINTN Address,
282 IN UINT8 AndData,
283 IN UINT8 OrData
284 )
285{
286 BOOLEAN InterruptState;
287 UINT32 AddressPort;
288 UINT8 Result;
289
290 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
291 InterruptState = SaveAndDisableInterrupts ();
292 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
293 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
294 Result = IoAndThenOr8 (
295 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
296 AndData,
297 OrData
298 );
299 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
300 SetInterruptState (InterruptState);
301 return Result;
302}
303
326UINT8
327EFIAPI
328PciCf8BitFieldRead8 (
329 IN UINTN Address,
330 IN UINTN StartBit,
331 IN UINTN EndBit
332 )
333{
334 BOOLEAN InterruptState;
335 UINT32 AddressPort;
336 UINT8 Result;
337
338 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
339 InterruptState = SaveAndDisableInterrupts ();
340 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
341 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
342 Result = IoBitFieldRead8 (
343 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
344 StartBit,
345 EndBit
346 );
347 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
348 SetInterruptState (InterruptState);
349 return Result;
350}
351
377UINT8
378EFIAPI
379PciCf8BitFieldWrite8 (
380 IN UINTN Address,
381 IN UINTN StartBit,
382 IN UINTN EndBit,
383 IN UINT8 Value
384 )
385{
386 BOOLEAN InterruptState;
387 UINT32 AddressPort;
388 UINT8 Result;
389
390 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
391 InterruptState = SaveAndDisableInterrupts ();
392 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
393 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
394 Result = IoBitFieldWrite8 (
395 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
396 StartBit,
397 EndBit,
398 Value
399 );
400 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
401 SetInterruptState (InterruptState);
402 return Result;
403}
404
433UINT8
434EFIAPI
435PciCf8BitFieldOr8 (
436 IN UINTN Address,
437 IN UINTN StartBit,
438 IN UINTN EndBit,
439 IN UINT8 OrData
440 )
441{
442 BOOLEAN InterruptState;
443 UINT32 AddressPort;
444 UINT8 Result;
445
446 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
447 InterruptState = SaveAndDisableInterrupts ();
448 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
449 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
450 Result = IoBitFieldOr8 (
451 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
452 StartBit,
453 EndBit,
454 OrData
455 );
456 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
457 SetInterruptState (InterruptState);
458 return Result;
459}
460
489UINT8
490EFIAPI
491PciCf8BitFieldAnd8 (
492 IN UINTN Address,
493 IN UINTN StartBit,
494 IN UINTN EndBit,
495 IN UINT8 AndData
496 )
497{
498 BOOLEAN InterruptState;
499 UINT32 AddressPort;
500 UINT8 Result;
501
502 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
503 InterruptState = SaveAndDisableInterrupts ();
504 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
505 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
506 Result = IoBitFieldAnd8 (
507 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
508 StartBit,
509 EndBit,
510 AndData
511 );
512 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
513 SetInterruptState (InterruptState);
514 return Result;
515}
516
549UINT8
550EFIAPI
551PciCf8BitFieldAndThenOr8 (
552 IN UINTN Address,
553 IN UINTN StartBit,
554 IN UINTN EndBit,
555 IN UINT8 AndData,
556 IN UINT8 OrData
557 )
558{
559 BOOLEAN InterruptState;
560 UINT32 AddressPort;
561 UINT8 Result;
562
563 ASSERT_INVALID_PCI_ADDRESS (Address, 0);
564 InterruptState = SaveAndDisableInterrupts ();
565 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
566 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
567 Result = IoBitFieldAndThenOr8 (
568 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),
569 StartBit,
570 EndBit,
571 AndData,
572 OrData
573 );
574 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
575 SetInterruptState (InterruptState);
576 return Result;
577}
578
596UINT16
597EFIAPI
598PciCf8Read16 (
599 IN UINTN Address
600 )
601{
602 BOOLEAN InterruptState;
603 UINT32 AddressPort;
604 UINT16 Result;
605
606 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
607 InterruptState = SaveAndDisableInterrupts ();
608 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
609 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
610 Result = IoRead16 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2));
611 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
612 SetInterruptState (InterruptState);
613 return Result;
614}
615
634UINT16
635EFIAPI
636PciCf8Write16 (
637 IN UINTN Address,
638 IN UINT16 Value
639 )
640{
641 BOOLEAN InterruptState;
642 UINT32 AddressPort;
643 UINT16 Result;
644
645 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
646 InterruptState = SaveAndDisableInterrupts ();
647 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
648 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
649 Result = IoWrite16 (
650 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
651 Value
652 );
653 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
654 SetInterruptState (InterruptState);
655 return Result;
656}
657
680UINT16
681EFIAPI
682PciCf8Or16 (
683 IN UINTN Address,
684 IN UINT16 OrData
685 )
686{
687 BOOLEAN InterruptState;
688 UINT32 AddressPort;
689 UINT16 Result;
690
691 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
692 InterruptState = SaveAndDisableInterrupts ();
693 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
694 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
695 Result = IoOr16 (
696 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
697 OrData
698 );
699 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
700 SetInterruptState (InterruptState);
701 return Result;
702}
703
726UINT16
727EFIAPI
728PciCf8And16 (
729 IN UINTN Address,
730 IN UINT16 AndData
731 )
732{
733 BOOLEAN InterruptState;
734 UINT32 AddressPort;
735 UINT16 Result;
736
737 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
738 InterruptState = SaveAndDisableInterrupts ();
739 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
740 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
741 Result = IoAnd16 (
742 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
743 AndData
744 );
745 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
746 SetInterruptState (InterruptState);
747 return Result;
748}
749
774UINT16
775EFIAPI
776PciCf8AndThenOr16 (
777 IN UINTN Address,
778 IN UINT16 AndData,
779 IN UINT16 OrData
780 )
781{
782 BOOLEAN InterruptState;
783 UINT32 AddressPort;
784 UINT16 Result;
785
786 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
787 InterruptState = SaveAndDisableInterrupts ();
788 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
789 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
790 Result = IoAndThenOr16 (
791 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
792 AndData,
793 OrData
794 );
795 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
796 SetInterruptState (InterruptState);
797 return Result;
798}
799
823UINT16
824EFIAPI
825PciCf8BitFieldRead16 (
826 IN UINTN Address,
827 IN UINTN StartBit,
828 IN UINTN EndBit
829 )
830{
831 BOOLEAN InterruptState;
832 UINT32 AddressPort;
833 UINT16 Result;
834
835 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
836 InterruptState = SaveAndDisableInterrupts ();
837 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
838 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
839 Result = IoBitFieldRead16 (
840 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
841 StartBit,
842 EndBit
843 );
844 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
845 SetInterruptState (InterruptState);
846 return Result;
847}
848
875UINT16
876EFIAPI
877PciCf8BitFieldWrite16 (
878 IN UINTN Address,
879 IN UINTN StartBit,
880 IN UINTN EndBit,
881 IN UINT16 Value
882 )
883{
884 BOOLEAN InterruptState;
885 UINT32 AddressPort;
886 UINT16 Result;
887
888 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
889 InterruptState = SaveAndDisableInterrupts ();
890 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
891 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
892 Result = IoBitFieldWrite16 (
893 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
894 StartBit,
895 EndBit,
896 Value
897 );
898 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
899 SetInterruptState (InterruptState);
900 return Result;
901}
902
932UINT16
933EFIAPI
934PciCf8BitFieldOr16 (
935 IN UINTN Address,
936 IN UINTN StartBit,
937 IN UINTN EndBit,
938 IN UINT16 OrData
939 )
940{
941 BOOLEAN InterruptState;
942 UINT32 AddressPort;
943 UINT16 Result;
944
945 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
946 InterruptState = SaveAndDisableInterrupts ();
947 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
948 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
949 Result = IoBitFieldOr16 (
950 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
951 StartBit,
952 EndBit,
953 OrData
954 );
955 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
956 SetInterruptState (InterruptState);
957 return Result;
958}
959
989UINT16
990EFIAPI
991PciCf8BitFieldAnd16 (
992 IN UINTN Address,
993 IN UINTN StartBit,
994 IN UINTN EndBit,
995 IN UINT16 AndData
996 )
997{
998 BOOLEAN InterruptState;
999 UINT32 AddressPort;
1000 UINT16 Result;
1001
1002 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
1003 InterruptState = SaveAndDisableInterrupts ();
1004 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1005 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1006 Result = IoBitFieldAnd16 (
1007 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
1008 StartBit,
1009 EndBit,
1010 AndData
1011 );
1012 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1013 SetInterruptState (InterruptState);
1014 return Result;
1015}
1016
1050UINT16
1051EFIAPI
1052PciCf8BitFieldAndThenOr16 (
1053 IN UINTN Address,
1054 IN UINTN StartBit,
1055 IN UINTN EndBit,
1056 IN UINT16 AndData,
1057 IN UINT16 OrData
1058 )
1059{
1060 BOOLEAN InterruptState;
1061 UINT32 AddressPort;
1062 UINT16 Result;
1063
1064 ASSERT_INVALID_PCI_ADDRESS (Address, 1);
1065 InterruptState = SaveAndDisableInterrupts ();
1066 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1067 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1068 Result = IoBitFieldAndThenOr16 (
1069 PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),
1070 StartBit,
1071 EndBit,
1072 AndData,
1073 OrData
1074 );
1075 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1076 SetInterruptState (InterruptState);
1077 return Result;
1078}
1079
1097UINT32
1098EFIAPI
1099PciCf8Read32 (
1100 IN UINTN Address
1101 )
1102{
1103 BOOLEAN InterruptState;
1104 UINT32 AddressPort;
1105 UINT32 Result;
1106
1107 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1108 InterruptState = SaveAndDisableInterrupts ();
1109 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1110 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1111 Result = IoRead32 (PCI_CONFIGURATION_DATA_PORT);
1112 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1113 SetInterruptState (InterruptState);
1114 return Result;
1115}
1116
1135UINT32
1136EFIAPI
1137PciCf8Write32 (
1138 IN UINTN Address,
1139 IN UINT32 Value
1140 )
1141{
1142 BOOLEAN InterruptState;
1143 UINT32 AddressPort;
1144 UINT32 Result;
1145
1146 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1147 InterruptState = SaveAndDisableInterrupts ();
1148 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1149 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1150 Result = IoWrite32 (
1151 PCI_CONFIGURATION_DATA_PORT,
1152 Value
1153 );
1154 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1155 SetInterruptState (InterruptState);
1156 return Result;
1157}
1158
1181UINT32
1182EFIAPI
1183PciCf8Or32 (
1184 IN UINTN Address,
1185 IN UINT32 OrData
1186 )
1187{
1188 BOOLEAN InterruptState;
1189 UINT32 AddressPort;
1190 UINT32 Result;
1191
1192 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1193 InterruptState = SaveAndDisableInterrupts ();
1194 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1195 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1196 Result = IoOr32 (
1197 PCI_CONFIGURATION_DATA_PORT,
1198 OrData
1199 );
1200 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1201 SetInterruptState (InterruptState);
1202 return Result;
1203}
1204
1227UINT32
1228EFIAPI
1229PciCf8And32 (
1230 IN UINTN Address,
1231 IN UINT32 AndData
1232 )
1233{
1234 BOOLEAN InterruptState;
1235 UINT32 AddressPort;
1236 UINT32 Result;
1237
1238 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1239 InterruptState = SaveAndDisableInterrupts ();
1240 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1241 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1242 Result = IoAnd32 (
1243 PCI_CONFIGURATION_DATA_PORT,
1244 AndData
1245 );
1246 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1247 SetInterruptState (InterruptState);
1248 return Result;
1249}
1250
1275UINT32
1276EFIAPI
1277PciCf8AndThenOr32 (
1278 IN UINTN Address,
1279 IN UINT32 AndData,
1280 IN UINT32 OrData
1281 )
1282{
1283 BOOLEAN InterruptState;
1284 UINT32 AddressPort;
1285 UINT32 Result;
1286
1287 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1288 InterruptState = SaveAndDisableInterrupts ();
1289 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1290 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1291 Result = IoAndThenOr32 (
1292 PCI_CONFIGURATION_DATA_PORT,
1293 AndData,
1294 OrData
1295 );
1296 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1297 SetInterruptState (InterruptState);
1298 return Result;
1299}
1300
1324UINT32
1325EFIAPI
1326PciCf8BitFieldRead32 (
1327 IN UINTN Address,
1328 IN UINTN StartBit,
1329 IN UINTN EndBit
1330 )
1331{
1332 BOOLEAN InterruptState;
1333 UINT32 AddressPort;
1334 UINT32 Result;
1335
1336 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1337 InterruptState = SaveAndDisableInterrupts ();
1338 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1339 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1340 Result = IoBitFieldRead32 (
1341 PCI_CONFIGURATION_DATA_PORT,
1342 StartBit,
1343 EndBit
1344 );
1345 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1346 SetInterruptState (InterruptState);
1347 return Result;
1348}
1349
1376UINT32
1377EFIAPI
1378PciCf8BitFieldWrite32 (
1379 IN UINTN Address,
1380 IN UINTN StartBit,
1381 IN UINTN EndBit,
1382 IN UINT32 Value
1383 )
1384{
1385 BOOLEAN InterruptState;
1386 UINT32 AddressPort;
1387 UINT32 Result;
1388
1389 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1390 InterruptState = SaveAndDisableInterrupts ();
1391 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1392 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1393 Result = IoBitFieldWrite32 (
1394 PCI_CONFIGURATION_DATA_PORT,
1395 StartBit,
1396 EndBit,
1397 Value
1398 );
1399 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1400 SetInterruptState (InterruptState);
1401 return Result;
1402}
1403
1433UINT32
1434EFIAPI
1435PciCf8BitFieldOr32 (
1436 IN UINTN Address,
1437 IN UINTN StartBit,
1438 IN UINTN EndBit,
1439 IN UINT32 OrData
1440 )
1441{
1442 BOOLEAN InterruptState;
1443 UINT32 AddressPort;
1444 UINT32 Result;
1445
1446 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1447 InterruptState = SaveAndDisableInterrupts ();
1448 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1449 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1450 Result = IoBitFieldOr32 (
1451 PCI_CONFIGURATION_DATA_PORT,
1452 StartBit,
1453 EndBit,
1454 OrData
1455 );
1456 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1457 SetInterruptState (InterruptState);
1458 return Result;
1459}
1460
1490UINT32
1491EFIAPI
1492PciCf8BitFieldAnd32 (
1493 IN UINTN Address,
1494 IN UINTN StartBit,
1495 IN UINTN EndBit,
1496 IN UINT32 AndData
1497 )
1498{
1499 BOOLEAN InterruptState;
1500 UINT32 AddressPort;
1501 UINT32 Result;
1502
1503 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1504 InterruptState = SaveAndDisableInterrupts ();
1505 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1506 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1507 Result = IoBitFieldAnd32 (
1508 PCI_CONFIGURATION_DATA_PORT,
1509 StartBit,
1510 EndBit,
1511 AndData
1512 );
1513 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1514 SetInterruptState (InterruptState);
1515 return Result;
1516}
1517
1551UINT32
1552EFIAPI
1553PciCf8BitFieldAndThenOr32 (
1554 IN UINTN Address,
1555 IN UINTN StartBit,
1556 IN UINTN EndBit,
1557 IN UINT32 AndData,
1558 IN UINT32 OrData
1559 )
1560{
1561 BOOLEAN InterruptState;
1562 UINT32 AddressPort;
1563 UINT32 Result;
1564
1565 ASSERT_INVALID_PCI_ADDRESS (Address, 3);
1566 InterruptState = SaveAndDisableInterrupts ();
1567 AddressPort = IoRead32 (PCI_CONFIGURATION_ADDRESS_PORT);
1568 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));
1569 Result = IoBitFieldAndThenOr32 (
1570 PCI_CONFIGURATION_DATA_PORT,
1571 StartBit,
1572 EndBit,
1573 AndData,
1574 OrData
1575 );
1576 IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, AddressPort);
1577 SetInterruptState (InterruptState);
1578 return Result;
1579}
1580
1605UINTN
1606EFIAPI
1607PciCf8ReadBuffer (
1608 IN UINTN StartAddress,
1609 IN UINTN Size,
1610 OUT VOID *Buffer
1611 )
1612{
1613 UINTN ReturnValue;
1614
1615 ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);
1616 ASSERT (((StartAddress & 0xFFF) + Size) <= 0x100);
1617
1618 if (Size == 0) {
1619 return Size;
1620 }
1621
1622 ASSERT (Buffer != NULL);
1623
1624 //
1625 // Save Size for return
1626 //
1627 ReturnValue = Size;
1628
1629 if ((StartAddress & 1) != 0) {
1630 //
1631 // Read a byte if StartAddress is byte aligned
1632 //
1633 *(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);
1634 StartAddress += sizeof (UINT8);
1635 Size -= sizeof (UINT8);
1636 Buffer = (UINT8 *)Buffer + 1;
1637 }
1638
1639 if ((Size >= sizeof (UINT16)) && ((StartAddress & 2) != 0)) {
1640 //
1641 // Read a word if StartAddress is word aligned
1642 //
1643 WriteUnaligned16 ((UINT16 *)Buffer, (UINT16)PciCf8Read16 (StartAddress));
1644
1645 StartAddress += sizeof (UINT16);
1646 Size -= sizeof (UINT16);
1647 Buffer = (UINT16 *)Buffer + 1;
1648 }
1649
1650 while (Size >= sizeof (UINT32)) {
1651 //
1652 // Read as many double words as possible
1653 //
1654 WriteUnaligned32 ((UINT32 *)Buffer, (UINT32)PciCf8Read32 (StartAddress));
1655 StartAddress += sizeof (UINT32);
1656 Size -= sizeof (UINT32);
1657 Buffer = (UINT32 *)Buffer + 1;
1658 }
1659
1660 if (Size >= sizeof (UINT16)) {
1661 //
1662 // Read the last remaining word if exist
1663 //
1664 WriteUnaligned16 ((UINT16 *)Buffer, (UINT16)PciCf8Read16 (StartAddress));
1665 StartAddress += sizeof (UINT16);
1666 Size -= sizeof (UINT16);
1667 Buffer = (UINT16 *)Buffer + 1;
1668 }
1669
1670 if (Size >= sizeof (UINT8)) {
1671 //
1672 // Read the last remaining byte if exist
1673 //
1674 *(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);
1675 }
1676
1677 return ReturnValue;
1678}
1679
1705UINTN
1706EFIAPI
1707PciCf8WriteBuffer (
1708 IN UINTN StartAddress,
1709 IN UINTN Size,
1710 IN VOID *Buffer
1711 )
1712{
1713 UINTN ReturnValue;
1714
1715 ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);
1716 ASSERT (((StartAddress & 0xFFF) + Size) <= 0x100);
1717
1718 if (Size == 0) {
1719 return 0;
1720 }
1721
1722 ASSERT (Buffer != NULL);
1723
1724 //
1725 // Save Size for return
1726 //
1727 ReturnValue = Size;
1728
1729 if ((StartAddress & 1) != 0) {
1730 //
1731 // Write a byte if StartAddress is byte aligned
1732 //
1733 PciCf8Write8 (StartAddress, *(UINT8 *)Buffer);
1734 StartAddress += sizeof (UINT8);
1735 Size -= sizeof (UINT8);
1736 Buffer = (UINT8 *)Buffer + 1;
1737 }
1738
1739 if ((Size >= sizeof (UINT16)) && ((StartAddress & 2) != 0)) {
1740 //
1741 // Write a word if StartAddress is word aligned
1742 //
1743 PciCf8Write16 (StartAddress, ReadUnaligned16 ((UINT16 *)Buffer));
1744 StartAddress += sizeof (UINT16);
1745 Size -= sizeof (UINT16);
1746 Buffer = (UINT16 *)Buffer + 1;
1747 }
1748
1749 while (Size >= sizeof (UINT32)) {
1750 //
1751 // Write as many double words as possible
1752 //
1753 PciCf8Write32 (StartAddress, ReadUnaligned32 ((UINT32 *)Buffer));
1754 StartAddress += sizeof (UINT32);
1755 Size -= sizeof (UINT32);
1756 Buffer = (UINT32 *)Buffer + 1;
1757 }
1758
1759 if (Size >= sizeof (UINT16)) {
1760 //
1761 // Write the last remaining word if exist
1762 //
1763 PciCf8Write16 (StartAddress, ReadUnaligned16 ((UINT16 *)Buffer));
1764 StartAddress += sizeof (UINT16);
1765 Size -= sizeof (UINT16);
1766 Buffer = (UINT16 *)Buffer + 1;
1767 }
1768
1769 if (Size >= sizeof (UINT8)) {
1770 //
1771 // Write the last remaining byte if exist
1772 //
1773 PciCf8Write8 (StartAddress, *(UINT8 *)Buffer);
1774 }
1775
1776 return ReturnValue;
1777}
UINTN
UINT64 UINTN
Definition: ProcessorBind.h:112
SetInterruptState
BOOLEAN EFIAPI SetInterruptState(IN BOOLEAN InterruptState)
Definition: Cpu.c:48
SaveAndDisableInterrupts
BOOLEAN EFIAPI SaveAndDisableInterrupts(VOID)
Definition: Cpu.c:21
ReadUnaligned16
UINT16 EFIAPI ReadUnaligned16(IN CONST UINT16 *Buffer)
Definition: Unaligned.c:29
WriteUnaligned32
UINT32 EFIAPI WriteUnaligned32(OUT UINT32 *Buffer, IN UINT32 Value)
Definition: Unaligned.c:177
WriteUnaligned16
UINT16 EFIAPI WriteUnaligned16(OUT UINT16 *Buffer, IN UINT16 Value)
Definition: Unaligned.c:61
ReadUnaligned32
UINT32 EFIAPI ReadUnaligned32(IN CONST UINT32 *Buffer)
Definition: Unaligned.c:145
IoWrite8
UINT8 EFIAPI IoWrite8(IN UINTN Port, IN UINT8 Value)
Definition: IoLibArmVirt.c:200
IoBitFieldWrite8
UINT8 EFIAPI IoBitFieldWrite8(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value)
Definition: IoHighLevel.c:163
IoBitFieldAndThenOr8
UINT8 EFIAPI IoBitFieldAndThenOr8(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData, IN UINT8 OrData)
Definition: IoHighLevel.c:290
IoAndThenOr16
UINT16 EFIAPI IoAndThenOr16(IN UINTN Port, IN UINT16 AndData, IN UINT16 OrData)
Definition: IoHighLevel.c:385
IoBitFieldAnd32
UINT32 EFIAPI IoBitFieldAnd32(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData)
Definition: IoHighLevel.c:830
IoBitFieldWrite32
UINT32 EFIAPI IoBitFieldWrite32(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 Value)
Definition: IoHighLevel.c:746
IoOr16
UINT16 EFIAPI IoOr16(IN UINTN Port, IN UINT16 OrData)
Definition: IoHighLevel.c:325
IoBitFieldAnd16
UINT16 EFIAPI IoBitFieldAnd16(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData)
Definition: IoHighLevel.c:537
IoBitFieldOr16
UINT16 EFIAPI IoBitFieldOr16(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 OrData)
Definition: IoHighLevel.c:495
IoBitFieldOr8
UINT8 EFIAPI IoBitFieldOr8(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData)
Definition: IoHighLevel.c:204
IoAnd8
UINT8 EFIAPI IoAnd8(IN UINTN Port, IN UINT8 AndData)
Definition: IoHighLevel.c:68
IoBitFieldAnd8
UINT8 EFIAPI IoBitFieldAnd8(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData)
Definition: IoHighLevel.c:245
IoOr32
UINT32 EFIAPI IoOr32(IN UINTN Port, IN UINT32 OrData)
Definition: IoHighLevel.c:618
IoBitFieldWrite16
UINT16 EFIAPI IoBitFieldWrite16(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 Value)
Definition: IoHighLevel.c:453
IoBitFieldRead16
UINT16 EFIAPI IoBitFieldRead16(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit)
Definition: IoHighLevel.c:417
IoAndThenOr32
UINT32 EFIAPI IoAndThenOr32(IN UINTN Port, IN UINT32 AndData, IN UINT32 OrData)
Definition: IoHighLevel.c:678
IoBitFieldRead32
UINT32 EFIAPI IoBitFieldRead32(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit)
Definition: IoHighLevel.c:710
IoBitFieldAndThenOr32
UINT32 EFIAPI IoBitFieldAndThenOr32(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData)
Definition: IoHighLevel.c:876
IoBitFieldOr32
UINT32 EFIAPI IoBitFieldOr32(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData)
Definition: IoHighLevel.c:788
IoAnd16
UINT16 EFIAPI IoAnd16(IN UINTN Port, IN UINT16 AndData)
Definition: IoHighLevel.c:354
IoBitFieldRead8
UINT8 EFIAPI IoBitFieldRead8(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit)
Definition: IoHighLevel.c:129
IoAnd32
UINT32 EFIAPI IoAnd32(IN UINTN Port, IN UINT32 AndData)
Definition: IoHighLevel.c:647
IoRead8
UINT8 EFIAPI IoRead8(IN UINTN Port)
Definition: IoLibArmVirt.c:175
IoAndThenOr8
UINT8 EFIAPI IoAndThenOr8(IN UINTN Port, IN UINT8 AndData, IN UINT8 OrData)
Definition: IoHighLevel.c:98
IoBitFieldAndThenOr16
UINT16 EFIAPI IoBitFieldAndThenOr16(IN UINTN Port, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData)
Definition: IoHighLevel.c:583
IoOr8
UINT8 EFIAPI IoOr8(IN UINTN Port, IN UINT8 OrData)
Definition: IoHighLevel.c:40
IoRead16
UINT16 EFIAPI IoRead16(IN UINTN Port)
Definition: IoLibArmVirt.c:225
IoRead32
UINT32 EFIAPI IoRead32(IN UINTN Port)
Definition: IoLibArmVirt.c:275
IoWrite32
UINT32 EFIAPI IoWrite32(IN UINTN Port, IN UINT32 Value)
Definition: IoLibArmVirt.c:300
IoWrite16
UINT16 EFIAPI IoWrite16(IN UINTN Port, IN UINT16 Value)
Definition: IoLibArmVirt.c:250
NULL
#define NULL
Definition: Base.h:319
RETURN_SUCCESS
#define RETURN_SUCCESS
Definition: Base.h:1066
IN
#define IN
Definition: Base.h:279
OUT
#define OUT
Definition: Base.h:284
PciCf8Read8
UINT8 EFIAPI PciCf8Read8(IN UINTN Address)
Definition: PciCf8Lib.c:106
PciCf8BitFieldOr32
UINT32 EFIAPI PciCf8BitFieldOr32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData)
Definition: PciCf8Lib.c:1435
PciCf8BitFieldRead32
UINT32 EFIAPI PciCf8BitFieldRead32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
Definition: PciCf8Lib.c:1326
PciCf8BitFieldWrite32
UINT32 EFIAPI PciCf8BitFieldWrite32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 Value)
Definition: PciCf8Lib.c:1378
PciCf8And8
UINT8 EFIAPI PciCf8And8(IN UINTN Address, IN UINT8 AndData)
Definition: PciCf8Lib.c:233
PciCf8Write32
UINT32 EFIAPI PciCf8Write32(IN UINTN Address, IN UINT32 Value)
Definition: PciCf8Lib.c:1137
PciCf8And32
UINT32 EFIAPI PciCf8And32(IN UINTN Address, IN UINT32 AndData)
Definition: PciCf8Lib.c:1229
PciCf8WriteBuffer
UINTN EFIAPI PciCf8WriteBuffer(IN UINTN StartAddress, IN UINTN Size, IN VOID *Buffer)
Definition: PciCf8Lib.c:1707
PciCf8BitFieldWrite8
UINT8 EFIAPI PciCf8BitFieldWrite8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value)
Definition: PciCf8Lib.c:379
PciCf8Or32
UINT32 EFIAPI PciCf8Or32(IN UINTN Address, IN UINT32 OrData)
Definition: PciCf8Lib.c:1183
PciCf8Read32
UINT32 EFIAPI PciCf8Read32(IN UINTN Address)
Definition: PciCf8Lib.c:1099
PciCf8AndThenOr8
UINT8 EFIAPI PciCf8AndThenOr8(IN UINTN Address, IN UINT8 AndData, IN UINT8 OrData)
Definition: PciCf8Lib.c:280
PCI_TO_CF8_ADDRESS
#define PCI_TO_CF8_ADDRESS(A)
Definition: PciCf8Lib.c:42
PciCf8BitFieldRead8
UINT8 EFIAPI PciCf8BitFieldRead8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
Definition: PciCf8Lib.c:328
PciCf8Or8
UINT8 EFIAPI PciCf8Or8(IN UINTN Address, IN UINT8 OrData)
Definition: PciCf8Lib.c:188
PciCf8BitFieldOr16
UINT16 EFIAPI PciCf8BitFieldOr16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 OrData)
Definition: PciCf8Lib.c:934
ASSERT_INVALID_PCI_ADDRESS
#define ASSERT_INVALID_PCI_ADDRESS(A, M)
Definition: PciCf8Lib.c:53
PciCf8Write16
UINT16 EFIAPI PciCf8Write16(IN UINTN Address, IN UINT16 Value)
Definition: PciCf8Lib.c:636
PciCf8And16
UINT16 EFIAPI PciCf8And16(IN UINTN Address, IN UINT16 AndData)
Definition: PciCf8Lib.c:728
PciCf8BitFieldAndThenOr8
UINT8 EFIAPI PciCf8BitFieldAndThenOr8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData, IN UINT8 OrData)
Definition: PciCf8Lib.c:551
PciCf8Write8
UINT8 EFIAPI PciCf8Write8(IN UINTN Address, IN UINT8 Value)
Definition: PciCf8Lib.c:143
PciCf8AndThenOr32
UINT32 EFIAPI PciCf8AndThenOr32(IN UINTN Address, IN UINT32 AndData, IN UINT32 OrData)
Definition: PciCf8Lib.c:1277
PciCf8RegisterForRuntimeAccess
RETURN_STATUS EFIAPI PciCf8RegisterForRuntimeAccess(IN UINTN Address)
Definition: PciCf8Lib.c:80
PciCf8BitFieldAndThenOr32
UINT32 EFIAPI PciCf8BitFieldAndThenOr32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData)
Definition: PciCf8Lib.c:1553
PciCf8Read16
UINT16 EFIAPI PciCf8Read16(IN UINTN Address)
Definition: PciCf8Lib.c:598
PciCf8Or16
UINT16 EFIAPI PciCf8Or16(IN UINTN Address, IN UINT16 OrData)
Definition: PciCf8Lib.c:682
PciCf8BitFieldAndThenOr16
UINT16 EFIAPI PciCf8BitFieldAndThenOr16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData)
Definition: PciCf8Lib.c:1052
PciCf8BitFieldAnd16
UINT16 EFIAPI PciCf8BitFieldAnd16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData)
Definition: PciCf8Lib.c:991
PciCf8BitFieldAnd8
UINT8 EFIAPI PciCf8BitFieldAnd8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 AndData)
Definition: PciCf8Lib.c:491
PciCf8AndThenOr16
UINT16 EFIAPI PciCf8AndThenOr16(IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData)
Definition: PciCf8Lib.c:776
PciCf8BitFieldWrite16
UINT16 EFIAPI PciCf8BitFieldWrite16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 Value)
Definition: PciCf8Lib.c:877
PciCf8BitFieldOr8
UINT8 EFIAPI PciCf8BitFieldOr8(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 OrData)
Definition: PciCf8Lib.c:435
PciCf8ReadBuffer
UINTN EFIAPI PciCf8ReadBuffer(IN UINTN StartAddress, IN UINTN Size, OUT VOID *Buffer)
Definition: PciCf8Lib.c:1607
PciCf8BitFieldAnd32
UINT32 EFIAPI PciCf8BitFieldAnd32(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData)
Definition: PciCf8Lib.c:1492
PciCf8BitFieldRead16
UINT16 EFIAPI PciCf8BitFieldRead16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit)
Definition: PciCf8Lib.c:825