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Macros | |
#define | EFI_PCI_COMMAND_BITS_OWNED |
#define | EFI_PCI_BRIDGE_CONTROL_BITS_OWNED |
#define | EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED |
#define | EFI_GET_REGISTER 1 |
#define | EFI_SET_REGISTER 2 |
#define | EFI_ENABLE_REGISTER 3 |
#define | EFI_DISABLE_REGISTER 4 |
#define | PCI_READ_COMMAND_REGISTER(a, b) PciOperateRegister (a, 0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b) |
#define | PCI_SET_COMMAND_REGISTER(a, b) PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL) |
#define | PCI_ENABLE_COMMAND_REGISTER(a, b) PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL) |
#define | PCI_DISABLE_COMMAND_REGISTER(a, b) PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL) |
#define | PCI_READ_BRIDGE_CONTROL_REGISTER(a, b) PciOperateRegister (a, 0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b) |
#define | PCI_SET_BRIDGE_CONTROL_REGISTER(a, b) PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL) |
#define | PCI_ENABLE_BRIDGE_CONTROL_REGISTER(a, b) PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL) |
#define | PCI_DISABLE_BRIDGE_CONTROL_REGISTER(a, b) PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL) |
Functions | |
EFI_STATUS | PciOperateRegister (IN PCI_IO_DEVICE *PciIoDevice, IN UINT16 Command, IN UINT8 Offset, IN UINT8 Operation, OUT UINT16 *PtrCommand) |
BOOLEAN | PciCapabilitySupport (IN PCI_IO_DEVICE *PciIoDevice) |
EFI_STATUS | LocateCapabilityRegBlock (IN PCI_IO_DEVICE *PciIoDevice, IN UINT8 CapId, IN OUT UINT8 *Offset, OUT UINT8 *NextRegBlock OPTIONAL) |
EFI_STATUS | LocatePciExpressCapabilityRegBlock (IN PCI_IO_DEVICE *PciIoDevice, IN UINT16 CapId, IN OUT UINT32 *Offset, OUT UINT32 *NextRegBlock OPTIONAL) |
PCI command register operations supporting functions declaration for PCI Bus module.
Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file PciCommand.h.
#define EFI_DISABLE_REGISTER 4 |
Definition at line 55 of file PciCommand.h.
#define EFI_ENABLE_REGISTER 3 |
Definition at line 54 of file PciCommand.h.
#define EFI_GET_REGISTER 1 |
Definition at line 52 of file PciCommand.h.
#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED |
Definition at line 46 of file PciCommand.h.
#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED |
Definition at line 33 of file PciCommand.h.
#define EFI_PCI_COMMAND_BITS_OWNED |
Definition at line 18 of file PciCommand.h.
#define EFI_SET_REGISTER 2 |
Definition at line 53 of file PciCommand.h.
#define PCI_DISABLE_BRIDGE_CONTROL_REGISTER | ( | a, | |
b | |||
) | PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL) |
Macro that disables PCI bridge control register.
a[in] | Pointer to instance of PCI_IO_DEVICE. |
b[in] | The disabled value written into command register. |
Definition at line 227 of file PciCommand.h.
#define PCI_DISABLE_COMMAND_REGISTER | ( | a, | |
b | |||
) | PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL) |
Macro that disables command register.
a[in] | Pointer to instance of PCI_IO_DEVICE. |
b[in] | The disabled value written into command register. |
Definition at line 179 of file PciCommand.h.
#define PCI_ENABLE_BRIDGE_CONTROL_REGISTER | ( | a, | |
b | |||
) | PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL) |
Macro that enables PCI bridge control register.
a[in] | Pointer to instance of PCI_IO_DEVICE. |
b[in] | The enabled value written into command register. |
Definition at line 215 of file PciCommand.h.
#define PCI_ENABLE_COMMAND_REGISTER | ( | a, | |
b | |||
) | PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL) |
Macro that enables command register.
a[in] | Pointer to instance of PCI_IO_DEVICE. |
b[in] | The enabled value written into command register. |
Definition at line 167 of file PciCommand.h.
#define PCI_READ_BRIDGE_CONTROL_REGISTER | ( | a, | |
b | |||
) | PciOperateRegister (a, 0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b) |
Macro that reads PCI bridge control register.
a[in] | Pointer to instance of PCI_IO_DEVICE. |
b[out] | The 16-bit value read from control register. |
Definition at line 191 of file PciCommand.h.
#define PCI_READ_COMMAND_REGISTER | ( | a, | |
b | |||
) | PciOperateRegister (a, 0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b) |
Macro that reads command register.
a[in] | Pointer to instance of PCI_IO_DEVICE. |
b[out] | Pointer to the 16-bit value read from command register. |
Definition at line 143 of file PciCommand.h.
#define PCI_SET_BRIDGE_CONTROL_REGISTER | ( | a, | |
b | |||
) | PciOperateRegister (a, b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL) |
Macro that writes PCI bridge control register.
a[in] | Pointer to instance of PCI_IO_DEVICE. |
b[in] | The 16-bit value written into control register. |
Definition at line 203 of file PciCommand.h.
#define PCI_SET_COMMAND_REGISTER | ( | a, | |
b | |||
) | PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL) |
Macro that writes command register.
a[in] | Pointer to instance of PCI_IO_DEVICE. |
b[in] | The 16-bit value written into command register. |
Definition at line 155 of file PciCommand.h.
EFI_STATUS LocateCapabilityRegBlock | ( | IN PCI_IO_DEVICE * | PciIoDevice, |
IN UINT8 | CapId, | ||
IN OUT UINT8 * | Offset, | ||
OUT UINT8 *NextRegBlock | OPTIONAL | ||
) |
Locate capability register block per capability ID.
PciIoDevice | A pointer to the PCI_IO_DEVICE. |
CapId | The capability ID. |
Offset | A pointer to the offset returned. |
NextRegBlock | A pointer to the next block returned. |
EFI_SUCCESS | Successfully located capability register block. |
EFI_UNSUPPORTED | Pci device does not support capability. |
EFI_NOT_FOUND | Pci device support but can not find register block. |
Definition at line 106 of file PciCommand.c.
EFI_STATUS LocatePciExpressCapabilityRegBlock | ( | IN PCI_IO_DEVICE * | PciIoDevice, |
IN UINT16 | CapId, | ||
IN OUT UINT32 * | Offset, | ||
OUT UINT32 *NextRegBlock | OPTIONAL | ||
) |
Locate PciExpress capability register block per capability ID.
PciIoDevice | A pointer to the PCI_IO_DEVICE. |
CapId | The capability ID. |
Offset | A pointer to the offset returned. |
NextRegBlock | A pointer to the next block returned. |
EFI_SUCCESS | Successfully located capability register block. |
EFI_UNSUPPORTED | Pci device does not support capability. |
EFI_NOT_FOUND | Pci device support but can not find register block. |
Definition at line 195 of file PciCommand.c.
BOOLEAN PciCapabilitySupport | ( | IN PCI_IO_DEVICE * | PciIoDevice | ) |
Check the capability supporting by given device.
PciIoDevice | Pointer to instance of PCI_IO_DEVICE. |
TRUE | Capability supported. |
FALSE | Capability not supported. |
Definition at line 81 of file PciCommand.c.
EFI_STATUS PciOperateRegister | ( | IN PCI_IO_DEVICE * | PciIoDevice, |
IN UINT16 | Command, | ||
IN UINT8 | Offset, | ||
IN UINT8 | Operation, | ||
OUT UINT16 * | PtrCommand | ||
) |
Operate the PCI register via PciIo function interface.
PciIoDevice | Pointer to instance of PCI_IO_DEVICE. |
Command | Operator command. |
Offset | The address within the PCI configuration space for the PCI controller. |
Operation | Type of Operation. |
PtrCommand | Return buffer holding old PCI command, if operation is not EFI_SET_REGISTER. |
Definition at line 24 of file PciCommand.c.