#include <IndustryStandard/PciExpress50.h>

Data Structures
union	PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_CAPABILITIES

union	PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_CONTROL

union	PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_STATUS

union	PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_LANE_EQUALIZATION_CONTROL

struct	PCI_EXPRESS_EXTENDED_CAPABILITIES_PHYSICAL_LAYER_64_0

union	PCI_REG_PCIE_DEVICE_CAPABILITY3

union	PCI_REG_PCIE_DEVICE_CONTROL3

union	PCI_REG_PCIE_DEVICE_STATUS3

Macros

#define	PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_64_0_ID 0x0031

#define	PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_64_0_VER1 0x1

#define	PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_CAPABILITIES_OFFSET 0x04

#define	PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_CONTROL_OFFSET 0x08

#define	PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_STATUS_OFFSET 0x0C

#define	PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_LANE_EQUALIZATION_CONTROL_OFFSET 0x10

#define	PCI_EXPRESS_EXTENDED_CAPABILITY_DEVICE3_ID 0x002F

#define	PCI_EXPRESS_EXTENDED_CAPABILITY_DEVICE3_VER1 0x1

#define	EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_3_OFFSET 0x04

#define	EFI_PCIE_CAPABILITY_DEVICE_CONTROL_3_OFFSET 0x08

#define	EFI_PCIE_CAPABILITY_DEVICE_STATUS_3_OFFSET 0x0C

Detailed Description

Support for the PCI Express 6.0 standard.

This header file may not define all structures. Please extend as required.

Copyright (c) 2024, American Megatrends International LLC. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file PciExpress60.h.

Macro Definition Documentation

◆ EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_3_OFFSET

#define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_3_OFFSET 0x04

Definition at line 32 of file PciExpress60.h.

◆ EFI_PCIE_CAPABILITY_DEVICE_CONTROL_3_OFFSET

#define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_3_OFFSET 0x08

Definition at line 33 of file PciExpress60.h.

◆ EFI_PCIE_CAPABILITY_DEVICE_STATUS_3_OFFSET

#define EFI_PCIE_CAPABILITY_DEVICE_STATUS_3_OFFSET 0x0C

Definition at line 34 of file PciExpress60.h.

◆ PCI_EXPRESS_EXTENDED_CAPABILITY_DEVICE3_ID

#define PCI_EXPRESS_EXTENDED_CAPABILITY_DEVICE3_ID 0x002F

Definition at line 29 of file PciExpress60.h.

◆ PCI_EXPRESS_EXTENDED_CAPABILITY_DEVICE3_VER1

#define PCI_EXPRESS_EXTENDED_CAPABILITY_DEVICE3_VER1 0x1

Definition at line 30 of file PciExpress60.h.

◆ PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_64_0_ID

#define PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_64_0_ID 0x0031

The Physical Layer PCI Express Extended Capability definitions.

Based on section 7.7.7 of PCI Express Base Specification 6.0.

Definition at line 20 of file PciExpress60.h.

◆ PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_64_0_VER1

#define PCI_EXPRESS_EXTENDED_CAPABILITY_PHYSICAL_LAYER_64_0_VER1 0x1

Definition at line 21 of file PciExpress60.h.

◆ PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_CAPABILITIES_OFFSET

#define PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_CAPABILITIES_OFFSET 0x04

Definition at line 24 of file PciExpress60.h.

◆ PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_CONTROL_OFFSET

#define PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_CONTROL_OFFSET 0x08

Definition at line 25 of file PciExpress60.h.

◆ PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_LANE_EQUALIZATION_CONTROL_OFFSET

#define PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_LANE_EQUALIZATION_CONTROL_OFFSET 0x10

Definition at line 27 of file PciExpress60.h.

◆ PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_STATUS_OFFSET

#define PCI_EXPRESS_REG_PHYSICAL_LAYER_64_0_STATUS_OFFSET 0x0C

Definition at line 26 of file PciExpress60.h.

Data Structures

Macros