PciRootBridges.h

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#ifndef UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
 
#include <UniversalPayload/UniversalPayload.h>
 
#pragma pack(1)
 
//
// (Base > Limit) indicates an aperture is not available.
//
typedef struct {
  //
  // Base and Limit are the device address instead of host address when
  // Translation is not zero
  //
  UINT64    Base;
  UINT64    Limit;
  //
  // According to UEFI 2.7, Device Address = Host Address + Translation,
  // so Translation = Device Address - Host Address.
  // On platforms where Translation is not zero, the subtraction is probably to
  // be performed with UINT64 wrap-around semantics, for we may translate an
  // above-4G host address into a below-4G device address for legacy PCIe device
  // compatibility.
  //
  // NOTE: The alignment of Translation is required to be larger than any BAR
  // alignment in the same root bridge, so that the same alignment can be
  // applied to both device address and host address, which simplifies the
  // situation and makes the current resource allocation code in generic PCI
  // host bridge driver still work.
  //
  UINT64    Translation;
} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE;
 
typedef struct {
  UINT32                                        Segment;               
  UINT64                                        Supports;              
  UINT64                                        Attributes;            
  BOOLEAN                                       DmaAbove4G;            
  BOOLEAN                                       NoExtendedConfigSpace; 
  UINT64                                        AllocationAttributes;  
  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE    Bus;                   
  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE    Io;                    
  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE    Mem;                   
  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE    MemAbove4G;            
  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE    PMem;                  
  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE    PMemAbove4G;           
  UINT32                                        HID;                   
  UINT32                                        UID;                   
} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE;
 
typedef struct {
  UNIVERSAL_PAYLOAD_GENERIC_HEADER     Header;
  BOOLEAN                              ResourceAssigned;
  UINT8                                Count;
  UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE    RootBridge[0];
} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES;
 
#pragma pack()
 
#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION  1
 
extern GUID  gUniversalPayloadPciRootBridgeInfoGuid;
 
#endif // UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_