TianoCore EDK2 master
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#include <Base.h>
Go to the source code of this file.
Data Structures | |
struct | FW_CFG_DMA_ACCESS |
Macros | |
#define | QEMU_FW_CFG_FNAME_SIZE 56 |
#define | FW_CFG_F_DMA BIT1 |
#define | FW_CFG_DMA_CTL_ERROR BIT0 |
#define | FW_CFG_DMA_CTL_READ BIT1 |
#define | FW_CFG_DMA_CTL_SKIP BIT2 |
#define | FW_CFG_DMA_CTL_SELECT BIT3 |
#define | FW_CFG_DMA_CTL_WRITE BIT4 |
#define | FW_CFG_IO_SELECTOR 0x510 |
#define | FW_CFG_IO_DATA 0x511 |
#define | FW_CFG_IO_DMA_ADDRESS 0x514 |
Macro and type definitions corresponding to the QEMU fw_cfg interface.
Refer to "docs/specs/fw_cfg.txt" in the QEMU source directory.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
Copyright (C) 2013 - 2017, Red Hat, Inc.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file QemuFwCfg.h.
#define FW_CFG_DMA_CTL_ERROR BIT0 |
Definition at line 33 of file QemuFwCfg.h.
#define FW_CFG_DMA_CTL_READ BIT1 |
Definition at line 34 of file QemuFwCfg.h.
#define FW_CFG_DMA_CTL_SELECT BIT3 |
Definition at line 36 of file QemuFwCfg.h.
#define FW_CFG_DMA_CTL_SKIP BIT2 |
Definition at line 35 of file QemuFwCfg.h.
#define FW_CFG_DMA_CTL_WRITE BIT4 |
Definition at line 37 of file QemuFwCfg.h.
#define FW_CFG_F_DMA BIT1 |
Definition at line 28 of file QemuFwCfg.h.
#define FW_CFG_IO_DATA 0x511 |
Definition at line 44 of file QemuFwCfg.h.
#define FW_CFG_IO_DMA_ADDRESS 0x514 |
Definition at line 45 of file QemuFwCfg.h.
#define FW_CFG_IO_SELECTOR 0x510 |
Definition at line 43 of file QemuFwCfg.h.
#define QEMU_FW_CFG_FNAME_SIZE 56 |
Definition at line 21 of file QemuFwCfg.h.
enum FIRMWARE_CONFIG_ITEM |
Definition at line 50 of file QemuFwCfg.h.