TianoCore EDK2 master
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Sd.h
Go to the documentation of this file.
1
12#ifndef __SD_H__
13#define __SD_H__
14
15//
16// SD command index
17//
18#define SD_GO_IDLE_STATE 0
19#define SD_ALL_SEND_CID 2
20#define SD_SET_RELATIVE_ADDR 3
21#define SD_SET_DSR 4
22#define SDIO_SEND_OP_COND 5
23#define SD_SWITCH_FUNC 6
24#define SD_SELECT_DESELECT_CARD 7
25#define SD_SEND_IF_COND 8
26#define SD_SEND_CSD 9
27#define SD_SEND_CID 10
28#define SD_VOLTAGE_SWITCH 11
29#define SD_STOP_TRANSMISSION 12
30#define SD_SEND_STATUS 13
31#define SD_GO_INACTIVE_STATE 15
32#define SD_SET_BLOCKLEN 16
33#define SD_READ_SINGLE_BLOCK 17
34#define SD_READ_MULTIPLE_BLOCK 18
35#define SD_SEND_TUNING_BLOCK 19
36#define SD_SPEED_CLASS_CONTROL 20
37#define SD_SET_BLOCK_COUNT 23
38#define SD_WRITE_SINGLE_BLOCK 24
39#define SD_WRITE_MULTIPLE_BLOCK 25
40#define SD_PROGRAM_CSD 27
41#define SD_SET_WRITE_PROT 28
42#define SD_CLR_WRITE_PROT 29
43#define SD_SEND_WRITE_PROT 30
44#define SD_ERASE_WR_BLK_START 32
45#define SD_ERASE_WR_BLK_END 33
46#define SD_ERASE 38
47#define SD_LOCK_UNLOCK 42
48#define SD_READ_EXTR_SINGLE 48
49#define SD_WRITE_EXTR_SINGLE 49
50#define SDIO_RW_DIRECT 52
51#define SDIO_RW_EXTENDED 53
52#define SD_APP_CMD 55
53#define SD_GEN_CMD 56
54#define SD_READ_EXTR_MULTI 58
55#define SD_WRITE_EXTR_MULTI 59
56
57#define SD_SET_BUS_WIDTH 6 // ACMD6
58#define SD_STATUS 13 // ACMD13
59#define SD_SEND_NUM_WR_BLOCKS 22 // ACMD22
60#define SD_SET_WR_BLK_ERASE_COUNT 23 // ACMD23
61#define SD_SEND_OP_COND 41 // ACMD41
62#define SD_SET_CLR_CARD_DETECT 42 // ACMD42
63#define SD_SEND_SCR 51 // ACMD51
64
65#pragma pack(1)
66typedef struct {
67 UINT8 NotUsed : 1; // Not used [0:0]
68 UINT8 Crc : 7; // CRC [7:1]
69 UINT16 ManufacturingDate : 12; // Manufacturing date [19:8]
70 UINT16 Reserved : 4; // Reserved [23:20]
71 UINT8 ProductSerialNumber[4]; // Product serial number [55:24]
72 UINT8 ProductRevision; // Product revision [63:56]
73 UINT8 ProductName[5]; // Product name [103:64]
74 UINT8 OemId[2]; // OEM/Application ID [119:104]
75 UINT8 ManufacturerId; // Manufacturer ID [127:120]
76} SD_CID;
77
78typedef struct {
79 UINT32 NotUsed : 1; // Not used [0:0]
80 UINT32 Crc : 7; // CRC [7:1]
81 UINT32 Reserved : 2; // Reserved [9:8]
82 UINT32 FileFormat : 2; // File format [11:10]
83 UINT32 TmpWriteProtect : 1; // Temporary write protection [12:12]
84 UINT32 PermWriteProtect : 1; // Permanent write protection [13:13]
85 UINT32 Copy : 1; // Copy flag (OTP) [14:14]
86 UINT32 FileFormatGrp : 1; // File format group [15:15]
87 UINT32 Reserved1 : 5; // Reserved [20:16]
88 UINT32 WriteBlPartial : 1; // Partial blocks for write allowed [21:21]
89 UINT32 WriteBlLen : 4; // Max. write data block length [25:22]
90 UINT32 R2WFactor : 3; // Write speed factor [28:26]
91 UINT32 Reserved2 : 2; // Manufacturer default ECC [30:29]
92 UINT32 WpGrpEnable : 1; // Write protect group enable [31:31]
93
94 UINT32 WpGrpSize : 7; // Write protect group size [38:32]
95 UINT32 SectorSize : 7; // Erase sector size [45:39]
96 UINT32 EraseBlkEn : 1; // Erase single block enable [46:46]
97 UINT32 CSizeMul : 3; // device size multiplier [49:47]
98 UINT32 VddWCurrMax : 3; // max. write current @VDD max [52:50]
99 UINT32 VddWCurrMin : 3; // max. write current @VDD min [55:53]
100 UINT32 VddRCurrMax : 3; // max. read current @VDD max [58:56]
101 UINT32 VddRCurrMin : 3; // max. read current @VDD min [61:59]
102 UINT32 CSizeLow : 2; // Device size low 2 bits [63:62]
103
104 UINT32 CSizeHigh : 10; // Device size high 10 bits [73:64]
105 UINT32 Reserved4 : 2; // Reserved [75:74]
106 UINT32 DsrImp : 1; // DSR implemented [76:76]
107 UINT32 ReadBlkMisalign : 1; // Read block misalignment [77:77]
108 UINT32 WriteBlkMisalign : 1; // Write block misalignment [78:78]
109 UINT32 ReadBlPartial : 1; // Partial blocks for read allowed [79:79]
110 UINT32 ReadBlLen : 4; // Max. read data block length [83:80]
111 UINT32 Ccc : 12; // Card command classes [95:84]
112
113 UINT32 TranSpeed : 8; // Max. data transfer rate [103:96]
114 UINT32 Nsac : 8; // Data read access-time in CLK cycles (NSAC*100) [111:104]
115 UINT32 Taac : 8; // Data read access-time [119:112]
116 UINT32 Reserved5 : 6; // Reserved [125:120]
117 UINT32 CsdStructure : 2; // CSD structure [127:126]
118} SD_CSD;
119
120typedef struct {
121 UINT32 NotUsed : 1; // Not used [0:0]
122 UINT32 Crc : 7; // CRC [7:1]
123 UINT32 Reserved : 2; // Reserved [9:8]
124 UINT32 FileFormat : 2; // File format [11:10]
125 UINT32 TmpWriteProtect : 1; // Temporary write protection [12:12]
126 UINT32 PermWriteProtect : 1; // Permanent write protection [13:13]
127 UINT32 Copy : 1; // Copy flag (OTP) [14:14]
128 UINT32 FileFormatGrp : 1; // File format group [15:15]
129 UINT32 Reserved1 : 5; // Reserved [20:16]
130 UINT32 WriteBlPartial : 1; // Partial blocks for write allowed [21:21]
131 UINT32 WriteBlLen : 4; // Max. write data block length [25:22]
132 UINT32 R2WFactor : 3; // Write speed factor [28:26]
133 UINT32 Reserved2 : 2; // Manufacturer default ECC [30:29]
134 UINT32 WpGrpEnable : 1; // Write protect group enable [31:31]
135
136 UINT32 WpGrpSize : 7; // Write protect group size [38:32]
137 UINT32 SectorSize : 7; // Erase sector size [45:39]
138 UINT32 EraseBlkEn : 1; // Erase single block enable [46:46]
139 UINT32 Reserved3 : 1; // Reserved [47:47]
140 UINT32 CSizeLow : 16; // Device size low 16 bits [63:48]
141
142 UINT32 CSizeHigh : 6; // Device size high 6 bits [69:64]
143 UINT32 Reserved4 : 6; // Reserved [75:70]
144 UINT32 DsrImp : 1; // DSR implemented [76:76]
145 UINT32 ReadBlkMisalign : 1; // Read block misalignment [77:77]
146 UINT32 WriteBlkMisalign : 1; // Write block misalignment [78:78]
147 UINT32 ReadBlPartial : 1; // Partial blocks for read allowed [79:79]
148 UINT32 ReadBlLen : 4; // Max. read data block length [83:80]
149 UINT32 Ccc : 12; // Card command classes [95:84]
150
151 UINT32 TranSpeed : 8; // Max. data transfer rate [103:96]
152 UINT32 Nsac : 8; // Data read access-time in CLK cycles (NSAC*100) [111:104]
153 UINT32 Taac : 8; // Data read access-time [119:112]
154 UINT32 Reserved5 : 6; // Reserved [125:120]
155 UINT32 CsdStructure : 2; // CSD structure [127:126]
156} SD_CSD2;
157
158typedef struct {
159 UINT32 Reserved; // Reserved [31:0]
160
161 UINT32 CmdSupport : 4; // Command Support bits [35:32]
162 UINT32 Reserved1 : 6; // Reserved [41:36]
163 UINT32 SdSpec4 : 1; // Spec. Version 4.00 or higher [42:42]
164 UINT32 ExSecurity : 4; // Extended Security Support [46:43]
165 UINT32 SdSpec3 : 1; // Spec. Version 3.00 or higher [47:47]
166 UINT32 SdBusWidths : 4; // DAT Bus widths supported [51:48]
167 UINT32 SdSecurity : 3; // CPRM security support [54:52]
168 UINT32 DataStatAfterErase : 1; // Data status after erases [55]
169 UINT32 SdSpec : 4; // SD Memory Card Spec. Version [59:56]
170 UINT32 ScrStructure : 4; // SCR Structure [63:60]
171} SD_SCR;
172
173#pragma pack()
174
175#endif
SD_CID
Definition: Sd.h:66
SD_CSD2
Definition: Sd.h:120
SD_CSD
Definition: Sd.h:78
SD_SCR
Definition: Sd.h:158