11#ifndef __SD_MMC_OVERRIDE_H__
12#define __SD_MMC_OVERRIDE_H__
16#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \
17 { 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } }
19#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x3
23#define EDKII_SD_MMC_BUS_WIDTH_IGNORE MAX_UINT8
24#define EDKII_SD_MMC_CLOCK_FREQ_IGNORE MAX_UINT32
25#define EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE MAX_UINT8
28 SdDriverStrengthTypeB = 0,
29 SdDriverStrengthTypeA,
30 SdDriverStrengthTypeC,
31 SdDriverStrengthTypeD,
32 SdDriverStrengthIgnore = EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE
33} SD_DRIVER_STRENGTH_TYPE;
36 EmmcDriverStrengthType0 = 0,
37 EmmcDriverStrengthType1,
38 EmmcDriverStrengthType2,
39 EmmcDriverStrengthType3,
40 EmmcDriverStrengthType4,
41 EmmcDriverStrengthIgnore = EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE
42} EMMC_DRIVER_STRENGTH_TYPE;
45 SD_DRIVER_STRENGTH_TYPE Sd;
46 EMMC_DRIVER_STRENGTH_TYPE Emmc;
89 EdkiiSdMmcInitHostPre,
90 EdkiiSdMmcInitHostPost,
91 EdkiiSdMmcUhsSignaling,
92 EdkiiSdMmcSwitchClockFreqPost,
93 EdkiiSdMmcGetOperatingParam
94} EDKII_SD_MMC_PHASE_TYPE;
115 IN OUT VOID *SdMmcHcSlotCapability,
116 IN OUT UINT32 *BaseClkFreq
139 IN EDKII_SD_MMC_PHASE_TYPE PhaseType,
140 IN OUT VOID *PhaseData
158extern EFI_GUID gEdkiiSdMmcOverrideProtocolGuid;
EFI_STATUS(EFIAPI * EDKII_SD_MMC_NOTIFY_PHASE)(IN EFI_HANDLE ControllerHandle, IN UINT8 Slot, IN EDKII_SD_MMC_PHASE_TYPE PhaseType, IN OUT VOID *PhaseData)
EFI_STATUS(EFIAPI * EDKII_SD_MMC_CAPABILITY)(IN EFI_HANDLE ControllerHandle, IN UINT8 Slot, IN OUT VOID *SdMmcHcSlotCapability, IN OUT UINT32 *BaseClkFreq)