Data Structures
struct	SD_MMC_HC_ADMA_32_DESC_LINE

struct	SD_MMC_HC_ADMA_64_V3_DESC_LINE

struct	SD_MMC_HC_ADMA_64_V4_DESC_LINE

struct	SD_MMC_HC_SLOT_INFO

struct	SD_MMC_HC_SLOT_CAP

Macros
#define	SD_MMC_HC_SLOT_OFFSET 0x40

#define	SD_MMC_HC_MAX_SLOT 6

#define	SD_MMC_HC_SDMA_ADDR 0x00

#define	SD_MMC_HC_ARG2 0x00

#define	SD_MMC_HC_BLK_SIZE 0x04

#define	SD_MMC_HC_BLK_COUNT 0x06

#define	SD_MMC_HC_ARG1 0x08

#define	SD_MMC_HC_TRANS_MOD 0x0C

#define	SD_MMC_HC_COMMAND 0x0E

#define	SD_MMC_HC_RESPONSE 0x10

#define	SD_MMC_HC_BUF_DAT_PORT 0x20

#define	SD_MMC_HC_PRESENT_STATE 0x24

#define	SD_MMC_HC_HOST_CTRL1 0x28

#define	SD_MMC_HC_POWER_CTRL 0x29

#define	SD_MMC_HC_BLK_GAP_CTRL 0x2A

#define	SD_MMC_HC_WAKEUP_CTRL 0x2B

#define	SD_MMC_HC_CLOCK_CTRL 0x2C

#define	SD_MMC_HC_TIMEOUT_CTRL 0x2E

#define	SD_MMC_HC_SW_RST 0x2F

#define	SD_MMC_HC_NOR_INT_STS 0x30

#define	SD_MMC_HC_ERR_INT_STS 0x32

#define	SD_MMC_HC_NOR_INT_STS_EN 0x34

#define	SD_MMC_HC_ERR_INT_STS_EN 0x36

#define	SD_MMC_HC_NOR_INT_SIG_EN 0x38

#define	SD_MMC_HC_ERR_INT_SIG_EN 0x3A

#define	SD_MMC_HC_AUTO_CMD_ERR_STS 0x3C

#define	SD_MMC_HC_HOST_CTRL2 0x3E

#define	SD_MMC_HC_CAP 0x40

#define	SD_MMC_HC_MAX_CURRENT_CAP 0x48

#define	SD_MMC_HC_FORCE_EVT_AUTO_CMD 0x50

#define	SD_MMC_HC_FORCE_EVT_ERR_INT 0x52

#define	SD_MMC_HC_ADMA_ERR_STS 0x54

#define	SD_MMC_HC_ADMA_SYS_ADDR 0x58

#define	SD_MMC_HC_PRESET_VAL 0x60

#define	SD_MMC_HC_SHARED_BUS_CTRL 0xE0

#define	SD_MMC_HC_SLOT_INT_STS 0xFC

#define	SD_MMC_HC_CTRL_VER 0xFE

#define	SD_MMC_HC_CTRL_UHS_MASK 0x0007

#define	SD_MMC_HC_CTRL_UHS_SDR12 0x0000

#define	SD_MMC_HC_CTRL_UHS_SDR25 0x0001

#define	SD_MMC_HC_CTRL_UHS_SDR50 0x0002

#define	SD_MMC_HC_CTRL_UHS_SDR104 0x0003

#define	SD_MMC_HC_CTRL_UHS_DDR50 0x0004

#define	SD_MMC_HC_CTRL_MMC_LEGACY 0x0000

#define	SD_MMC_HC_CTRL_MMC_HS_SDR 0x0001

#define	SD_MMC_HC_CTRL_MMC_HS_DDR 0x0004

#define	SD_MMC_HC_CTRL_MMC_HS200 0x0003

#define	SD_MMC_HC_CTRL_MMC_HS400 0x0005

#define	SD_MMC_HC_CTRL_DRIVER_STRENGTH_MASK 0x0030

#define	ADMA_MAX_DATA_PER_LINE_16B SIZE_64KB

#define	ADMA_MAX_DATA_PER_LINE_26B SIZE_64MB

#define	SD_MMC_SDMA_BOUNDARY 512 * 1024

#define	SD_MMC_SDMA_ROUND_UP(x, n) (((x) + n) & ~(n - 1))

#define	SD_MMC_HC_CTRL_VER_100 0x00

#define	SD_MMC_HC_CTRL_VER_200 0x01

#define	SD_MMC_HC_CTRL_VER_300 0x02

#define	SD_MMC_HC_CTRL_VER_400 0x03

#define	SD_MMC_HC_CTRL_VER_410 0x04

#define	SD_MMC_HC_CTRL_VER_420 0x05

#define	SD_MMC_HC_V4_EN BIT12

#define	SD_MMC_HC_64_ADDR_EN BIT13

#define	SD_MMC_HC_26_DATA_LEN_ADMA_EN BIT10

Enumerations
enum	SD_MMC_HC_TRANSFER_MODE { SdMmcNoData , SdMmcPioMode , SdMmcSdmaMode , SdMmcAdma32bMode , SdMmcAdma64bV3Mode , SdMmcAdma64bV4Mode }

enum	SD_MMC_HC_ADMA_LENGTH_MODE { SdMmcAdmaLen16b , SdMmcAdmaLen26b }

Functions
VOID	DumpCapabilityReg (IN UINT8 Slot, IN SD_MMC_HC_SLOT_CAP *Capability)

EFI_STATUS EFIAPI	SdMmcHcGetSlotInfo (IN EFI_PCI_IO_PROTOCOL PciIo, OUT UINT8 FirstBar, OUT UINT8 *SlotNum)

EFI_STATUS EFIAPI	SdMmcHcRwMmio (IN EFI_PCI_IO_PROTOCOL PciIo, IN UINT8 BarIndex, IN UINT32 Offset, IN BOOLEAN Read, IN UINT8 Count, IN OUT VOID Data)

EFI_STATUS EFIAPI	SdMmcHcOrMmio (IN EFI_PCI_IO_PROTOCOL PciIo, IN UINT8 BarIndex, IN UINT32 Offset, IN UINT8 Count, IN VOID OrData)

EFI_STATUS EFIAPI	SdMmcHcAndMmio (IN EFI_PCI_IO_PROTOCOL PciIo, IN UINT8 BarIndex, IN UINT32 Offset, IN UINT8 Count, IN VOID AndData)

EFI_STATUS EFIAPI	SdMmcHcWaitMmioSet (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 BarIndex, IN UINT32 Offset, IN UINT8 Count, IN UINT64 MaskValue, IN UINT64 TestValue, IN UINT64 Timeout)

EFI_STATUS	SdMmcHcGetControllerVersion (IN EFI_PCI_IO_PROTOCOL PciIo, IN UINT8 Slot, OUT UINT16 Version)

EFI_STATUS	SdMmcHcEnableInterrupt (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Slot)

EFI_STATUS	SdMmcHcGetCapability (IN EFI_PCI_IO_PROTOCOL PciIo, IN UINT8 Slot, OUT SD_MMC_HC_SLOT_CAP Capability)

EFI_STATUS	SdMmcHcGetMaxCurrent (IN EFI_PCI_IO_PROTOCOL PciIo, IN UINT8 Slot, OUT UINT64 MaxCurrent)

EFI_STATUS	SdMmcHcCardDetect (IN EFI_PCI_IO_PROTOCOL PciIo, IN UINT8 Slot, OUT BOOLEAN MediaPresent)

EFI_STATUS	SdMmcHcStopClock (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Slot)

EFI_STATUS	SdMmcHcStartSdClock (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Slot)

EFI_STATUS	SdMmcHcPowerControl (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Slot, IN UINT8 PowerCtrl)

EFI_STATUS	SdMmcHcSetBusWidth (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Slot, IN UINT16 BusWidth)

EFI_STATUS	SdMmcHcInitPowerVoltage (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Slot, IN SD_MMC_HC_SLOT_CAP Capability)

EFI_STATUS	SdMmcHcInitTimeoutCtrl (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Slot)

EFI_STATUS	SdMmcHcUhsSignaling (IN EFI_HANDLE ControllerHandle, IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 Slot, IN SD_MMC_BUS_MODE Timing)

EFI_STATUS	SdMmcSetDriverStrength (IN EFI_PCI_IO_PROTOCOL *PciIo, IN UINT8 SlotIndex, IN SD_DRIVER_STRENGTH_TYPE DriverStrength)

Detailed Description

Provides some data structure definitions used by the SD/MMC host controller driver.

Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved. Copyright (c) 2015, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file SdMmcPciHci.h.

Macro Definition Documentation

◆ ADMA_MAX_DATA_PER_LINE_16B

#define ADMA_MAX_DATA_PER_LINE_16B SIZE_64KB

Definition at line 100 of file SdMmcPciHci.h.

◆ ADMA_MAX_DATA_PER_LINE_26B

#define ADMA_MAX_DATA_PER_LINE_26B SIZE_64MB

Definition at line 101 of file SdMmcPciHci.h.

◆ SD_MMC_HC_26_DATA_LEN_ADMA_EN

#define SD_MMC_HC_26_DATA_LEN_ADMA_EN BIT10

Definition at line 206 of file SdMmcPciHci.h.

◆ SD_MMC_HC_64_ADDR_EN

#define SD_MMC_HC_64_ADDR_EN BIT13

Definition at line 205 of file SdMmcPciHci.h.

◆ SD_MMC_HC_ADMA_ERR_STS

#define SD_MMC_HC_ADMA_ERR_STS 0x54

Definition at line 53 of file SdMmcPciHci.h.

◆ SD_MMC_HC_ADMA_SYS_ADDR

#define SD_MMC_HC_ADMA_SYS_ADDR 0x58

Definition at line 54 of file SdMmcPciHci.h.

◆ SD_MMC_HC_ARG1

#define SD_MMC_HC_ARG1 0x08

Definition at line 28 of file SdMmcPciHci.h.

◆ SD_MMC_HC_ARG2

#define SD_MMC_HC_ARG2 0x00

Definition at line 25 of file SdMmcPciHci.h.

◆ SD_MMC_HC_AUTO_CMD_ERR_STS

#define SD_MMC_HC_AUTO_CMD_ERR_STS 0x3C

Definition at line 47 of file SdMmcPciHci.h.

◆ SD_MMC_HC_BLK_COUNT

#define SD_MMC_HC_BLK_COUNT 0x06

Definition at line 27 of file SdMmcPciHci.h.

◆ SD_MMC_HC_BLK_GAP_CTRL

#define SD_MMC_HC_BLK_GAP_CTRL 0x2A

Definition at line 36 of file SdMmcPciHci.h.

◆ SD_MMC_HC_BLK_SIZE

#define SD_MMC_HC_BLK_SIZE 0x04

Definition at line 26 of file SdMmcPciHci.h.

◆ SD_MMC_HC_BUF_DAT_PORT

#define SD_MMC_HC_BUF_DAT_PORT 0x20

Definition at line 32 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CAP

#define SD_MMC_HC_CAP 0x40

Definition at line 49 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CLOCK_CTRL

#define SD_MMC_HC_CLOCK_CTRL 0x2C

Definition at line 38 of file SdMmcPciHci.h.

◆ SD_MMC_HC_COMMAND

#define SD_MMC_HC_COMMAND 0x0E

Definition at line 30 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_DRIVER_STRENGTH_MASK

#define SD_MMC_HC_CTRL_DRIVER_STRENGTH_MASK 0x0030

Definition at line 75 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_MMC_HS200

#define SD_MMC_HC_CTRL_MMC_HS200 0x0003

Definition at line 72 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_MMC_HS400

#define SD_MMC_HC_CTRL_MMC_HS400 0x0005

Definition at line 73 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_MMC_HS_DDR

#define SD_MMC_HC_CTRL_MMC_HS_DDR 0x0004

Definition at line 71 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_MMC_HS_SDR

#define SD_MMC_HC_CTRL_MMC_HS_SDR 0x0001

Definition at line 70 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_MMC_LEGACY

#define SD_MMC_HC_CTRL_MMC_LEGACY 0x0000

Definition at line 69 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_UHS_DDR50

#define SD_MMC_HC_CTRL_UHS_DDR50 0x0004

Definition at line 68 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_UHS_MASK

#define SD_MMC_HC_CTRL_UHS_MASK 0x0007

Definition at line 63 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_UHS_SDR104

#define SD_MMC_HC_CTRL_UHS_SDR104 0x0003

Definition at line 67 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_UHS_SDR12

#define SD_MMC_HC_CTRL_UHS_SDR12 0x0000

Definition at line 64 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_UHS_SDR25

#define SD_MMC_HC_CTRL_UHS_SDR25 0x0001

Definition at line 65 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_UHS_SDR50

#define SD_MMC_HC_CTRL_UHS_SDR50 0x0002

Definition at line 66 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_VER

#define SD_MMC_HC_CTRL_VER 0xFE

Definition at line 58 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_VER_100

#define SD_MMC_HC_CTRL_VER_100 0x00

Definition at line 194 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_VER_200

#define SD_MMC_HC_CTRL_VER_200 0x01

Definition at line 195 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_VER_300

#define SD_MMC_HC_CTRL_VER_300 0x02

Definition at line 196 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_VER_400

#define SD_MMC_HC_CTRL_VER_400 0x03

Definition at line 197 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_VER_410

#define SD_MMC_HC_CTRL_VER_410 0x04

Definition at line 198 of file SdMmcPciHci.h.

◆ SD_MMC_HC_CTRL_VER_420

#define SD_MMC_HC_CTRL_VER_420 0x05

Definition at line 199 of file SdMmcPciHci.h.

◆ SD_MMC_HC_ERR_INT_SIG_EN

#define SD_MMC_HC_ERR_INT_SIG_EN 0x3A

Definition at line 46 of file SdMmcPciHci.h.

◆ SD_MMC_HC_ERR_INT_STS

#define SD_MMC_HC_ERR_INT_STS 0x32

Definition at line 42 of file SdMmcPciHci.h.

◆ SD_MMC_HC_ERR_INT_STS_EN

#define SD_MMC_HC_ERR_INT_STS_EN 0x36

Definition at line 44 of file SdMmcPciHci.h.

◆ SD_MMC_HC_FORCE_EVT_AUTO_CMD

#define SD_MMC_HC_FORCE_EVT_AUTO_CMD 0x50

Definition at line 51 of file SdMmcPciHci.h.

◆ SD_MMC_HC_FORCE_EVT_ERR_INT

#define SD_MMC_HC_FORCE_EVT_ERR_INT 0x52

Definition at line 52 of file SdMmcPciHci.h.

◆ SD_MMC_HC_HOST_CTRL1

#define SD_MMC_HC_HOST_CTRL1 0x28

Definition at line 34 of file SdMmcPciHci.h.

◆ SD_MMC_HC_HOST_CTRL2

#define SD_MMC_HC_HOST_CTRL2 0x3E

Definition at line 48 of file SdMmcPciHci.h.

◆ SD_MMC_HC_MAX_CURRENT_CAP

#define SD_MMC_HC_MAX_CURRENT_CAP 0x48

Definition at line 50 of file SdMmcPciHci.h.

◆ SD_MMC_HC_MAX_SLOT

#define SD_MMC_HC_MAX_SLOT 6

Definition at line 19 of file SdMmcPciHci.h.

◆ SD_MMC_HC_NOR_INT_SIG_EN

#define SD_MMC_HC_NOR_INT_SIG_EN 0x38

Definition at line 45 of file SdMmcPciHci.h.

◆ SD_MMC_HC_NOR_INT_STS

#define SD_MMC_HC_NOR_INT_STS 0x30

Definition at line 41 of file SdMmcPciHci.h.

◆ SD_MMC_HC_NOR_INT_STS_EN

#define SD_MMC_HC_NOR_INT_STS_EN 0x34

Definition at line 43 of file SdMmcPciHci.h.

◆ SD_MMC_HC_POWER_CTRL

#define SD_MMC_HC_POWER_CTRL 0x29

Definition at line 35 of file SdMmcPciHci.h.

◆ SD_MMC_HC_PRESENT_STATE

#define SD_MMC_HC_PRESENT_STATE 0x24

Definition at line 33 of file SdMmcPciHci.h.

◆ SD_MMC_HC_PRESET_VAL

#define SD_MMC_HC_PRESET_VAL 0x60

Definition at line 55 of file SdMmcPciHci.h.

◆ SD_MMC_HC_RESPONSE

#define SD_MMC_HC_RESPONSE 0x10

Definition at line 31 of file SdMmcPciHci.h.

◆ SD_MMC_HC_SDMA_ADDR

#define SD_MMC_HC_SDMA_ADDR 0x00

Definition at line 24 of file SdMmcPciHci.h.

◆ SD_MMC_HC_SHARED_BUS_CTRL

#define SD_MMC_HC_SHARED_BUS_CTRL 0xE0

Definition at line 56 of file SdMmcPciHci.h.

◆ SD_MMC_HC_SLOT_INT_STS

#define SD_MMC_HC_SLOT_INT_STS 0xFC

Definition at line 57 of file SdMmcPciHci.h.

◆ SD_MMC_HC_SLOT_OFFSET

#define SD_MMC_HC_SLOT_OFFSET 0x40

Definition at line 17 of file SdMmcPciHci.h.

◆ SD_MMC_HC_SW_RST

#define SD_MMC_HC_SW_RST 0x2F

Definition at line 40 of file SdMmcPciHci.h.

◆ SD_MMC_HC_TIMEOUT_CTRL

#define SD_MMC_HC_TIMEOUT_CTRL 0x2E

Definition at line 39 of file SdMmcPciHci.h.

◆ SD_MMC_HC_TRANS_MOD

#define SD_MMC_HC_TRANS_MOD 0x0C

Definition at line 29 of file SdMmcPciHci.h.

◆ SD_MMC_HC_V4_EN

#define SD_MMC_HC_V4_EN BIT12

Definition at line 204 of file SdMmcPciHci.h.

◆ SD_MMC_HC_WAKEUP_CTRL

#define SD_MMC_HC_WAKEUP_CTRL 0x2B

Definition at line 37 of file SdMmcPciHci.h.

◆ SD_MMC_SDMA_BOUNDARY

#define SD_MMC_SDMA_BOUNDARY 512 * 1024

Definition at line 145 of file SdMmcPciHci.h.

◆ SD_MMC_SDMA_ROUND_UP

#define SD_MMC_SDMA_ROUND_UP	(	x,
		n
	)	(((x) + n) & ~(n - 1))

Definition at line 146 of file SdMmcPciHci.h.

Enumeration Type Documentation

◆ SD_MMC_HC_ADMA_LENGTH_MODE

enum SD_MMC_HC_ADMA_LENGTH_MODE

Definition at line 92 of file SdMmcPciHci.h.

◆ SD_MMC_HC_TRANSFER_MODE

enum SD_MMC_HC_TRANSFER_MODE

Definition at line 80 of file SdMmcPciHci.h.

Function Documentation

◆ DumpCapabilityReg()

VOID DumpCapabilityReg	(	IN UINT8	Slot,
		IN SD_MMC_HC_SLOT_CAP *	Capability
	)

Dump the content of SD/MMC host controller's Capability Register.

Parameters

[in]	Slot	The slot number of the SD card to send the command to.
[in]	Capability	The buffer to store the capability data.

Definition at line 25 of file SdMmcPciHci.c.

◆ SdMmcHcAndMmio()

EFI_STATUS EFIAPI SdMmcHcAndMmio	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	BarIndex,
		IN UINT32	Offset,
		IN UINT8	Count,
		IN VOID *	AndData
	)

Do AND operation with the value of the specified SD/MMC host controller mmio register.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	BarIndex	The BAR index of the standard PCI Configuration header to use as the base address for the memory operation to perform.
[in]	Offset	The offset within the selected BAR to start the memory operation.
[in]	Count	The width of the mmio register in bytes. Must be 1, 2 , 4 or 8 bytes.
[in]	AndData	The pointer to the data used to do AND operation. The caller is responsible for having ownership of the data buffer and ensuring its size not less than Count bytes.

Return values

EFI_INVALID_PARAMETER	The PciIo or AndData is NULL or the Count is not valid.
EFI_SUCCESS	The AND operation succeeds.
Others	The AND operation fails.

Definition at line 283 of file SdMmcPciHci.c.

◆ SdMmcHcCardDetect()

EFI_STATUS SdMmcHcCardDetect	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot,
		OUT BOOLEAN *	MediaPresent
	)

Detect whether there is a SD/MMC card attached at the specified SD/MMC host controller slot.

Refer to SD Host Controller Simplified spec 3.0 Section 3.1 for details.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[out]	MediaPresent	The pointer to the media present boolean value.

Return values

EFI_SUCCESS	There is no media change happened.
EFI_MEDIA_CHANGED	There is media change happened.
Others	The detection fails.

Definition at line 678 of file SdMmcPciHci.c.

◆ SdMmcHcEnableInterrupt()

EFI_STATUS SdMmcHcEnableInterrupt	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot
	)

Set all interrupt status bits in Normal and Error Interrupt Status Enable register.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.

Return values

EFI_SUCCESS	The operation executes successfully.
Others	The operation fails.

Definition at line 580 of file SdMmcPciHci.c.

◆ SdMmcHcGetCapability()

EFI_STATUS SdMmcHcGetCapability	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot,
		OUT SD_MMC_HC_SLOT_CAP *	Capability
	)

Get the capability data from the specified slot.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[out]	Capability	The buffer to store the capability data.

Return values

EFI_SUCCESS	The operation executes successfully.
Others	The operation fails.

Definition at line 618 of file SdMmcPciHci.c.

◆ SdMmcHcGetControllerVersion()

EFI_STATUS SdMmcHcGetControllerVersion	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot,
		OUT UINT16 *	Version
	)

Get the controller version information from the specified slot.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[out]	Version	The buffer to store the version information.

Return values

EFI_SUCCESS	The operation executes successfully.
Others	The operation fails.

Definition at line 448 of file SdMmcPciHci.c.

◆ SdMmcHcGetMaxCurrent()

EFI_STATUS SdMmcHcGetMaxCurrent	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot,
		OUT UINT64 *	MaxCurrent
	)

Get the maximum current capability data from the specified slot.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[out]	MaxCurrent	The buffer to store the maximum current capability data.

Return values

EFI_SUCCESS	The operation executes successfully.
Others	The operation fails.

Definition at line 649 of file SdMmcPciHci.c.

◆ SdMmcHcGetSlotInfo()

EFI_STATUS EFIAPI SdMmcHcGetSlotInfo	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		OUT UINT8 *	FirstBar,
		OUT UINT8 *	SlotNum
	)

Read SlotInfo register from SD/MMC host controller pci config space.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[out]	FirstBar	The buffer to store the first BAR value.
[out]	SlotNum	The buffer to store the supported slot number.

Return values

EFI_SUCCESS	The operation succeeds.
Others	The operation fails.

Definition at line 92 of file SdMmcPciHci.c.

◆ SdMmcHcInitPowerVoltage()

EFI_STATUS SdMmcHcInitPowerVoltage	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot,
		IN SD_MMC_HC_SLOT_CAP	Capability
	)

Supply SD/MMC card with maximum voltage at initialization.

Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[in]	Capability	The capability of the slot.

Return values

EFI_SUCCESS	The voltage is supplied successfully.
Others	The voltage isn't supplied successfully.

Definition at line 1127 of file SdMmcPciHci.c.

◆ SdMmcHcInitTimeoutCtrl()

EFI_STATUS SdMmcHcInitTimeoutCtrl	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot
	)

Initialize the Timeout Control register with most conservative value at initialization.

Refer to SD Host Controller Simplified spec 3.0 Section 2.2.15 for details.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.

Return values

EFI_SUCCESS	The timeout control register is configured successfully.
Others	The timeout control register isn't configured successfully.

Definition at line 1187 of file SdMmcPciHci.c.

◆ SdMmcHcOrMmio()

EFI_STATUS EFIAPI SdMmcHcOrMmio	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	BarIndex,
		IN UINT32	Offset,
		IN UINT8	Count,
		IN VOID *	OrData
	)

Do OR operation with the value of the specified SD/MMC host controller mmio register.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	BarIndex	The BAR index of the standard PCI Configuration header to use as the base address for the memory operation to perform.
[in]	Offset	The offset within the selected BAR to start the memory operation.
[in]	Count	The width of the mmio register in bytes. Must be 1, 2 , 4 or 8 bytes.
[in]	OrData	The pointer to the data used to do OR operation. The caller is responsible for having ownership of the data buffer and ensuring its size not less than Count bytes.

Return values

EFI_INVALID_PARAMETER	The PciIo or OrData is NULL or the Count is not valid.
EFI_SUCCESS	The OR operation succeeds.
Others	The OR operation fails.

Definition at line 225 of file SdMmcPciHci.c.

◆ SdMmcHcPowerControl()

EFI_STATUS SdMmcHcPowerControl	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot,
		IN UINT8	PowerCtrl
	)

SD/MMC bus power control.

Refer to SD Host Controller Simplified spec 3.0 Section 3.3 for details.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[in]	PowerCtrl	The value setting to the power control register.

Return values

TRUE	There is a SD/MMC card attached.
FALSE	There is no a SD/MMC card attached.

Definition at line 971 of file SdMmcPciHci.c.

◆ SdMmcHcRwMmio()

EFI_STATUS EFIAPI SdMmcHcRwMmio	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	BarIndex,
		IN UINT32	Offset,
		IN BOOLEAN	Read,
		IN UINT8	Count,
		IN OUT VOID *	Data
	)

Read/Write specified SD/MMC host controller mmio register.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	BarIndex	The BAR index of the standard PCI Configuration header to use as the base address for the memory operation to perform.
[in]	Offset	The offset within the selected BAR to start the memory operation.
[in]	Read	A boolean to indicate it's read or write operation.
[in]	Count	The width of the mmio register in bytes. Must be 1, 2 , 4 or 8 bytes.
[in,out]	Data	For read operations, the destination buffer to store the results. For write operations, the source buffer to write data from. The caller is responsible for having ownership of the data buffer and ensuring its size not less than Count bytes.

Return values

EFI_INVALID_PARAMETER	The PciIo or Data is NULL or the Count is not valid.
EFI_SUCCESS	The read/write operation succeeds.
Others	The read/write operation fails.

Definition at line 143 of file SdMmcPciHci.c.

◆ SdMmcHcSetBusWidth()

EFI_STATUS SdMmcHcSetBusWidth	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot,
		IN UINT16	BusWidth
	)

Set the SD/MMC bus width.

Refer to SD Host Controller Simplified spec 3.0 Section 3.4 for details.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[in]	BusWidth	The bus width used by the SD/MMC device, it must be 1, 4 or 8.

Return values

EFI_SUCCESS	The bus width is set successfully.
Others	The bus width isn't set successfully.

Definition at line 1011 of file SdMmcPciHci.c.

◆ SdMmcHcStartSdClock()

EFI_STATUS SdMmcHcStartSdClock	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot
	)

Start the SD clock.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number.

Return values

EFI_SUCCESS	Succeeded to start the SD clock.
Others	Failed to start the SD clock.

Definition at line 785 of file SdMmcPciHci.c.

◆ SdMmcHcStopClock()

EFI_STATUS SdMmcHcStopClock	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot
	)

Stop SD/MMC card clock.

Refer to SD Host Controller Simplified spec 3.0 Section 3.2.2 for details.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.

Return values

EFI_SUCCESS	Succeed to stop SD/MMC clock.
Others	Fail to stop SD/MMC clock.

Definition at line 739 of file SdMmcPciHci.c.

◆ SdMmcHcUhsSignaling()

EFI_STATUS SdMmcHcUhsSignaling	(	IN EFI_HANDLE	ControllerHandle,
		IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	Slot,
		IN SD_MMC_BUS_MODE	Timing
	)

Set SD Host Controller control 2 registry according to selected speed.

Parameters

[in]	ControllerHandle	The handle of the controller.
[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[in]	Timing	The timing to select.

Return values

EFI_SUCCESS	The timing is set successfully.
Others	The timing isn't set successfully.

Set SD Host Controler control 2 registry according to selected speed.

Parameters

[in]	ControllerHandle	The handle of the controller.
[in]	PciIo	The PCI IO protocol instance.
[in]	Slot	The slot number of the SD card to send the command to.
[in]	Timing	The timing to select.

Return values

EFI_SUCCESS	The timing is set successfully.
Others	The timing isn't set successfully.

Definition at line 1310 of file SdMmcPciHci.c.

◆ SdMmcHcWaitMmioSet()

EFI_STATUS EFIAPI SdMmcHcWaitMmioSet	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	BarIndex,
		IN UINT32	Offset,
		IN UINT8	Count,
		IN UINT64	MaskValue,
		IN UINT64	TestValue,
		IN UINT64	Timeout
	)

Wait for the value of the specified MMIO register set to the test value.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	BarIndex	The BAR index of the standard PCI Configuration header to use as the base address for the memory operation to perform.
[in]	Offset	The offset within the selected BAR to start the memory operation.
[in]	Count	The width of the mmio register in bytes. Must be 1, 2, 4 or 8 bytes.
[in]	MaskValue	The mask value of memory.
[in]	TestValue	The test value of memory.
[in]	Timeout	The time out value for wait memory set, uses 1 microsecond as a unit.

Return values

EFI_TIMEOUT	The MMIO register hasn't expected value in timeout range.
EFI_SUCCESS	The MMIO register has expected value.
Others	The MMIO operation fails.

Definition at line 393 of file SdMmcPciHci.c.

◆ SdMmcSetDriverStrength()

EFI_STATUS SdMmcSetDriverStrength	(	IN EFI_PCI_IO_PROTOCOL *	PciIo,
		IN UINT8	SlotIndex,
		IN SD_DRIVER_STRENGTH_TYPE	DriverStrength
	)

Set driver strength in host controller.

Parameters

[in]	PciIo	The PCI IO protocol instance.
[in]	SlotIndex	The slot index of the card.
[in]	DriverStrength	DriverStrength to set in the controller.

Return values

EFI_SUCCESS	Driver strength programmed successfully.
Others	Failed to set driver strength.

Definition at line 1399 of file SdMmcPciHci.c.

Data Structures

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ ADMA_MAX_DATA_PER_LINE_16B

◆ ADMA_MAX_DATA_PER_LINE_26B

◆ SD_MMC_HC_26_DATA_LEN_ADMA_EN

◆ SD_MMC_HC_64_ADDR_EN

◆ SD_MMC_HC_ADMA_ERR_STS

◆ SD_MMC_HC_ADMA_SYS_ADDR

◆ SD_MMC_HC_ARG1

◆ SD_MMC_HC_ARG2

◆ SD_MMC_HC_AUTO_CMD_ERR_STS

◆ SD_MMC_HC_BLK_COUNT

◆ SD_MMC_HC_BLK_GAP_CTRL

◆ SD_MMC_HC_BLK_SIZE

◆ SD_MMC_HC_BUF_DAT_PORT

◆ SD_MMC_HC_CAP

◆ SD_MMC_HC_CLOCK_CTRL

◆ SD_MMC_HC_COMMAND

◆ SD_MMC_HC_CTRL_DRIVER_STRENGTH_MASK

◆ SD_MMC_HC_CTRL_MMC_HS200

◆ SD_MMC_HC_CTRL_MMC_HS400

◆ SD_MMC_HC_CTRL_MMC_HS_DDR

◆ SD_MMC_HC_CTRL_MMC_HS_SDR

◆ SD_MMC_HC_CTRL_MMC_LEGACY

◆ SD_MMC_HC_CTRL_UHS_DDR50

◆ SD_MMC_HC_CTRL_UHS_MASK

◆ SD_MMC_HC_CTRL_UHS_SDR104

◆ SD_MMC_HC_CTRL_UHS_SDR12

◆ SD_MMC_HC_CTRL_UHS_SDR25

◆ SD_MMC_HC_CTRL_UHS_SDR50

◆ SD_MMC_HC_CTRL_VER

◆ SD_MMC_HC_CTRL_VER_100

◆ SD_MMC_HC_CTRL_VER_200

◆ SD_MMC_HC_CTRL_VER_300

◆ SD_MMC_HC_CTRL_VER_400

◆ SD_MMC_HC_CTRL_VER_410

◆ SD_MMC_HC_CTRL_VER_420

◆ SD_MMC_HC_ERR_INT_SIG_EN

◆ SD_MMC_HC_ERR_INT_STS

◆ SD_MMC_HC_ERR_INT_STS_EN

◆ SD_MMC_HC_FORCE_EVT_AUTO_CMD

◆ SD_MMC_HC_FORCE_EVT_ERR_INT

◆ SD_MMC_HC_HOST_CTRL1

◆ SD_MMC_HC_HOST_CTRL2

◆ SD_MMC_HC_MAX_CURRENT_CAP

◆ SD_MMC_HC_MAX_SLOT

◆ SD_MMC_HC_NOR_INT_SIG_EN

◆ SD_MMC_HC_NOR_INT_STS

◆ SD_MMC_HC_NOR_INT_STS_EN

◆ SD_MMC_HC_POWER_CTRL

◆ SD_MMC_HC_PRESENT_STATE

◆ SD_MMC_HC_PRESET_VAL

◆ SD_MMC_HC_RESPONSE

◆ SD_MMC_HC_SDMA_ADDR

◆ SD_MMC_HC_SHARED_BUS_CTRL

◆ SD_MMC_HC_SLOT_INT_STS

◆ SD_MMC_HC_SLOT_OFFSET

◆ SD_MMC_HC_SW_RST

◆ SD_MMC_HC_TIMEOUT_CTRL

◆ SD_MMC_HC_TRANS_MOD

◆ SD_MMC_HC_V4_EN

◆ SD_MMC_HC_WAKEUP_CTRL

◆ SD_MMC_SDMA_BOUNDARY

◆ SD_MMC_SDMA_ROUND_UP

Enumeration Type Documentation

◆ SD_MMC_HC_ADMA_LENGTH_MODE

◆ SD_MMC_HC_TRANSFER_MODE

Function Documentation

◆ DumpCapabilityReg()

◆ SdMmcHcAndMmio()

◆ SdMmcHcCardDetect()

◆ SdMmcHcEnableInterrupt()

◆ SdMmcHcGetCapability()

◆ SdMmcHcGetControllerVersion()

◆ SdMmcHcGetMaxCurrent()

◆ SdMmcHcGetSlotInfo()