TianoCore EDK2 master
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#include <Protocol/MpService.h>
#include <Protocol/SmmCpu.h>
#include <Register/Intel/SmramSaveStateMap.h>
#include <CpuHotPlugData.h>
Go to the source code of this file.
Enumerations | |
enum | SMM_REG_NAME { SmmRegFeatureControl , SmmRegSmmEnable , SmmRegSmmDelayed , SmmRegSmmBlocked } |
Library that provides CPU specific functions to support the PiSmmCpuDxeSmm module.
Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file SmmCpuFeaturesLib.h.
enum SMM_REG_NAME |
Enumeration of SMM registers that are accessed using the library functions SmmCpuFeaturesIsSmmRegisterSupported (), SmmCpuFeaturesGetSmmRegister (), and SmmCpuFeaturesSetSmmRegister ().
Definition at line 22 of file SmmCpuFeaturesLib.h.
VOID EFIAPI SmmCpuFeaturesCompleteSmmReadyToLock | ( | VOID | ) |
This function is hook point called after the gEfiSmmReadyToLockProtocolGuid notification is completely processed.
Definition at line 597 of file SmmCpuFeaturesLib.c.
VOID EFIAPI SmmCpuFeaturesDisableSmrr | ( | VOID | ) |
Disable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs() returns TRUE.
Definition at line 427 of file SmmCpuFeaturesLib.c.
UINTN EFIAPI SmmCpuFeaturesGetSmiHandlerSize | ( | VOID | ) |
Return the size, in bytes, of a custom SMI Handler in bytes. If 0 is returned, then a custom SMI handler is not provided by this library, and the default SMI handler must be used.
0 | Use the default SMI handler. |
> | 0 Use the SMI handler installed by SmmCpuFeaturesInstallSmiHandler() The caller is required to allocate enough SMRAM for each CPU to support the size of the custom SMI handler. |
Return the size, in bytes, of a custom SMI Handler in bytes. If 0 is returned, then a custom SMI handler is not provided by this library, and the default SMI handler must be used.
0 | Use the default SMI handler. |
> | 0 Use the SMI handler installed by SmmCpuFeaturesInstallSmiHandler(). The caller is required to allocate enough SMRAM for each CPU to support the size of the custom SMI handler. |
Definition at line 356 of file SmmCpuFeaturesLib.c.
UINT64 EFIAPI SmmCpuFeaturesGetSmmRegister | ( | IN UINTN | CpuIndex, |
IN SMM_REG_NAME | RegName | ||
) |
Returns the current value of the SMM register for the specified CPU. If the SMM register is not supported, then 0 is returned.
[in] | CpuIndex | The index of the CPU to read the SMM register. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | RegName | Identifies the SMM register to read. |
Definition at line 556 of file SmmCpuFeaturesLib.c.
UINT64 EFIAPI SmmCpuFeaturesHookReturnFromSmm | ( | IN UINTN | CpuIndex, |
IN SMRAM_SAVE_STATE_MAP * | CpuState, | ||
IN UINT64 | NewInstructionPointer32, | ||
IN UINT64 | NewInstructionPointer | ||
) |
This function updates the SMRAM save state on the currently executing CPU to resume execution at a specific address after an RSM instruction. This function must evaluate the SMRAM save state to determine the execution mode the RSM instruction resumes and update the resume execution address with either NewInstructionPointer32 or NewInstructionPoint. The auto HALT restart flag in the SMRAM save state must always be cleared. This function returns the value of the instruction pointer from the SMRAM save state that was replaced. If this function returns 0, then the SMRAM save state was not modified.
This function is called during the very first SMI on each CPU after SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode to signal that the SMBASE of each CPU has been updated before the default SMBASE address is used for the first SMI to the next CPU.
[in] | CpuIndex | The index of the CPU to hook. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | CpuState | Pointer to SMRAM Save State Map for the currently executing CPU. |
[in] | NewInstructionPointer32 | Instruction pointer to use if resuming to 32-bit execution mode from 64-bit SMM. |
[in] | NewInstructionPointer | Instruction pointer to use if resuming to same execution mode as SMM. |
0 | This function did modify the SMRAM save state. |
> | 0 The original instruction pointer value from the SMRAM save state before it was replaced. |
Definition at line 156 of file SmmCpuFeaturesLib.c.
VOID EFIAPI SmmCpuFeaturesInitializeProcessor | ( | IN UINTN | CpuIndex, |
IN BOOLEAN | IsMonarch, | ||
IN EFI_PROCESSOR_INFORMATION * | ProcessorInfo, | ||
IN CPU_HOT_PLUG_DATA * | CpuHotPlugData | ||
) |
Called during the very first SMI into System Management Mode to initialize CPU features, including SMBASE, for the currently executing CPU. Since this is the first SMI, the SMRAM Save State Map is at the default address of SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET. The currently executing CPU is specified by CpuIndex and CpuIndex can be used to access information about the currently executing CPU in the ProcessorInfo array and the HotPlugCpuData data structure.
[in] | CpuIndex | The index of the CPU to initialize. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | IsMonarch | TRUE if the CpuIndex is the index of the CPU that was elected as monarch during System Management Mode initialization. FALSE if the CpuIndex is not the index of the CPU that was elected as monarch during System Management Mode initialization. |
[in] | ProcessorInfo | Pointer to an array of EFI_PROCESSOR_INFORMATION structures. ProcessorInfo[CpuIndex] contains the information for the currently executing CPU. |
[in] | CpuHotPlugData | Pointer to the CPU_HOT_PLUG_DATA structure that contains the ApidId and SmBase arrays. |
Called during the very first SMI into System Management Mode to initialize CPU features, including SMBASE, for the currently executing CPU. Since this is the first SMI, the SMRAM Save State Map is at the default address of AMD_SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET. The currently executing CPU is specified by CpuIndex and CpuIndex can be used to access information about the currently executing CPU in the ProcessorInfo array and the HotPlugCpuData data structure.
[in] | CpuIndex | The index of the CPU to initialize. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | IsMonarch | TRUE if the CpuIndex is the index of the CPU that was elected as monarch during System Management Mode initialization. FALSE if the CpuIndex is not the index of the CPU that was elected as monarch during System Management Mode initialization. |
[in] | ProcessorInfo | Pointer to an array of EFI_PROCESSOR_INFORMATION structures. ProcessorInfo[CpuIndex] contains the information for the currently executing CPU. |
[in] | CpuHotPlugData | Pointer to the CPU_HOT_PLUG_DATA structure that contains the ApidId and SmBase arrays. |
Definition at line 91 of file SmmCpuFeaturesLib.c.
VOID EFIAPI SmmCpuFeaturesInstallSmiHandler | ( | IN UINTN | CpuIndex, |
IN UINT32 | SmBase, | ||
IN VOID * | SmiStack, | ||
IN UINTN | StackSize, | ||
IN UINTN | GdtBase, | ||
IN UINTN | GdtSize, | ||
IN UINTN | IdtBase, | ||
IN UINTN | IdtSize, | ||
IN UINT32 | Cr3 | ||
) |
Install a custom SMI handler for the CPU specified by CpuIndex. This function is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is greater than zero and is called by the CPU that was elected as monarch during System Management Mode initialization.
Append Shadow Stack after normal stack
|= SmiStack +-----------------------------------------------—+------------------------------------------------------------—+ | Known Good Stack | Guard Page | SMM Stack | Known Good Shadow Stack | Guard Page | SMM Shadow Stack | +-----------------------------------------------—+------------------------------------------------------------—+ | |PcdCpuSmmStackSize| |PcdCpuSmmShadowStackSize| |<-----------------— StackSize --------------—>|<----------------------— ShadowStackSize ----------------—>| | | |<-----------------------------------------— Processor N ----------------------------------------------------—>| | low address (bottom) high address (top) |
[in] | CpuIndex | The index of the CPU to install the custom SMI handler. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | SmBase | The SMBASE address for the CPU specified by CpuIndex. |
[in] | SmiStack | The bottom of stack to use when an SMI is processed by the the CPU specified by CpuIndex. |
[in] | StackSize | The size, in bytes, if the stack used when an SMI is processed by the CPU specified by CpuIndex. StackSize should be PcdCpuSmmStackSize, with 2 more pages if PcdCpuSmmStackGuard is true. If ShadowStack is enabled, the shadow stack is allocated after the normal Stack. The size is PcdCpuSmmShadowStackSize. with 2 more pages if PcdCpuSmmStackGuard is true. |
[in] | GdtBase | The base address of the GDT to use when an SMI is processed by the CPU specified by CpuIndex. |
[in] | GdtSize | The size, in bytes, of the GDT used when an SMI is processed by the CPU specified by CpuIndex. |
[in] | IdtBase | The base address of the IDT to use when an SMI is processed by the CPU specified by CpuIndex. |
[in] | IdtSize | The size, in bytes, of the IDT used when an SMI is processed by the CPU specified by CpuIndex. |
[in] | Cr3 | The base address of the page tables to use when an SMI is processed by the CPU specified by CpuIndex. |
Install a custom SMI handler for the CPU specified by CpuIndex. This function is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is greater than zero and is called by the CPU that was elected as monarch during System Management Mode initialization.
[in] | CpuIndex | The index of the CPU to install the custom SMI handler. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | SmBase | The SMBASE address for the CPU specified by CpuIndex. |
[in] | SmiStack | The stack to use when an SMI is processed by the the CPU specified by CpuIndex. |
[in] | StackSize | The size, in bytes, if the stack used when an SMI is processed by the CPU specified by CpuIndex. |
[in] | GdtBase | The base address of the GDT to use when an SMI is processed by the CPU specified by CpuIndex. |
[in] | GdtSize | The size, in bytes, of the GDT used when an SMI is processed by the CPU specified by CpuIndex. |
[in] | IdtBase | The base address of the IDT to use when an SMI is processed by the CPU specified by CpuIndex. |
[in] | IdtSize | The size, in bytes, of the IDT used when an SMI is processed by the CPU specified by CpuIndex. |
[in] | Cr3 | The base address of the page tables to use when an SMI is processed by the CPU specified by CpuIndex. |
Definition at line 390 of file SmmCpuFeaturesLib.c.
BOOLEAN EFIAPI SmmCpuFeaturesIsSmmRegisterSupported | ( | IN UINTN | CpuIndex, |
IN SMM_REG_NAME | RegName | ||
) |
Check to see if an SMM register is supported by a specified CPU.
[in] | CpuIndex | The index of the CPU to check for SMM register support. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | RegName | Identifies the SMM register to check for support. |
TRUE | The SMM register specified by RegName is supported by the CPU specified by CpuIndex. |
FALSE | The SMM register specified by RegName is not supported by the CPU specified by CpuIndex. |
Definition at line 533 of file SmmCpuFeaturesLib.c.
BOOLEAN EFIAPI SmmCpuFeaturesNeedConfigureMtrrs | ( | VOID | ) |
Determines if MTRR registers must be configured to set SMRAM cache-ability when executing in System Management Mode.
TRUE | MTRR registers must be configured to set SMRAM cache-ability. |
FALSE | MTRR registers do not need to be configured to set SMRAM cache-ability. |
Definition at line 414 of file SmmCpuFeaturesLib.c.
VOID EFIAPI SmmCpuFeaturesReenableSmrr | ( | VOID | ) |
Enable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs() returns TRUE.
Definition at line 442 of file SmmCpuFeaturesLib.c.
Processor specific hook point each time a CPU enters System Management Mode.
[in] | CpuIndex | The index of the CPU that has entered SMM. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
Definition at line 460 of file SmmCpuFeaturesLib.c.
Processor specific hook point each time a CPU exits System Management Mode.
[in] | CpuIndex | The index of the CPU that is exiting SMM. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
Definition at line 478 of file SmmCpuFeaturesLib.c.
VOID EFIAPI SmmCpuFeaturesSetSmmRegister | ( | IN UINTN | CpuIndex, |
IN SMM_REG_NAME | RegName, | ||
IN UINT64 | Value | ||
) |
Sets the value of an SMM register on a specified CPU. If the SMM register is not supported, then no action is performed.
[in] | CpuIndex | The index of the CPU to write the SMM register. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | RegName | Identifies the SMM register to write. registers are read-only. |
[in] | Value | The value to write to the SMM register. |
Definition at line 582 of file SmmCpuFeaturesLib.c.
VOID EFIAPI SmmCpuFeaturesSmmRelocationComplete | ( | VOID | ) |
Hook point in normal execution mode that allows the one CPU that was elected as monarch during System Management Mode initialization to perform additional initialization actions immediately after all of the CPUs have processed their first SMI and called SmmCpuFeaturesInitializeProcessor() relocating SMBASE into a buffer in SMRAM and called SmmCpuFeaturesHookReturnFromSmm().
Definition at line 282 of file SmmCpuFeaturesLib.c.