43 if (
CompareMem (DevicePath1, DevicePath2, Size1) != 0) {
70 if (SpiChip->Protocol.SpiPeripheral->ChipSelect !=
NULL) {
71 Status = SpiChip->Protocol.SpiPeripheral->ChipSelect (
72 SpiChip->BusTransaction.SpiPeripheral,
76 Status = SpiChip->SpiHc->ChipSelect (
78 SpiChip->BusTransaction.SpiPeripheral,
117 return EFI_INVALID_PARAMETER;
120 if (((SpiChip->BusTransaction.BusWidth != 1) && (SpiChip->BusTransaction.BusWidth != 2) && (SpiChip->BusTransaction.BusWidth != 4) &&
121 (SpiChip->BusTransaction.BusWidth != 8)) || (SpiChip->BusTransaction.FrameSize == 0))
123 return EFI_INVALID_PARAMETER;
126 if ((SpiChip->BusTransaction.BusWidth == 8) && (((SpiChip->Protocol.Attributes & SPI_IO_SUPPORTS_8_BIT_DATA_BUS_WIDTH) != SPI_IO_SUPPORTS_8_BIT_DATA_BUS_WIDTH) ||
127 ((SpiChip->BusTransaction.SpiPeripheral->Attributes & SPI_PART_SUPPORTS_8_BIT_DATA_BUS_WIDTH) != SPI_PART_SUPPORTS_8_BIT_DATA_BUS_WIDTH)))
129 return EFI_INVALID_PARAMETER;
130 }
else if ((SpiChip->BusTransaction.BusWidth == 4) && (((SpiChip->Protocol.Attributes & SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH) != SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH) ||
131 ((SpiChip->BusTransaction.SpiPeripheral->Attributes & SPI_PART_SUPPORTS_4_BIT_DATA_BUS_WIDTH) != SPI_PART_SUPPORTS_4_BIT_DATA_BUS_WIDTH)))
133 return EFI_INVALID_PARAMETER;
134 }
else if ((SpiChip->BusTransaction.BusWidth == 2) && (((SpiChip->Protocol.Attributes & SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH) != SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH) ||
137 return EFI_INVALID_PARAMETER;
140 if (((SpiChip->BusTransaction.WriteBytes > 0) && (SpiChip->BusTransaction.WriteBuffer ==
NULL)) || ((SpiChip->BusTransaction.ReadBytes > 0) && (SpiChip->BusTransaction.ReadBuffer ==
NULL))) {
141 return EFI_INVALID_PARAMETER;
144 if ((SpiChip->BusTransaction.TransactionType ==
SPI_TRANSACTION_FULL_DUPLEX) && (SpiChip->BusTransaction.ReadBytes != SpiChip->BusTransaction.WriteBytes)) {
145 return EFI_INVALID_PARAMETER;
149 if ((SpiChip->Protocol.FrameSizeSupportMask & (1<<(SpiChip->BusTransaction.FrameSize-1))) == 0) {
150 return EFI_UNSUPPORTED;
234 IN BOOLEAN DebugTransaction,
235 IN UINT32 ClockHz OPTIONAL,
238 IN UINT32 WriteBytes,
239 IN UINT8 *WriteBuffer,
241 OUT UINT8 *ReadBuffer
247 UINT8 *DummyReadBuffer;
248 UINT8 *DummyWriteBuffer;
250 SpiChip = SPI_IO_CHIP_FROM_THIS (This);
255 SpiChip->BusTransaction.
BusWidth = BusWidth;
256 SpiChip->BusTransaction.
FrameSize = FrameSize;
257 SpiChip->BusTransaction.
WriteBytes = WriteBytes;
259 SpiChip->BusTransaction.
ReadBytes = ReadBytes;
260 SpiChip->BusTransaction.
ReadBuffer = ReadBuffer;
264 if (EFI_ERROR (Status)) {
282 Status = SpiChip->SpiHc->
Clock (
289 if (EFI_ERROR (Status)) {
295 if (EFI_ERROR (Status)) {
309 &SpiChip->BusTransaction
312 SpiChip->BusTransaction.
ReadBytes = ReadBytes;
315 ((SpiChip->SpiHc->
Attributes & HC_SUPPORTS_READ_ONLY_OPERATIONS) != HC_SUPPORTS_READ_ONLY_OPERATIONS))
323 &SpiChip->BusTransaction
326 SpiChip->BusTransaction.
WriteBytes = WriteBytes;
329 ((SpiChip->SpiHc->
Attributes & HC_SUPPORTS_WRITE_THEN_READ_OPERATIONS) != HC_SUPPORTS_WRITE_THEN_READ_OPERATIONS))
334 SpiChip->BusTransaction.
ReadBuffer = DummyReadBuffer;
335 SpiChip->BusTransaction.
ReadBytes = WriteBytes;
339 &SpiChip->BusTransaction
342 if (EFI_ERROR (Status)) {
347 SpiChip->BusTransaction.
ReadBuffer = ReadBuffer;
348 SpiChip->BusTransaction.
ReadBytes = ReadBytes;
350 SpiChip->BusTransaction.
WriteBuffer = DummyWriteBuffer;
351 SpiChip->BusTransaction.
WriteBytes = ReadBytes;
355 &SpiChip->BusTransaction
359 SpiChip->BusTransaction.
WriteBytes = WriteBytes;
367 &SpiChip->BusTransaction
371 if (EFI_ERROR (Status)) {
407 DEBUG ((DEBUG_VERBOSE,
"%a: SPI Bus - Entry\n", __func__));
409 SpiChip = SPI_IO_CHIP_FROM_THIS (This);
411 if ((SpiPeripheral ==
NULL) || (SpiPeripheral->SpiBus ==
NULL) ||
412 (SpiPeripheral->SpiPart ==
NULL))
414 return EFI_INVALID_PARAMETER;
419 return EFI_INVALID_PARAMETER;
428 "%a: SPI Bus - Exit Status=%r\n",
INTN EFIAPI CompareMem(IN CONST VOID *DestinationBuffer, IN CONST VOID *SourceBuffer, IN UINTN Length)
UINTN EFIAPI GetDevicePathSize(IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath)
VOID *EFIAPI AllocateZeroPool(IN UINTN AllocationSize)
VOID EFIAPI FreePool(IN VOID *Buffer)
#define DEBUG(Expression)
#define HC_SUPPORTS_WRITE_ONLY_OPERATIONS
EFI_STATUS EFIAPI SpiChipSelect(IN CONST SPI_IO_CHIP *SpiChip, IN BOOLEAN PinValue)
EFI_STATUS EFIAPI UpdateSpiPeripheral(IN CONST EFI_SPI_IO_PROTOCOL *This, IN CONST EFI_SPI_PERIPHERAL *SpiPeripheral)
EFI_STATUS EFIAPI Transaction(IN CONST EFI_SPI_IO_PROTOCOL *This, IN EFI_SPI_TRANSACTION_TYPE TransactionType, IN BOOLEAN DebugTransaction, IN UINT32 ClockHz OPTIONAL, IN UINT32 BusWidth, IN UINT32 FrameSize, IN UINT32 WriteBytes, IN UINT8 *WriteBuffer, IN UINT32 ReadBytes, OUT UINT8 *ReadBuffer)
BOOLEAN EFIAPI DevicePathsAreEqual(IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath1, IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath2)
EFI_STATUS EFIAPI IsValidSpiTransaction(IN SPI_IO_CHIP *SpiChip)
#define SPI_PART_SUPPORTS_2_BIT_DATA_BUS_WIDTH
@ SPI_TRANSACTION_FULL_DUPLEX
@ SPI_TRANSACTION_READ_ONLY
@ SPI_TRANSACTION_WRITE_ONLY
@ SPI_TRANSACTION_WRITE_THEN_READ
CONST EFI_SPI_PERIPHERAL * SpiPeripheral
EFI_SPI_TRANSACTION_TYPE TransactionType
CONST EFI_DEVICE_PATH_PROTOCOL * ControllerPath
EFI_SPI_HC_PROTOCOL_TRANSACTION Transaction
EFI_SPI_HC_PROTOCOL_CLOCK Clock
CONST EFI_SPI_PERIPHERAL * SpiPeripheral
CONST EFI_SPI_PERIPHERAL * OriginalSpiPeripheral
BOOLEAN ChipSelectPolarity
CONST EFI_SPI_BUS * SpiBus
CONST EFI_SPI_PART * SpiPart