UhciQueue.h

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#ifndef _EFI_UHCI_QUEUE_H_
#define _EFI_UHCI_QUEUE_H_
 
//
// Macroes used to set various links in UHCI's driver.
// In this UHCI driver, QH's horizontal link always pointers to other QH,
// and its vertical link always pointers to TD. TD's next pointer always
// pointers to other sibling TD. Frame link always pointers to QH because
// ISO transfer isn't supported.
//
// We should use UINT32 to access these pointers to void race conditions
// with hardware.
//
#define QH_HLINK(Pointer, Terminate)  \
        (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | 0x02 | ((Terminate) ? 0x01 : 0))
 
#define QH_VLINK(Pointer, Terminate)  \
        (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | ((Terminate) ? 0x01 : 0))
 
#define TD_LINK(Pointer, VertFirst, Terminate) \
        (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | \
         ((VertFirst) ? 0x04 : 0) | ((Terminate) ? 0x01 : 0))
 
#define LINK_TERMINATED(Link)  (((Link) & 0x01) != 0)
 
#define UHCI_ADDR(QhOrTd)  ((VOID *) (UINTN) ((QhOrTd) & 0xFFFFFFF0))
 
#pragma pack(1)
//
// Both links in QH has this internal structure:
//   Next pointer: 28, Reserved: 2, NextIsQh: 1, Terminate: 1
// This is the same as frame list entry.
//
typedef struct {
  UINT32    HorizonLink;
  UINT32    VerticalLink;
} UHCI_QH_HW;
 
//
// Next link in TD has this internal structure:
//   Next pointer: 28, Reserved: 1, Vertical First: 1, NextIsQh: 1, Terminate: 1
//
typedef struct {
  UINT32    NextLink;
  UINT32    ActualLen    : 11;
  UINT32    Reserved1    : 5;
  UINT32    Status       : 8;
  UINT32    IntOnCpl     : 1;
  UINT32    IsIsoch      : 1;
  UINT32    LowSpeed     : 1;
  UINT32    ErrorCount   : 2;
  UINT32    ShortPacket  : 1;
  UINT32    Reserved2    : 2;
  UINT32    PidCode      : 8;
  UINT32    DeviceAddr   : 7;
  UINT32    EndPoint     : 4;
  UINT32    DataToggle   : 1;
  UINT32    Reserved3    : 1;
  UINT32    MaxPacketLen : 11;
  UINT32    DataBuffer;
} UHCI_TD_HW;
#pragma pack()
 
typedef struct _UHCI_TD_SW  UHCI_TD_SW;
typedef struct _UHCI_QH_SW  UHCI_QH_SW;
 
struct _UHCI_QH_SW {
  UHCI_QH_HW    QhHw;
  UHCI_QH_SW    *NextQh;
  UHCI_TD_SW    *TDs;
  UINTN         Interval;
};
 
struct _UHCI_TD_SW {
  UHCI_TD_HW    TdHw;
  UHCI_TD_SW    *NextTd;
  UINT8         *Data;
  UINT16        DataLen;
};
 
VOID
UhciLinkTdToQh (
  IN USB_HC_DEV  *Uhc,
  IN UHCI_QH_SW  *Qh,
  IN UHCI_TD_SW  *Td
  );
 
VOID
UhciUnlinkTdFromQh (
  IN UHCI_QH_SW  *Qh,
  IN UHCI_TD_SW  *Td
  );
 
EFI_STATUS
UhciMapUserRequest (
  IN  USB_HC_DEV  *Uhc,
  IN  OUT VOID    *Request,
  OUT UINT8       **MappedAddr,
  OUT VOID        **Map
  );
 
EFI_STATUS
UhciMapUserData (
  IN  USB_HC_DEV              *Uhc,
  IN  EFI_USB_DATA_DIRECTION  Direction,
  IN  VOID                    *Data,
  IN  OUT UINTN               *Len,
  OUT UINT8                   *PktId,
  OUT UINT8                   **MappedAddr,
  OUT VOID                    **Map
  );
 
VOID
UhciDestoryTds (
  IN USB_HC_DEV  *Uhc,
  IN UHCI_TD_SW  *FirstTd
  );
 
UHCI_QH_SW *
UhciCreateQh (
  IN  USB_HC_DEV  *Uhc,
  IN  UINTN       Interval
  );
 
UHCI_TD_SW *
UhciCreateCtrlTds (
  IN USB_HC_DEV  *Uhc,
  IN UINT8       DeviceAddr,
  IN UINT8       DataPktId,
  IN UINT8       *Request,
  IN UINT8       *RequestPhy,
  IN UINT8       *Data,
  IN UINT8       *DataPhy,
  IN UINTN       DataLen,
  IN UINT8       MaxPacket,
  IN BOOLEAN     IsLow
  );
 
UHCI_TD_SW *
UhciCreateBulkOrIntTds (
  IN USB_HC_DEV  *Uhc,
  IN UINT8       DevAddr,
  IN UINT8       EndPoint,
  IN UINT8       PktId,
  IN UINT8       *Data,
  IN UINT8       *DataPhy,
  IN UINTN       DataLen,
  IN OUT UINT8   *DataToggle,
  IN UINT8       MaxPacket,
  IN BOOLEAN     IsLow
  );
 
#endif