TianoCore EDK2 master
|
Go to the source code of this file.
Data Structures | |
struct | EFI_VECTOR_HANDOFF_INFO |
struct | _EFI_PEI_VECTOR_HANDOFF_INFO_PPI |
Macros | |
#define | EFI_PEI_VECTOR_HANDOFF_INFO_PPI_GUID { 0x3cd652b4, 0x6d33, 0x4dce, { 0x89, 0xdb, 0x83, 0xdf, 0x97, 0x66, 0xfc, 0xca }} |
#define | EFI_VECTOR_HANDOFF_DO_NOT_HOOK 0x00000000 |
#define | EFI_VECTOR_HANDOFF_HOOK_BEFORE 0x00000001 |
#define | EFI_VECTOR_HANDOFF_HOOK_AFTER 0x00000002 |
#define | EFI_VECTOR_HANDOFF_LAST_ENTRY 0x80000000 |
Typedefs | |
typedef struct _EFI_PEI_VECTOR_HANDOFF_INFO_PPI | EFI_PEI_VECTOR_HANDOFF_INFO_PPI |
Variables | |
EFI_GUID | gEfiVectorHandoffInfoPpiGuid |
This file declares Vector Handoff Info PPI that describes an array of interrupt and/or exception vectors that are in use and need to persist.
This is an optional PPI that may be produced by SEC. If present, it provides a description of the interrupt and/or exception vectors that were established in the SEC Phase and need to persist into PEI and DXE.
Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file VectorHandoffInfo.h.
#define EFI_PEI_VECTOR_HANDOFF_INFO_PPI_GUID { 0x3cd652b4, 0x6d33, 0x4dce, { 0x89, 0xdb, 0x83, 0xdf, 0x97, 0x66, 0xfc, 0xca }} |
NOTE: EFI_PEI_VECTOR_HANDOFF_INFO_PPI_GUID can also be used in the PEI Phase to build a GUIDed HOB that contains an array of EFI_VECTOR_HANDOFF_INFO.
Definition at line 24 of file VectorHandoffInfo.h.
#define EFI_VECTOR_HANDOFF_DO_NOT_HOOK 0x00000000 |
Vector Handoff Info Attributes
Definition at line 30 of file VectorHandoffInfo.h.
#define EFI_VECTOR_HANDOFF_HOOK_AFTER 0x00000002 |
Definition at line 32 of file VectorHandoffInfo.h.
#define EFI_VECTOR_HANDOFF_HOOK_BEFORE 0x00000001 |
Definition at line 31 of file VectorHandoffInfo.h.
#define EFI_VECTOR_HANDOFF_LAST_ENTRY 0x80000000 |
Definition at line 33 of file VectorHandoffInfo.h.
typedef struct _EFI_PEI_VECTOR_HANDOFF_INFO_PPI EFI_PEI_VECTOR_HANDOFF_INFO_PPI |
Provides a description of the interrupt and/or exception vectors that were established in the SEC Phase and need to persist into PEI and DXE.