Data Structures
struct	HCSPARAMS1

union	XHC_HCSPARAMS1

struct	HCSPARAMS2

union	XHC_HCSPARAMS2

struct	HCCPARAMS

union	XHC_HCCPARAMS

struct	SUPPORTED_PROTOCOL_DW0

union	XHC_SUPPORTED_PROTOCOL_DW0

struct	XHC_SUPPORTED_PROTOCOL_DW1

struct	SUPPORTED_PROTOCOL_DW2

union	XHC_SUPPORTED_PROTOCOL_DW2

struct	SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID

union	XHC_SUPPORTED_PROTOCOL_PROTOCOL_SPEED_ID

struct	USB_PORT_STATE_MAP

struct	USB_CLEAR_PORT_MAP

Macros
#define	PCI_IF_XHCI 0x30

#define	XHC_BAR_INDEX 0x00

#define	XHC_PCI_BAR_OFFSET 0x10

#define	XHC_PCI_BAR_MASK 0xFFFF

#define	XHC_PCI_SBRN_OFFSET 0x60

#define	USB_HUB_CLASS_CODE 0x09

#define	USB_HUB_SUBCLASS_CODE 0x00

#define	XHC_CAP_USB_LEGACY 0x01

#define	XHC_CAP_USB_DEBUG 0x0A

#define	XHC_CAP_USB_SUPPORTED_PROTOCOL 0x02

#define	XHC_CAPLENGTH_OFFSET 0x00

#define	XHC_HCIVERSION_OFFSET 0x02

#define	XHC_HCSPARAMS1_OFFSET 0x04

#define	XHC_HCSPARAMS2_OFFSET 0x08

#define	XHC_HCSPARAMS3_OFFSET 0x0c

#define	XHC_HCCPARAMS_OFFSET 0x10

#define	XHC_DBOFF_OFFSET 0x14

#define	XHC_RTSOFF_OFFSET 0x18

#define	XHC_USBCMD_OFFSET 0x0000

#define	XHC_USBSTS_OFFSET 0x0004

#define	XHC_PAGESIZE_OFFSET 0x0008

#define	XHC_DNCTRL_OFFSET 0x0014

#define	XHC_CRCR_OFFSET 0x0018

#define	XHC_DCBAAP_OFFSET 0x0030

#define	XHC_CONFIG_OFFSET 0x0038

#define	XHC_PORTSC_OFFSET 0x0400

#define	XHC_MFINDEX_OFFSET 0x00

#define	XHC_IMAN_OFFSET 0x20

#define	XHC_IMOD_OFFSET 0x24

#define	XHC_ERSTSZ_OFFSET 0x28

#define	XHC_ERSTBA_OFFSET 0x30

#define	XHC_ERDP_OFFSET 0x38

#define	XHC_DC_DCCTRL 0x20

#define	USBLEGSP_BIOS_SEMAPHORE BIT16

#define	USBLEGSP_OS_SEMAPHORE BIT24

#define	XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2 0x02

#define	XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3 0x03

#define	XHC_SUPPORTED_PROTOCOL_NAME_STRING_OFFSET 0x04

#define	XHC_SUPPORTED_PROTOCOL_NAME_STRING_VALUE 0x20425355

#define	XHC_SUPPORTED_PROTOCOL_DW2_OFFSET 0x08

#define	XHC_SUPPORTED_PROTOCOL_PSI_OFFSET 0x10

#define	XHC_SUPPORTED_PROTOCOL_USB2_HIGH_SPEED_PSIM 480

#define	XHC_SUPPORTED_PROTOCOL_USB2_LOW_SPEED_PSIM 1500

#define	XHC_USBCMD_RUN BIT0

#define	XHC_USBCMD_RESET BIT1

#define	XHC_USBCMD_INTE BIT2

#define	XHC_USBCMD_HSEE BIT3

#define	XHC_USBSTS_HALT BIT0

#define	XHC_USBSTS_HSE BIT2

#define	XHC_USBSTS_EINT BIT3

#define	XHC_USBSTS_PCD BIT4

#define	XHC_USBSTS_SSS BIT8

#define	XHC_USBSTS_RSS BIT9

#define	XHC_USBSTS_SRE BIT10

#define	XHC_USBSTS_CNR BIT11

#define	XHC_USBSTS_HCE BIT12

#define	XHC_PAGESIZE_MASK 0xFFFF

#define	XHC_CRCR_RCS BIT0

#define	XHC_CRCR_CS BIT1

#define	XHC_CRCR_CA BIT2

#define	XHC_CRCR_CRR BIT3

#define	XHC_CONFIG_MASK 0xFF

#define	XHC_PORTSC_CCS BIT0

#define	XHC_PORTSC_PED BIT1

#define	XHC_PORTSC_OCA BIT3

#define	XHC_PORTSC_RESET BIT4

#define	XHC_PORTSC_PLS (BIT5\|BIT6\|BIT7\|BIT8)

#define	XHC_PORTSC_PP BIT9

#define	XHC_PORTSC_PS (BIT10\|BIT11\|BIT12\|BIT13)

#define	XHC_PORTSC_LWS BIT16

#define	XHC_PORTSC_CSC BIT17

#define	XHC_PORTSC_PEC BIT18

#define	XHC_PORTSC_WRC BIT19

#define	XHC_PORTSC_OCC BIT20

#define	XHC_PORTSC_PRC BIT21

#define	XHC_PORTSC_PLC BIT22

#define	XHC_PORTSC_CEC BIT23

#define	XHC_PORTSC_CAS BIT24

#define	XHC_HUB_PORTSC_CCS BIT0

#define	XHC_HUB_PORTSC_PED BIT1

#define	XHC_HUB_PORTSC_OCA BIT3

#define	XHC_HUB_PORTSC_RESET BIT4

#define	XHC_HUB_PORTSC_PP BIT9

#define	XHC_HUB_PORTSC_CSC BIT16

#define	XHC_HUB_PORTSC_PEC BIT17

#define	XHC_HUB_PORTSC_OCC BIT19

#define	XHC_HUB_PORTSC_PRC BIT20

#define	XHC_HUB_PORTSC_BHRC BIT21

#define	XHC_IMAN_IP BIT0

#define	XHC_IMAN_IE BIT1

#define	XHC_IMODI_MASK 0x0000FFFF

#define	XHC_IMODC_MASK 0xFFFF0000

Enumerations
enum	XHC_PORT_FEATURE { Usb3PortBHPortReset = 28 , Usb3PortBHPortResetChange = 29 , Usb3PortBHPortReset = 28 , Usb3PortBHPortResetChange = 29 }

Functions
UINT8	XhcReadCapReg8 (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset)

UINT32	XhcReadCapReg (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset)

UINT32	XhcReadOpReg (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset)

VOID	XhcWriteOpReg (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset, IN UINT32 Data)

UINT32	XhcReadRuntimeReg (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset)

VOID	XhcWriteRuntimeReg (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset, IN UINT32 Data)

VOID	XhcWriteDoorBellReg (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset, IN UINT32 Data)

VOID	XhcSetOpRegBit (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset, IN UINT32 Bit)

VOID	XhcClearOpRegBit (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset, IN UINT32 Bit)

EFI_STATUS	XhcWaitOpRegBit (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset, IN UINT32 Bit, IN BOOLEAN WaitToSet, IN UINT32 Timeout)

VOID	XhcSetRuntimeRegBit (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset, IN UINT32 Bit)

VOID	XhcClearRuntimeRegBit (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset, IN UINT32 Bit)

UINT32	XhcReadExtCapReg (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Offset)

BOOLEAN	XhcIsHalt (IN USB_XHCI_INSTANCE *Xhc)

BOOLEAN	XhcIsSysError (IN USB_XHCI_INSTANCE *Xhc)

EFI_STATUS	XhcResetHC (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Timeout)

EFI_STATUS	XhcHaltHC (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Timeout)

EFI_STATUS	XhcRunHC (IN USB_XHCI_INSTANCE *Xhc, IN UINT32 Timeout)

UINT32	XhcGetCapabilityAddr (IN USB_XHCI_INSTANCE *Xhc, IN UINT8 CapId)

UINT32	XhcGetSupportedProtocolCapabilityAddr (IN USB_XHCI_INSTANCE *Xhc, IN UINT8 MajorVersion)

UINT16	XhcCheckUsbPortSpeedUsedPsic (IN USB_XHCI_INSTANCE *Xhc, IN UINT8 PortSpeed, IN UINT8 PortNumber)

Detailed Description

This file contains the register definition of XHCI host controller.

Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file XhciReg.h.

Macro Definition Documentation

◆ PCI_IF_XHCI

#define PCI_IF_XHCI 0x30

Definition at line 13 of file XhciReg.h.

◆ USB_HUB_CLASS_CODE

#define USB_HUB_CLASS_CODE 0x09

Definition at line 25 of file XhciReg.h.

◆ USB_HUB_SUBCLASS_CODE

#define USB_HUB_SUBCLASS_CODE 0x00

Definition at line 26 of file XhciReg.h.

◆ USBLEGSP_BIOS_SEMAPHORE

#define USBLEGSP_BIOS_SEMAPHORE BIT16

Definition at line 75 of file XhciReg.h.

◆ USBLEGSP_OS_SEMAPHORE

#define USBLEGSP_OS_SEMAPHORE BIT24

Definition at line 76 of file XhciReg.h.

◆ XHC_BAR_INDEX

#define XHC_BAR_INDEX 0x00

Definition at line 18 of file XhciReg.h.

◆ XHC_CAP_USB_DEBUG

#define XHC_CAP_USB_DEBUG 0x0A

Definition at line 29 of file XhciReg.h.

◆ XHC_CAP_USB_LEGACY

#define XHC_CAP_USB_LEGACY 0x01

Definition at line 28 of file XhciReg.h.

◆ XHC_CAP_USB_SUPPORTED_PROTOCOL

#define XHC_CAP_USB_SUPPORTED_PROTOCOL 0x02

Definition at line 30 of file XhciReg.h.

◆ XHC_CAPLENGTH_OFFSET

#define XHC_CAPLENGTH_OFFSET 0x00

Definition at line 39 of file XhciReg.h.

◆ XHC_CONFIG_MASK

#define XHC_CONFIG_MASK 0xFF

Definition at line 219 of file XhciReg.h.

◆ XHC_CONFIG_OFFSET

#define XHC_CONFIG_OFFSET 0x0038

Definition at line 57 of file XhciReg.h.

◆ XHC_CRCR_CA

#define XHC_CRCR_CA BIT2

Definition at line 216 of file XhciReg.h.

◆ XHC_CRCR_CRR

#define XHC_CRCR_CRR BIT3

Definition at line 217 of file XhciReg.h.

◆ XHC_CRCR_CS

#define XHC_CRCR_CS BIT1

Definition at line 215 of file XhciReg.h.

◆ XHC_CRCR_OFFSET

#define XHC_CRCR_OFFSET 0x0018

Definition at line 55 of file XhciReg.h.

◆ XHC_CRCR_RCS

#define XHC_CRCR_RCS BIT0

Definition at line 214 of file XhciReg.h.

◆ XHC_DBOFF_OFFSET

#define XHC_DBOFF_OFFSET 0x14

Definition at line 45 of file XhciReg.h.

◆ XHC_DC_DCCTRL

#define XHC_DC_DCCTRL 0x20

Definition at line 73 of file XhciReg.h.

◆ XHC_DCBAAP_OFFSET

#define XHC_DCBAAP_OFFSET 0x0030

Definition at line 56 of file XhciReg.h.

◆ XHC_DNCTRL_OFFSET

#define XHC_DNCTRL_OFFSET 0x0014

Definition at line 54 of file XhciReg.h.

◆ XHC_ERDP_OFFSET

#define XHC_ERDP_OFFSET 0x38

Definition at line 68 of file XhciReg.h.

◆ XHC_ERSTBA_OFFSET

#define XHC_ERSTBA_OFFSET 0x30

Definition at line 67 of file XhciReg.h.

◆ XHC_ERSTSZ_OFFSET

#define XHC_ERSTSZ_OFFSET 0x28

Definition at line 66 of file XhciReg.h.

◆ XHC_HCCPARAMS_OFFSET

#define XHC_HCCPARAMS_OFFSET 0x10

Definition at line 44 of file XhciReg.h.

◆ XHC_HCIVERSION_OFFSET

#define XHC_HCIVERSION_OFFSET 0x02

Definition at line 40 of file XhciReg.h.

◆ XHC_HCSPARAMS1_OFFSET

#define XHC_HCSPARAMS1_OFFSET 0x04

Definition at line 41 of file XhciReg.h.

◆ XHC_HCSPARAMS2_OFFSET

#define XHC_HCSPARAMS2_OFFSET 0x08

Definition at line 42 of file XhciReg.h.

◆ XHC_HCSPARAMS3_OFFSET

#define XHC_HCSPARAMS3_OFFSET 0x0c

Definition at line 43 of file XhciReg.h.

◆ XHC_HUB_PORTSC_BHRC

#define XHC_HUB_PORTSC_BHRC BIT21

Definition at line 247 of file XhciReg.h.

◆ XHC_HUB_PORTSC_CCS

#define XHC_HUB_PORTSC_CCS BIT0

Definition at line 238 of file XhciReg.h.

◆ XHC_HUB_PORTSC_CSC

#define XHC_HUB_PORTSC_CSC BIT16

Definition at line 243 of file XhciReg.h.

◆ XHC_HUB_PORTSC_OCA

#define XHC_HUB_PORTSC_OCA BIT3

Definition at line 240 of file XhciReg.h.

◆ XHC_HUB_PORTSC_OCC

#define XHC_HUB_PORTSC_OCC BIT19

Definition at line 245 of file XhciReg.h.

◆ XHC_HUB_PORTSC_PEC

#define XHC_HUB_PORTSC_PEC BIT17

Definition at line 244 of file XhciReg.h.

◆ XHC_HUB_PORTSC_PED

#define XHC_HUB_PORTSC_PED BIT1

Definition at line 239 of file XhciReg.h.

◆ XHC_HUB_PORTSC_PP

#define XHC_HUB_PORTSC_PP BIT9

Definition at line 242 of file XhciReg.h.

◆ XHC_HUB_PORTSC_PRC

#define XHC_HUB_PORTSC_PRC BIT20

Definition at line 246 of file XhciReg.h.

◆ XHC_HUB_PORTSC_RESET

#define XHC_HUB_PORTSC_RESET BIT4

Definition at line 241 of file XhciReg.h.

◆ XHC_IMAN_IE

#define XHC_IMAN_IE BIT1

Definition at line 249 of file XhciReg.h.

◆ XHC_IMAN_IP

#define XHC_IMAN_IP BIT0

Definition at line 248 of file XhciReg.h.

◆ XHC_IMAN_OFFSET

#define XHC_IMAN_OFFSET 0x20

Definition at line 64 of file XhciReg.h.

◆ XHC_IMOD_OFFSET

#define XHC_IMOD_OFFSET 0x24

Definition at line 65 of file XhciReg.h.

◆ XHC_IMODC_MASK

#define XHC_IMODC_MASK 0xFFFF0000

Definition at line 252 of file XhciReg.h.

◆ XHC_IMODI_MASK

#define XHC_IMODI_MASK 0x0000FFFF

Definition at line 251 of file XhciReg.h.

◆ XHC_MFINDEX_OFFSET

#define XHC_MFINDEX_OFFSET 0x00

Definition at line 63 of file XhciReg.h.

◆ XHC_PAGESIZE_MASK

#define XHC_PAGESIZE_MASK 0xFFFF

Definition at line 212 of file XhciReg.h.

◆ XHC_PAGESIZE_OFFSET

#define XHC_PAGESIZE_OFFSET 0x0008

Definition at line 53 of file XhciReg.h.

◆ XHC_PCI_BAR_MASK

#define XHC_PCI_BAR_MASK 0xFFFF

Definition at line 21 of file XhciReg.h.

◆ XHC_PCI_BAR_OFFSET

#define XHC_PCI_BAR_OFFSET 0x10

Definition at line 20 of file XhciReg.h.

◆ XHC_PCI_SBRN_OFFSET

#define XHC_PCI_SBRN_OFFSET 0x60

Definition at line 23 of file XhciReg.h.

◆ XHC_PORTSC_CAS

#define XHC_PORTSC_CAS BIT24

Definition at line 236 of file XhciReg.h.

◆ XHC_PORTSC_CCS

#define XHC_PORTSC_CCS BIT0

Definition at line 221 of file XhciReg.h.

◆ XHC_PORTSC_CEC

#define XHC_PORTSC_CEC BIT23

Definition at line 235 of file XhciReg.h.

◆ XHC_PORTSC_CSC

#define XHC_PORTSC_CSC BIT17

Definition at line 229 of file XhciReg.h.

◆ XHC_PORTSC_LWS

#define XHC_PORTSC_LWS BIT16

Definition at line 228 of file XhciReg.h.

◆ XHC_PORTSC_OCA

#define XHC_PORTSC_OCA BIT3

Definition at line 223 of file XhciReg.h.

◆ XHC_PORTSC_OCC

#define XHC_PORTSC_OCC BIT20

Definition at line 232 of file XhciReg.h.

◆ XHC_PORTSC_OFFSET

#define XHC_PORTSC_OFFSET 0x0400

Definition at line 58 of file XhciReg.h.

◆ XHC_PORTSC_PEC

#define XHC_PORTSC_PEC BIT18

Definition at line 230 of file XhciReg.h.

◆ XHC_PORTSC_PED

#define XHC_PORTSC_PED BIT1

Definition at line 222 of file XhciReg.h.

◆ XHC_PORTSC_PLC

#define XHC_PORTSC_PLC BIT22

Definition at line 234 of file XhciReg.h.

◆ XHC_PORTSC_PLS

#define XHC_PORTSC_PLS (BIT5|BIT6|BIT7|BIT8)

Definition at line 225 of file XhciReg.h.

◆ XHC_PORTSC_PP

#define XHC_PORTSC_PP BIT9

Definition at line 226 of file XhciReg.h.

◆ XHC_PORTSC_PRC

#define XHC_PORTSC_PRC BIT21

Definition at line 233 of file XhciReg.h.

◆ XHC_PORTSC_PS

#define XHC_PORTSC_PS (BIT10|BIT11|BIT12|BIT13)

Definition at line 227 of file XhciReg.h.

◆ XHC_PORTSC_RESET

#define XHC_PORTSC_RESET BIT4

Definition at line 224 of file XhciReg.h.

◆ XHC_PORTSC_WRC

#define XHC_PORTSC_WRC BIT19

Definition at line 231 of file XhciReg.h.

◆ XHC_RTSOFF_OFFSET

#define XHC_RTSOFF_OFFSET 0x18

Definition at line 46 of file XhciReg.h.

◆ XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2

#define XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2 0x02

Definition at line 81 of file XhciReg.h.

◆ XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3

#define XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3 0x03

Definition at line 82 of file XhciReg.h.

◆ XHC_SUPPORTED_PROTOCOL_DW2_OFFSET

#define XHC_SUPPORTED_PROTOCOL_DW2_OFFSET 0x08

Definition at line 85 of file XhciReg.h.

◆ XHC_SUPPORTED_PROTOCOL_NAME_STRING_OFFSET

#define XHC_SUPPORTED_PROTOCOL_NAME_STRING_OFFSET 0x04

Definition at line 83 of file XhciReg.h.

◆ XHC_SUPPORTED_PROTOCOL_NAME_STRING_VALUE

#define XHC_SUPPORTED_PROTOCOL_NAME_STRING_VALUE 0x20425355

Definition at line 84 of file XhciReg.h.

◆ XHC_SUPPORTED_PROTOCOL_PSI_OFFSET

#define XHC_SUPPORTED_PROTOCOL_PSI_OFFSET 0x10

Definition at line 86 of file XhciReg.h.

◆ XHC_SUPPORTED_PROTOCOL_USB2_HIGH_SPEED_PSIM

#define XHC_SUPPORTED_PROTOCOL_USB2_HIGH_SPEED_PSIM 480

Definition at line 87 of file XhciReg.h.

◆ XHC_SUPPORTED_PROTOCOL_USB2_LOW_SPEED_PSIM

#define XHC_SUPPORTED_PROTOCOL_USB2_LOW_SPEED_PSIM 1500

Definition at line 88 of file XhciReg.h.

◆ XHC_USBCMD_HSEE

#define XHC_USBCMD_HSEE BIT3

Definition at line 200 of file XhciReg.h.

◆ XHC_USBCMD_INTE

#define XHC_USBCMD_INTE BIT2

Definition at line 199 of file XhciReg.h.

◆ XHC_USBCMD_OFFSET

#define XHC_USBCMD_OFFSET 0x0000

Definition at line 51 of file XhciReg.h.

◆ XHC_USBCMD_RESET

#define XHC_USBCMD_RESET BIT1

Definition at line 198 of file XhciReg.h.

◆ XHC_USBCMD_RUN

#define XHC_USBCMD_RUN BIT0

Definition at line 197 of file XhciReg.h.

◆ XHC_USBSTS_CNR

#define XHC_USBSTS_CNR BIT11

Definition at line 209 of file XhciReg.h.

◆ XHC_USBSTS_EINT

#define XHC_USBSTS_EINT BIT3

Definition at line 204 of file XhciReg.h.

◆ XHC_USBSTS_HALT

#define XHC_USBSTS_HALT BIT0

Definition at line 202 of file XhciReg.h.

◆ XHC_USBSTS_HCE

#define XHC_USBSTS_HCE BIT12

Definition at line 210 of file XhciReg.h.

◆ XHC_USBSTS_HSE

#define XHC_USBSTS_HSE BIT2

Definition at line 203 of file XhciReg.h.

◆ XHC_USBSTS_OFFSET

#define XHC_USBSTS_OFFSET 0x0004

Definition at line 52 of file XhciReg.h.

◆ XHC_USBSTS_PCD

#define XHC_USBSTS_PCD BIT4

Definition at line 205 of file XhciReg.h.

◆ XHC_USBSTS_RSS

#define XHC_USBSTS_RSS BIT9

Definition at line 207 of file XhciReg.h.

◆ XHC_USBSTS_SRE

#define XHC_USBSTS_SRE BIT10

Definition at line 208 of file XhciReg.h.

◆ XHC_USBSTS_SSS

#define XHC_USBSTS_SSS BIT8

Definition at line 206 of file XhciReg.h.

Enumeration Type Documentation

◆ XHC_PORT_FEATURE

enum XHC_PORT_FEATURE

Definition at line 259 of file XhciReg.h.

Function Documentation

◆ XhcCheckUsbPortSpeedUsedPsic()

UINT16 XhcCheckUsbPortSpeedUsedPsic	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT8	PortSpeed,
		IN UINT8	PortNumber
	)

Find PortSpeed value match case in XHCI Supported Protocol Capability

Parameters

Xhc	The XHCI Instance.
PortSpeed	The Port Speed Field in USB PortSc register
PortNumber	The Port Number (0-indexed)

Returns: The USB Port Speed.

Definition at line 690 of file XhciReg.c.

◆ XhcClearOpRegBit()

VOID XhcClearOpRegBit	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset,
		IN UINT32	Bit
	)

Clear one bit of the operational register while keeping other bits.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the operational register.
Bit	The bit mask of the register to clear.

Definition at line 406 of file XhciReg.c.

◆ XhcClearRuntimeRegBit()

VOID XhcClearRuntimeRegBit	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset,
		IN UINT32	Bit
	)

Clear one bit of the runtime register while keeping other bits.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the runtime register.
Bit	The bit mask of the register to set.

Definition at line 362 of file XhciReg.c.

◆ XhcGetCapabilityAddr()

UINT32 XhcGetCapabilityAddr	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT8	CapId
	)

Calculate the offset of the XHCI capability.

Parameters

Xhc	The XHCI Instance.
CapId	The XHCI Capability ID.

Returns: The offset of XHCI legacy support capability register.

Definition at line 530 of file XhciReg.c.

◆ XhcGetSupportedProtocolCapabilityAddr()

UINT32 XhcGetSupportedProtocolCapabilityAddr	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT8	MajorVersion
	)

Calculate the offset of the xHCI Supported Protocol Capability.

Parameters

Xhc	The XHCI Instance.
MajorVersion	The USB Major Version in xHCI Support Protocol Capability Field

Returns: The offset of xHCI Supported Protocol capability register.

Definition at line 570 of file XhciReg.c.

◆ XhcHaltHC()

EFI_STATUS XhcHaltHC	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Timeout
	)

Halt the XHCI host controller.

Parameters

Xhc	The XHCI Instance.
Timeout	Time to wait before abort (in millisecond, ms).

Returns: EFI_SUCCESS The XHCI host controller is halt.; EFI_TIMEOUT Failed to halt the XHCI before Timeout.

Definition at line 895 of file XhciReg.c.

◆ XhcIsHalt()

BOOLEAN XhcIsHalt ( IN USB_XHCI_INSTANCE * Xhc )

Whether the XHCI host controller is halted.

Parameters

Xhc	The XHCI Instance.

Return values

TRUE	The controller is halted.
FALSE	It isn't halted.

Definition at line 771 of file XhciReg.c.

◆ XhcIsSysError()

BOOLEAN XhcIsSysError ( IN USB_XHCI_INSTANCE * Xhc )

Whether system error occurred.

Parameters

Xhc	The XHCI Instance.

Return values

TRUE	System error happened.
FALSE	No system error.

Definition at line 788 of file XhciReg.c.

◆ XhcReadCapReg()

UINT32 XhcReadCapReg	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset
	)

Read 4-bytes width XHCI capability register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the 4-bytes width capability register.

Returns: The register content read.

Return values

If	err, return 0xFFFFFFFF.

Definition at line 62 of file XhciReg.c.

◆ XhcReadCapReg8()

UINT8 XhcReadCapReg8	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset
	)

Read 1-byte width XHCI capability register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the 1-byte width capability register.

Returns: The register content read.

Return values

If	err, return 0xFFFF.

Read 1-byte width XHCI capability register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the 1-byte width capability register.

Returns: The register content read.

Return values

If	err, return 0xFF.

Definition at line 24 of file XhciReg.c.

◆ XhcReadExtCapReg()

UINT32 XhcReadExtCapReg	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset
	)

Read XHCI extended capability register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the extended capability register.

Returns: The register content read

Definition at line 271 of file XhciReg.c.

◆ XhcReadOpReg()

UINT32 XhcReadOpReg	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset
	)

Read 4-bytes width XHCI Operational register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the 4-bytes width operational register.

Returns: The register content read.

Return values

If	err, return 0xFFFFFFFF.

Definition at line 98 of file XhciReg.c.

◆ XhcReadRuntimeReg()

UINT32 XhcReadRuntimeReg	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset
	)

Read XHCI runtime register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the runtime register.

Returns: The register content read

Definition at line 201 of file XhciReg.c.

◆ XhcResetHC()

EFI_STATUS XhcResetHC	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Timeout
	)

Reset the XHCI host controller.

Parameters

Xhc	The XHCI Instance.
Timeout	Time to wait before abort (in millisecond, ms).

Return values

EFI_SUCCESS The XHCI host controller is reset.

Returns: Others Failed to reset the XHCI before Timeout.

Definition at line 839 of file XhciReg.c.

◆ XhcRunHC()

EFI_STATUS XhcRunHC	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Timeout
	)

Set the XHCI host controller to run.

Parameters

Xhc	The XHCI Instance.
Timeout	Time to wait before abort (in millisecond, ms).

Returns: EFI_SUCCESS The XHCI host controller is running.; EFI_TIMEOUT Failed to set the XHCI to run before Timeout.

Definition at line 918 of file XhciReg.c.

◆ XhcSetOpRegBit()

VOID XhcSetOpRegBit	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset,
		IN UINT32	Bit
	)

Set one bit of the operational register while keeping other bits.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the operational register.
Bit	The bit mask of the register to set.

Definition at line 384 of file XhciReg.c.

◆ XhcSetRuntimeRegBit()

VOID XhcSetRuntimeRegBit	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset,
		IN UINT32	Bit
	)

Set one bit of the runtime register while keeping other bits.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the runtime register.
Bit	The bit mask of the register to set.

Definition at line 340 of file XhciReg.c.

◆ XhcWaitOpRegBit()

EFI_STATUS XhcWaitOpRegBit	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset,
		IN UINT32	Bit,
		IN BOOLEAN	WaitToSet,
		IN UINT32	Timeout
	)

Wait the operation register's bit as specified by Bit to be set (or clear).

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the operational register.
Bit	The bit of the register to wait for.
WaitToSet	Wait the bit to set or clear.
Timeout	The time to wait before abort (in millisecond, ms).

Return values

EFI_SUCCESS	The bit successfully changed by host controller.
EFI_TIMEOUT	The time out occurred.

Wait the operation register's bit as specified by Bit to become set (or clear).

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the operation register.
Bit	The bit of the register to wait for.
WaitToSet	Wait the bit to set or clear.
Timeout	The time to wait before abort (in millisecond, ms).

Return values

EFI_SUCCESS	The bit successfully changed by host controller.
EFI_TIMEOUT	The time out occurred.

Definition at line 434 of file XhciReg.c.

◆ XhcWriteDoorBellReg()

VOID XhcWriteDoorBellReg	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset,
		IN UINT32	Data
	)

Write the data to the XHCI door bell register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the door bell register.
Data	The data to write.

Definition at line 167 of file XhciReg.c.

◆ XhcWriteOpReg()

VOID XhcWriteOpReg	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset,
		IN UINT32	Data
	)

Write the data to the 4-bytes width XHCI operational register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the 4-bytes width operational register.
Data	The data to write.

Definition at line 134 of file XhciReg.c.

◆ XhcWriteRuntimeReg()

VOID XhcWriteRuntimeReg	(	IN USB_XHCI_INSTANCE *	Xhc,
		IN UINT32	Offset,
		IN UINT32	Data
	)

Write the data to the XHCI runtime register.

Parameters

Xhc	The XHCI Instance.
Offset	The offset of the runtime register.
Data	The data to write.

Definition at line 237 of file XhciReg.c.

Data Structures

Macros

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ PCI_IF_XHCI

◆ USB_HUB_CLASS_CODE

◆ USB_HUB_SUBCLASS_CODE

◆ USBLEGSP_BIOS_SEMAPHORE

◆ USBLEGSP_OS_SEMAPHORE

◆ XHC_BAR_INDEX

◆ XHC_CAP_USB_DEBUG

◆ XHC_CAP_USB_LEGACY

◆ XHC_CAP_USB_SUPPORTED_PROTOCOL

◆ XHC_CAPLENGTH_OFFSET

◆ XHC_CONFIG_MASK

◆ XHC_CONFIG_OFFSET

◆ XHC_CRCR_CA

◆ XHC_CRCR_CRR

◆ XHC_CRCR_CS

◆ XHC_CRCR_OFFSET

◆ XHC_CRCR_RCS

◆ XHC_DBOFF_OFFSET

◆ XHC_DC_DCCTRL

◆ XHC_DCBAAP_OFFSET

◆ XHC_DNCTRL_OFFSET

◆ XHC_ERDP_OFFSET

◆ XHC_ERSTBA_OFFSET

◆ XHC_ERSTSZ_OFFSET

◆ XHC_HCCPARAMS_OFFSET

◆ XHC_HCIVERSION_OFFSET

◆ XHC_HCSPARAMS1_OFFSET

◆ XHC_HCSPARAMS2_OFFSET

◆ XHC_HCSPARAMS3_OFFSET

◆ XHC_HUB_PORTSC_BHRC

◆ XHC_HUB_PORTSC_CCS

◆ XHC_HUB_PORTSC_CSC

◆ XHC_HUB_PORTSC_OCA

◆ XHC_HUB_PORTSC_OCC

◆ XHC_HUB_PORTSC_PEC

◆ XHC_HUB_PORTSC_PED

◆ XHC_HUB_PORTSC_PP

◆ XHC_HUB_PORTSC_PRC

◆ XHC_HUB_PORTSC_RESET

◆ XHC_IMAN_IE

◆ XHC_IMAN_IP

◆ XHC_IMAN_OFFSET

◆ XHC_IMOD_OFFSET

◆ XHC_IMODC_MASK

◆ XHC_IMODI_MASK

◆ XHC_MFINDEX_OFFSET

◆ XHC_PAGESIZE_MASK

◆ XHC_PAGESIZE_OFFSET

◆ XHC_PCI_BAR_MASK

◆ XHC_PCI_BAR_OFFSET

◆ XHC_PCI_SBRN_OFFSET

◆ XHC_PORTSC_CAS

◆ XHC_PORTSC_CCS

◆ XHC_PORTSC_CEC

◆ XHC_PORTSC_CSC

◆ XHC_PORTSC_LWS

◆ XHC_PORTSC_OCA

◆ XHC_PORTSC_OCC

◆ XHC_PORTSC_OFFSET

◆ XHC_PORTSC_PEC

◆ XHC_PORTSC_PED

◆ XHC_PORTSC_PLC

◆ XHC_PORTSC_PLS

◆ XHC_PORTSC_PP

◆ XHC_PORTSC_PRC

◆ XHC_PORTSC_PS

◆ XHC_PORTSC_RESET

◆ XHC_PORTSC_WRC

◆ XHC_RTSOFF_OFFSET

◆ XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2

◆ XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3

◆ XHC_SUPPORTED_PROTOCOL_DW2_OFFSET

◆ XHC_SUPPORTED_PROTOCOL_NAME_STRING_OFFSET

◆ XHC_SUPPORTED_PROTOCOL_NAME_STRING_VALUE