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BasePciCapLib.c
Go to the documentation of this file.
1
13
15#include <Library/DebugLib.h>
17
18#include "BasePciCapLib.h"
19
35INTN
36EFIAPI
38 IN CONST VOID *PciCapKey,
39 IN CONST VOID *PciCap
40 )
41{
42 CONST PCI_CAP_KEY *Key1;
43 CONST PCI_CAP_KEY *Key2;
44
45 Key1 = PciCapKey;
46 Key2 = &((CONST PCI_CAP *)PciCap)->Key;
47
48 if (Key1->Domain < Key2->Domain) {
49 return -1;
50 }
51
52 if (Key1->Domain > Key2->Domain) {
53 return 1;
54 }
55
56 if (Key1->CapId < Key2->CapId) {
57 return -1;
58 }
59
60 if (Key1->CapId > Key2->CapId) {
61 return 1;
62 }
63
64 if (Key1->Instance < Key2->Instance) {
65 return -1;
66 }
67
68 if (Key1->Instance > Key2->Instance) {
69 return 1;
70 }
71
72 return 0;
73}
74
89INTN
90EFIAPI
92 IN CONST VOID *PciCap1,
93 IN CONST VOID *PciCap2
94 )
95{
96 CONST PCI_CAP_KEY *PciCap1Key;
97
98 PciCap1Key = &((CONST PCI_CAP *)PciCap1)->Key;
99 return ComparePciCapKey (PciCap1Key, PciCap2);
100}
101
116STATIC
117INTN
118EFIAPI
120 IN CONST VOID *CapHdrOffset,
121 IN CONST VOID *PciCap
122 )
123{
124 UINT16 Offset1;
125 UINT16 Offset2;
126
127 Offset1 = *(CONST UINT16 *)CapHdrOffset;
128 Offset2 = ((CONST PCI_CAP *)PciCap)->Offset;
129 //
130 // Note: both Offset1 and Offset2 are promoted to INT32 below, and the
131 // subtraction takes place between INT32 values.
132 //
133 return Offset1 - Offset2;
134}
135
149STATIC
150INTN
151EFIAPI
153 IN CONST VOID *PciCap1,
154 IN CONST VOID *PciCap2
155 )
156{
157 UINT16 Offset1;
158 UINT16 Offset2;
159
160 Offset1 = ((CONST PCI_CAP *)PciCap1)->Offset;
161 Offset2 = ((CONST PCI_CAP *)PciCap2)->Offset;
162 //
163 // Note: both Offset1 and Offset2 are promoted to INT32 below, and the
164 // subtraction takes place between INT32 values.
165 //
166 return Offset1 - Offset2;
167}
168
206STATIC
207RETURN_STATUS
209 IN OUT PCI_CAP_LIST *CapList,
210 IN OUT ORDERED_COLLECTION *CapHdrOffsets,
211 IN PCI_CAP_DOMAIN Domain,
212 IN UINT16 CapId,
213 IN UINT16 Offset,
214 IN UINT8 Version
215 )
216{
217 PCI_CAP *PciCap;
218 RETURN_STATUS Status;
219 ORDERED_COLLECTION_ENTRY *PciCapEntry;
220 PCI_CAP *InstanceZero;
221
222 ASSERT ((Offset & 0x3) == 0);
223 ASSERT (
224 Offset < (Domain == PciCapNormal ?
225 PCI_MAX_CONFIG_OFFSET : PCI_EXP_MAX_CONFIG_OFFSET)
226 );
227 ASSERT (Domain == PciCapExtended || Version == 0);
228
229 //
230 // Set InstanceZero to suppress incorrect compiler/analyzer warnings.
231 //
232 InstanceZero = NULL;
233
234 //
235 // Allocate PciCap, and populate it assuming it is the first occurrence of
236 // (Domain, CapId). Note that PciCap->MaxSizeHint is not assigned the final
237 // value just yet.
238 //
239 PciCap = AllocatePool (sizeof *PciCap);
240 if (PciCap == NULL) {
242 }
243
244 PciCap->Key.Domain = Domain;
245 PciCap->Key.CapId = CapId;
246 PciCap->Key.Instance = 0;
247 PciCap->NumInstancesUnion.NumInstances = 1;
248 PciCap->Offset = Offset;
249 PciCap->MaxSizeHint = 0;
250 PciCap->Version = Version;
251
252 //
253 // Add PciCap to CapList.
254 //
255 Status = OrderedCollectionInsert (
256 CapList->Capabilities,
257 &PciCapEntry,
258 PciCap
259 );
260 if (RETURN_ERROR (Status)) {
261 if (Status == RETURN_OUT_OF_RESOURCES) {
262 goto FreePciCap;
263 }
264
265 ASSERT (Status == RETURN_ALREADY_STARTED);
266 //
267 // PciCap is not the first instance of (Domain, CapId). Add it as a new
268 // instance, taking the current instance count from Instance#0. Note that
269 // we don't bump the instance count maintained in Instance#0 just yet, to
270 // keep rollback on errors simple.
271 //
272 InstanceZero = OrderedCollectionUserStruct (PciCapEntry);
273 PciCap->Key.Instance = InstanceZero->NumInstancesUnion.NumInstances;
274 PciCap->NumInstancesUnion.InstanceZero = InstanceZero;
275
276 ASSERT (PciCap->Key.Instance > 0);
277 Status = OrderedCollectionInsert (
278 CapList->Capabilities,
279 &PciCapEntry,
280 PciCap
281 );
282 if (Status == RETURN_OUT_OF_RESOURCES) {
283 goto FreePciCap;
284 }
285 }
286
287 //
288 // At this point, PciCap has been inserted in CapList->Capabilities, either
289 // with Instance==0 or with Instance>0. PciCapEntry is the iterator that
290 // links PciCap.
291 //
292 ASSERT_RETURN_ERROR (Status);
293
294 //
295 // Link PciCap into CapHdrOffsets too, to order it globally based on config
296 // space offset. Note that partial overlaps between capability headers is not
297 // possible: Offset is DWORD aligned, normal capability headers are 16-bit
298 // wide, and extended capability headers are 32-bit wide. Therefore any two
299 // capability headers either are distinct or start at the same offset
300 // (implying a loop in the respective capabilities list).
301 //
302 Status = OrderedCollectionInsert (CapHdrOffsets, NULL, PciCap);
303 if (RETURN_ERROR (Status)) {
304 if (Status == RETURN_ALREADY_STARTED) {
305 //
306 // Loop found; map return status accordingly.
307 //
308 Status = RETURN_DEVICE_ERROR;
309 }
310
311 goto DeletePciCapFromCapList;
312 }
313
314 //
315 // Now we can bump the instance count maintained in Instance#0, if PciCap is
316 // not the first instance of (Domain, CapId).
317 //
318 if (PciCap->Key.Instance > 0) {
319 //
320 // Suppress invalid "nullptr dereference" compiler/analyzer warnings: the
321 // only way for "PciCap->Key.Instance" to be positive here is for it to
322 // have been assigned *from* dereferencing "InstanceZero" above.
323 //
324 ASSERT (InstanceZero != NULL);
325
326 InstanceZero->NumInstancesUnion.NumInstances++;
327 }
328
329 return RETURN_SUCCESS;
330
331DeletePciCapFromCapList:
332 OrderedCollectionDelete (CapList->Capabilities, PciCapEntry, NULL);
333
334FreePciCap:
335 FreePool (PciCap);
336
337 return Status;
338}
339
360STATIC
361VOID
363 IN OUT PCI_CAP *PciCap,
364 IN PCI_CAP *NextPciCap OPTIONAL
365 )
366{
367 UINT16 ConfigSpaceSize;
368
369 ConfigSpaceSize = (PciCap->Key.Domain == PciCapNormal ?
370 PCI_MAX_CONFIG_OFFSET : PCI_EXP_MAX_CONFIG_OFFSET);
371 //
372 // The following is guaranteed by the interface contract on
373 // CalculatePciCapMaxSizeHint().
374 //
375 ASSERT (NextPciCap == NULL || PciCap->Offset < NextPciCap->Offset);
376 //
377 // The following is guaranteed by the interface contract on InsertPciCap().
378 //
379 ASSERT (PciCap->Offset < ConfigSpaceSize);
380 //
381 // Thus we can safely subtract PciCap->Offset from either of
382 // - ConfigSpaceSize
383 // - and NextPciCap->Offset (if NextPciCap is not NULL).
384 //
385 // PciCap extends from PciCap->Offset to NextPciCap->Offset (if any), except
386 // it cannot cross config space boundary.
387 //
388 if ((NextPciCap == NULL) || (NextPciCap->Offset >= ConfigSpaceSize)) {
389 PciCap->MaxSizeHint = ConfigSpaceSize - PciCap->Offset;
390 return;
391 }
392
393 PciCap->MaxSizeHint = NextPciCap->Offset - PciCap->Offset;
394}
395
401STATIC
402VOID
403EFIAPI
405 IN PCI_CAP_LIST *CapList
406 )
407{
409 ORDERED_COLLECTION_ENTRY *PciCapEntry;
410
411 for (PciCapEntry = OrderedCollectionMin (CapList->Capabilities);
412 PciCapEntry != NULL;
413 PciCapEntry = OrderedCollectionNext (PciCapEntry))
414 {
415 PCI_CAP *PciCap;
416 RETURN_STATUS Status;
417 PCI_CAP_INFO Info;
418
419 PciCap = OrderedCollectionUserStruct (PciCapEntry);
420 Status = PciCapGetInfo (PciCap, &Info);
421 //
422 // PciCapGetInfo() cannot fail in this library instance.
423 //
424 ASSERT_RETURN_ERROR (Status);
425
426 DEBUG ((
427 DEBUG_VERBOSE,
428 "%a:%a: %a 0x%04x %03u/%03u v0x%x @0x%03x+0x%03x\n",
429 gEfiCallerBaseName,
430 __func__,
431 (Info.Domain == PciCapNormal ? "Norm" : "Extd"),
432 Info.CapId,
433 Info.Instance,
434 Info.NumInstances,
435 Info.Version,
436 Info.Offset,
437 Info.MaxSizeHint
438 ));
439 }
440
442}
443
457STATIC
458VOID
460 IN OUT ORDERED_COLLECTION *PciCapCollection,
461 IN BOOLEAN FreePciCap
462 )
463{
464 ORDERED_COLLECTION_ENTRY *PciCapEntry;
465 ORDERED_COLLECTION_ENTRY *NextEntry;
466
467 for (PciCapEntry = OrderedCollectionMin (PciCapCollection);
468 PciCapEntry != NULL;
469 PciCapEntry = NextEntry)
470 {
471 PCI_CAP *PciCap;
472
473 NextEntry = OrderedCollectionNext (PciCapEntry);
474 OrderedCollectionDelete (PciCapCollection, PciCapEntry, (VOID **)&PciCap);
475 if (FreePciCap) {
476 FreePool (PciCap);
477 }
478 }
479
480 OrderedCollectionUninit (PciCapCollection);
481}
482
515RETURN_STATUS
516EFIAPI
518 IN PCI_CAP_DEV *PciDevice,
519 OUT PCI_CAP_LIST **CapList
520 )
521{
522 PCI_CAP_LIST *OutCapList;
523 RETURN_STATUS Status;
524 ORDERED_COLLECTION *CapHdrOffsets;
525 UINT16 PciStatusReg;
526 BOOLEAN DeviceIsExpress;
527 ORDERED_COLLECTION_ENTRY *OffsetEntry;
528
529 //
530 // Allocate the output structure.
531 //
532 OutCapList = AllocatePool (sizeof *OutCapList);
533 if (OutCapList == NULL) {
535 }
536
537 //
538 // The OutCapList->Capabilities collection owns the PCI_CAP structures and
539 // orders them based on PCI_CAP.Key.
540 //
541 OutCapList->Capabilities = OrderedCollectionInit (
544 );
545 if (OutCapList->Capabilities == NULL) {
547 goto FreeOutCapList;
548 }
549
550 //
551 // The (temporary) CapHdrOffsets collection only references PCI_CAP
552 // structures, and orders them based on PCI_CAP.Offset.
553 //
554 CapHdrOffsets = OrderedCollectionInit (
557 );
558 if (CapHdrOffsets == NULL) {
560 goto FreeCapabilities;
561 }
562
563 //
564 // Whether the device is PCI Express depends on the normal capability with
565 // identifier EFI_PCI_CAPABILITY_ID_PCIEXP.
566 //
567 DeviceIsExpress = FALSE;
568
569 //
570 // Check whether a normal capabilities list is present. If there's none,
571 // that's not an error; we'll just return OutCapList->Capabilities empty.
572 //
573 Status = PciDevice->ReadConfig (
574 PciDevice,
575 PCI_PRIMARY_STATUS_OFFSET,
576 &PciStatusReg,
577 sizeof PciStatusReg
578 );
579 if (RETURN_ERROR (Status)) {
580 goto FreeCapHdrOffsets;
581 }
582
583 if ((PciStatusReg & EFI_PCI_STATUS_CAPABILITY) != 0) {
584 UINT8 NormalCapHdrOffset;
585
586 //
587 // Fetch the start offset of the normal capabilities list.
588 //
589 Status = PciDevice->ReadConfig (
590 PciDevice,
591 PCI_CAPBILITY_POINTER_OFFSET,
592 &NormalCapHdrOffset,
593 sizeof NormalCapHdrOffset
594 );
595 if (RETURN_ERROR (Status)) {
596 goto FreeCapHdrOffsets;
597 }
598
599 //
600 // Traverse the normal capabilities list.
601 //
602 NormalCapHdrOffset &= 0xFC;
603 while (NormalCapHdrOffset > 0) {
604 EFI_PCI_CAPABILITY_HDR NormalCapHdr;
605
606 Status = PciDevice->ReadConfig (
607 PciDevice,
608 NormalCapHdrOffset,
609 &NormalCapHdr,
610 sizeof NormalCapHdr
611 );
612 if (RETURN_ERROR (Status)) {
613 goto FreeCapHdrOffsets;
614 }
615
616 Status = InsertPciCap (
617 OutCapList,
618 CapHdrOffsets,
619 PciCapNormal,
620 NormalCapHdr.CapabilityID,
621 NormalCapHdrOffset,
622 0
623 );
624 if (RETURN_ERROR (Status)) {
625 goto FreeCapHdrOffsets;
626 }
627
628 if (NormalCapHdr.CapabilityID == EFI_PCI_CAPABILITY_ID_PCIEXP) {
629 DeviceIsExpress = TRUE;
630 }
631
632 NormalCapHdrOffset = NormalCapHdr.NextItemPtr & 0xFC;
633 }
634 }
635
636 //
637 // If the device has been found PCI Express, attempt to traverse the extended
638 // capabilities list. It starts right after the normal config space.
639 //
640 if (DeviceIsExpress) {
641 UINT16 ExtendedCapHdrOffset;
642
643 ExtendedCapHdrOffset = PCI_MAX_CONFIG_OFFSET;
644 while (ExtendedCapHdrOffset > 0) {
646
647 Status = PciDevice->ReadConfig (
648 PciDevice,
649 ExtendedCapHdrOffset,
650 &ExtendedCapHdr,
651 sizeof ExtendedCapHdr
652 );
653 //
654 // If the first extended config space access fails, assume the device has
655 // no extended capabilities. If the first extended config space access
656 // succeeds but we read an "all bits zero" extended capability header,
657 // that means (by spec) the device has no extended capabilities.
658 //
659 if ((ExtendedCapHdrOffset == PCI_MAX_CONFIG_OFFSET) &&
660 (RETURN_ERROR (Status) ||
661 IsZeroBuffer (&ExtendedCapHdr, sizeof ExtendedCapHdr)))
662 {
663 break;
664 }
665
666 if (RETURN_ERROR (Status)) {
667 goto FreeCapHdrOffsets;
668 }
669
670 Status = InsertPciCap (
671 OutCapList,
672 CapHdrOffsets,
673 PciCapExtended,
674 (UINT16)ExtendedCapHdr.CapabilityId,
675 ExtendedCapHdrOffset,
676 (UINT8)ExtendedCapHdr.CapabilityVersion
677 );
678 if (RETURN_ERROR (Status)) {
679 goto FreeCapHdrOffsets;
680 }
681
682 ExtendedCapHdrOffset = ExtendedCapHdr.NextCapabilityOffset & 0xFFC;
683 if ((ExtendedCapHdrOffset > 0) &&
684 (ExtendedCapHdrOffset < PCI_MAX_CONFIG_OFFSET))
685 {
686 //
687 // Invalid capability pointer.
688 //
689 Status = RETURN_DEVICE_ERROR;
690 goto FreeCapHdrOffsets;
691 }
692 }
693 }
694
695 //
696 // Both capabilities lists have been parsed; compute the PCI_CAP.MaxSizeHint
697 // members if at least one capability has been found. In parallel, evacuate
698 // the CapHdrOffsets collection.
699 //
700 // At first, set OffsetEntry to the iterator of the PCI_CAP object with the
701 // lowest Offset (if such exists).
702 //
703 OffsetEntry = OrderedCollectionMin (CapHdrOffsets);
704 if (OffsetEntry != NULL) {
705 ORDERED_COLLECTION_ENTRY *NextOffsetEntry;
706 PCI_CAP *PciCap;
707
708 //
709 // Initialize NextOffsetEntry to the iterator of the PCI_CAP object with
710 // the second lowest Offset (if such exists).
711 //
712 NextOffsetEntry = OrderedCollectionNext (OffsetEntry);
713 //
714 // Calculate MaxSizeHint for all PCI_CAP objects except the one with the
715 // highest Offset.
716 //
717 while (NextOffsetEntry != NULL) {
718 PCI_CAP *NextPciCap;
719
720 OrderedCollectionDelete (CapHdrOffsets, OffsetEntry, (VOID **)&PciCap);
721 NextPciCap = OrderedCollectionUserStruct (NextOffsetEntry);
722 CalculatePciCapMaxSizeHint (PciCap, NextPciCap);
723
724 OffsetEntry = NextOffsetEntry;
725 NextOffsetEntry = OrderedCollectionNext (OffsetEntry);
726 }
727
728 //
729 // Calculate MaxSizeHint for the PCI_CAP object with the highest Offset.
730 //
731 OrderedCollectionDelete (CapHdrOffsets, OffsetEntry, (VOID **)&PciCap);
733 }
734
735 ASSERT (OrderedCollectionIsEmpty (CapHdrOffsets));
736 OrderedCollectionUninit (CapHdrOffsets);
737
738 DebugDumpPciCapList (OutCapList);
739 *CapList = OutCapList;
740 return RETURN_SUCCESS;
741
742FreeCapHdrOffsets:
743 EmptyAndUninitPciCapCollection (CapHdrOffsets, FALSE);
744
745FreeCapabilities:
746 EmptyAndUninitPciCapCollection (OutCapList->Capabilities, TRUE);
747
748FreeOutCapList:
749 FreePool (OutCapList);
750
751 ASSERT (RETURN_ERROR (Status));
752 DEBUG ((
753 DEBUG_ERROR,
754 "%a:%a: %r\n",
755 gEfiCallerBaseName,
756 __func__,
757 Status
758 ));
759 return Status;
760}
761
768VOID
769EFIAPI
771 IN PCI_CAP_LIST *CapList
772 )
773{
774 EmptyAndUninitPciCapCollection (CapList->Capabilities, TRUE);
775 FreePool (CapList);
776}
777
811RETURN_STATUS
812EFIAPI
814 IN PCI_CAP_LIST *CapList,
815 IN PCI_CAP_DOMAIN Domain,
816 IN UINT16 CapId,
817 IN UINT16 Instance,
818 OUT PCI_CAP **Cap OPTIONAL
819 )
820{
821 PCI_CAP_KEY Key;
822 ORDERED_COLLECTION_ENTRY *PciCapEntry;
823
824 Key.Domain = Domain;
825 Key.CapId = CapId;
826 Key.Instance = Instance;
827
828 PciCapEntry = OrderedCollectionFind (CapList->Capabilities, &Key);
829 if (PciCapEntry == NULL) {
830 return RETURN_NOT_FOUND;
831 }
832
833 if (Cap != NULL) {
834 *Cap = OrderedCollectionUserStruct (PciCapEntry);
835 }
836
837 return RETURN_SUCCESS;
838}
839
873RETURN_STATUS
874EFIAPI
876 IN PCI_CAP_LIST *CapList,
877 IN PCI_CAP_DOMAIN Domain,
878 IN UINT16 CapId,
879 IN UINT8 MinVersion,
880 OUT PCI_CAP **Cap OPTIONAL
881 )
882{
883 PCI_CAP_KEY Key;
884 ORDERED_COLLECTION_ENTRY *PciCapEntry;
885
886 //
887 // Start the version checks at Instance#0 of (Domain, CapId).
888 //
889 Key.Domain = Domain;
890 Key.CapId = CapId;
891 Key.Instance = 0;
892
893 for (PciCapEntry = OrderedCollectionFind (CapList->Capabilities, &Key);
894 PciCapEntry != NULL;
895 PciCapEntry = OrderedCollectionNext (PciCapEntry))
896 {
897 PCI_CAP *PciCap;
898
899 PciCap = OrderedCollectionUserStruct (PciCapEntry);
900 //
901 // PCI_CAP.Key ordering keeps instances of the same (Domain, CapId)
902 // adjacent to each other, so stop searching if either Domain or CapId
903 // changes.
904 //
905 if ((PciCap->Key.Domain != Domain) || (PciCap->Key.CapId != CapId)) {
906 break;
907 }
908
909 if (PciCap->Version >= MinVersion) {
910 //
911 // Match found.
912 //
913 if (Cap != NULL) {
914 *Cap = PciCap;
915 }
916
917 return RETURN_SUCCESS;
918 }
919 }
920
921 return RETURN_NOT_FOUND;
922}
923
938RETURN_STATUS
939EFIAPI
941 IN PCI_CAP *Cap,
942 OUT PCI_CAP_INFO *Info
943 )
944{
945 PCI_CAP *InstanceZero;
946
947 ASSERT (Info != NULL);
948
949 InstanceZero = (Cap->Key.Instance == 0 ? Cap :
950 Cap->NumInstancesUnion.InstanceZero);
951
952 Info->Domain = Cap->Key.Domain;
953 Info->CapId = Cap->Key.CapId;
954 Info->NumInstances = InstanceZero->NumInstancesUnion.NumInstances;
955 Info->Instance = Cap->Key.Instance;
956 Info->Offset = Cap->Offset;
957 Info->MaxSizeHint = Cap->MaxSizeHint;
958 Info->Version = Cap->Version;
959
960 return RETURN_SUCCESS;
961}
962
999RETURN_STATUS
1000EFIAPI
1002 IN PCI_CAP_DEV *PciDevice,
1003 IN PCI_CAP *Cap,
1004 IN UINT16 SourceOffsetInCap,
1005 OUT VOID *DestinationBuffer,
1006 IN UINT16 Size
1007 )
1008{
1009 //
1010 // Note: all UINT16 values are promoted to INT32 below, and addition and
1011 // comparison take place between INT32 values.
1012 //
1013 if (SourceOffsetInCap + Size > Cap->MaxSizeHint) {
1015 }
1016
1017 return PciDevice->ReadConfig (
1018 PciDevice,
1019 Cap->Offset + SourceOffsetInCap,
1020 DestinationBuffer,
1021 Size
1022 );
1023}
1024
1062RETURN_STATUS
1063EFIAPI
1065 IN PCI_CAP_DEV *PciDevice,
1066 IN PCI_CAP *Cap,
1067 IN UINT16 DestinationOffsetInCap,
1068 IN VOID *SourceBuffer,
1069 IN UINT16 Size
1070 )
1071{
1072 //
1073 // Note: all UINT16 values are promoted to INT32 below, and addition and
1074 // comparison take place between INT32 values.
1075 //
1076 if (DestinationOffsetInCap + Size > Cap->MaxSizeHint) {
1078 }
1079
1080 return PciDevice->WriteConfig (
1081 PciDevice,
1082 Cap->Offset + DestinationOffsetInCap,
1083 SourceBuffer,
1084 Size
1085 );
1086}
INT64 INTN
BOOLEAN EFIAPI IsZeroBuffer(IN CONST VOID *Buffer, IN UINTN Length)
VOID EFIAPI PciCapListUninit(IN PCI_CAP_LIST *CapList)
RETURN_STATUS EFIAPI PciCapWrite(IN PCI_CAP_DEV *PciDevice, IN PCI_CAP *Cap, IN UINT16 DestinationOffsetInCap, IN VOID *SourceBuffer, IN UINT16 Size)
RETURN_STATUS EFIAPI PciCapListFindCapVersion(IN PCI_CAP_LIST *CapList, IN PCI_CAP_DOMAIN Domain, IN UINT16 CapId, IN UINT8 MinVersion, OUT PCI_CAP **Cap OPTIONAL)
STATIC VOID EFIAPI DebugDumpPciCapList(IN PCI_CAP_LIST *CapList)
STATIC INTN EFIAPI ComparePciCap(IN CONST VOID *PciCap1, IN CONST VOID *PciCap2)
Definition: BasePciCapLib.c:91
STATIC INTN EFIAPI ComparePciCapOffsetKey(IN CONST VOID *CapHdrOffset, IN CONST VOID *PciCap)
RETURN_STATUS EFIAPI PciCapListInit(IN PCI_CAP_DEV *PciDevice, OUT PCI_CAP_LIST **CapList)
STATIC INTN EFIAPI ComparePciCapOffset(IN CONST VOID *PciCap1, IN CONST VOID *PciCap2)
RETURN_STATUS EFIAPI PciCapGetInfo(IN PCI_CAP *Cap, OUT PCI_CAP_INFO *Info)
STATIC VOID CalculatePciCapMaxSizeHint(IN OUT PCI_CAP *PciCap, IN PCI_CAP *NextPciCap OPTIONAL)
STATIC RETURN_STATUS InsertPciCap(IN OUT PCI_CAP_LIST *CapList, IN OUT ORDERED_COLLECTION *CapHdrOffsets, IN PCI_CAP_DOMAIN Domain, IN UINT16 CapId, IN UINT16 Offset, IN UINT8 Version)
STATIC INTN EFIAPI ComparePciCapKey(IN CONST VOID *PciCapKey, IN CONST VOID *PciCap)
Definition: BasePciCapLib.c:37
STATIC VOID EmptyAndUninitPciCapCollection(IN OUT ORDERED_COLLECTION *PciCapCollection, IN BOOLEAN FreePciCap)
RETURN_STATUS EFIAPI PciCapRead(IN PCI_CAP_DEV *PciDevice, IN PCI_CAP *Cap, IN UINT16 SourceOffsetInCap, OUT VOID *DestinationBuffer, IN UINT16 Size)
RETURN_STATUS EFIAPI PciCapListFindCap(IN PCI_CAP_LIST *CapList, IN PCI_CAP_DOMAIN Domain, IN UINT16 CapId, IN UINT16 Instance, OUT PCI_CAP **Cap OPTIONAL)
VOID EFIAPI FreePool(IN VOID *Buffer)
#define NULL
Definition: Base.h:319
#define CONST
Definition: Base.h:259
#define STATIC
Definition: Base.h:264
#define RETURN_ERROR(StatusCode)
Definition: Base.h:1061
#define RETURN_NOT_FOUND
Definition: Base.h:1142
#define RETURN_DEVICE_ERROR
Definition: Base.h:1104
#define RETURN_OUT_OF_RESOURCES
Definition: Base.h:1114
#define RETURN_SUCCESS
Definition: Base.h:1066
#define TRUE
Definition: Base.h:301
#define FALSE
Definition: Base.h:307
#define RETURN_ALREADY_STARTED
Definition: Base.h:1172
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
#define RETURN_BAD_BUFFER_SIZE
Definition: Base.h:1086
#define ASSERT_RETURN_ERROR(StatusParameter)
Definition: DebugLib.h:493
#define DEBUG_CODE_BEGIN()
Definition: DebugLib.h:564
#define DEBUG(Expression)
Definition: DebugLib.h:434
#define DEBUG_CODE_END()
Definition: DebugLib.h:578
ORDERED_COLLECTION_ENTRY *EFIAPI OrderedCollectionFind(IN CONST ORDERED_COLLECTION *Collection, IN CONST VOID *StandaloneKey)
ORDERED_COLLECTION_ENTRY *EFIAPI OrderedCollectionMin(IN CONST ORDERED_COLLECTION *Collection)
VOID *EFIAPI OrderedCollectionUserStruct(IN CONST ORDERED_COLLECTION_ENTRY *Entry)
RETURN_STATUS EFIAPI OrderedCollectionInsert(IN OUT ORDERED_COLLECTION *Collection, OUT ORDERED_COLLECTION_ENTRY **Entry OPTIONAL, IN VOID *UserStruct)
VOID EFIAPI OrderedCollectionUninit(IN ORDERED_COLLECTION *Collection)
ORDERED_COLLECTION *EFIAPI OrderedCollectionInit(IN ORDERED_COLLECTION_USER_COMPARE UserStructCompare, IN ORDERED_COLLECTION_KEY_COMPARE KeyCompare)
ORDERED_COLLECTION_ENTRY *EFIAPI OrderedCollectionNext(IN CONST ORDERED_COLLECTION_ENTRY *Entry)
VOID EFIAPI OrderedCollectionDelete(IN OUT ORDERED_COLLECTION *Collection, IN ORDERED_COLLECTION_ENTRY *Entry, OUT VOID **UserStruct OPTIONAL)
BOOLEAN EFIAPI OrderedCollectionIsEmpty(IN CONST ORDERED_COLLECTION *Collection)
#define EFI_PCI_STATUS_CAPABILITY
0x0010
Definition: Pci22.h:629
#define PCI_EXP_MAX_CONFIG_OFFSET
Definition: Pci23.h:83
#define EFI_PCI_CAPABILITY_ID_PCIEXP
Definition: Pci30.h:45
VOID *EFIAPI AllocatePool(IN UINTN AllocationSize)