48 if (Key1->Domain < Key2->Domain) {
52 if (Key1->Domain > Key2->Domain) {
56 if (Key1->CapId < Key2->CapId) {
60 if (Key1->CapId > Key2->CapId) {
64 if (Key1->Instance < Key2->Instance) {
68 if (Key1->Instance > Key2->Instance) {
127 Offset1 = *(
CONST UINT16 *)CapHdrOffset;
133 return Offset1 - Offset2;
166 return Offset1 - Offset2;
211 IN PCI_CAP_DOMAIN Domain,
218 RETURN_STATUS Status;
222 ASSERT ((Offset & 0x3) == 0);
224 Offset < (Domain == PciCapNormal ?
227 ASSERT (Domain == PciCapExtended || Version == 0);
240 if (PciCap ==
NULL) {
244 PciCap->Key.Domain = Domain;
245 PciCap->Key.CapId = CapId;
246 PciCap->Key.Instance = 0;
247 PciCap->NumInstancesUnion.NumInstances = 1;
248 PciCap->Offset = Offset;
249 PciCap->MaxSizeHint = 0;
250 PciCap->Version = Version;
256 CapList->Capabilities,
273 PciCap->Key.Instance = InstanceZero->NumInstancesUnion.NumInstances;
274 PciCap->NumInstancesUnion.InstanceZero = InstanceZero;
276 ASSERT (PciCap->Key.Instance > 0);
278 CapList->Capabilities,
311 goto DeletePciCapFromCapList;
318 if (PciCap->Key.Instance > 0) {
324 ASSERT (InstanceZero !=
NULL);
326 InstanceZero->NumInstancesUnion.NumInstances++;
331DeletePciCapFromCapList:
367 UINT16 ConfigSpaceSize;
369 ConfigSpaceSize = (PciCap->Key.Domain == PciCapNormal ?
375 ASSERT (NextPciCap ==
NULL || PciCap->Offset < NextPciCap->Offset);
379 ASSERT (PciCap->Offset < ConfigSpaceSize);
388 if ((NextPciCap ==
NULL) || (NextPciCap->Offset >= ConfigSpaceSize)) {
389 PciCap->MaxSizeHint = ConfigSpaceSize - PciCap->Offset;
393 PciCap->MaxSizeHint = NextPciCap->Offset - PciCap->Offset;
416 RETURN_STATUS Status;
428 "%a:%a: %a 0x%04x %03u/%03u v0x%x @0x%03x+0x%03x\n",
431 (Info.Domain == PciCapNormal ?
"Norm" :
"Extd"),
461 IN BOOLEAN FreePciCap
469 PciCapEntry = NextEntry)
523 RETURN_STATUS Status;
526 BOOLEAN DeviceIsExpress;
533 if (OutCapList ==
NULL) {
545 if (OutCapList->Capabilities ==
NULL) {
558 if (CapHdrOffsets ==
NULL) {
560 goto FreeCapabilities;
567 DeviceIsExpress =
FALSE;
573 Status = PciDevice->ReadConfig (
575 PCI_PRIMARY_STATUS_OFFSET,
580 goto FreeCapHdrOffsets;
584 UINT8 NormalCapHdrOffset;
589 Status = PciDevice->ReadConfig (
591 PCI_CAPBILITY_POINTER_OFFSET,
593 sizeof NormalCapHdrOffset
596 goto FreeCapHdrOffsets;
602 NormalCapHdrOffset &= 0xFC;
603 while (NormalCapHdrOffset > 0) {
606 Status = PciDevice->ReadConfig (
613 goto FreeCapHdrOffsets;
620 NormalCapHdr.CapabilityID,
625 goto FreeCapHdrOffsets;
629 DeviceIsExpress =
TRUE;
632 NormalCapHdrOffset = NormalCapHdr.NextItemPtr & 0xFC;
640 if (DeviceIsExpress) {
641 UINT16 ExtendedCapHdrOffset;
643 ExtendedCapHdrOffset = PCI_MAX_CONFIG_OFFSET;
644 while (ExtendedCapHdrOffset > 0) {
647 Status = PciDevice->ReadConfig (
649 ExtendedCapHdrOffset,
651 sizeof ExtendedCapHdr
659 if ((ExtendedCapHdrOffset == PCI_MAX_CONFIG_OFFSET) &&
667 goto FreeCapHdrOffsets;
674 (UINT16)ExtendedCapHdr.CapabilityId,
675 ExtendedCapHdrOffset,
676 (UINT8)ExtendedCapHdr.CapabilityVersion
679 goto FreeCapHdrOffsets;
682 ExtendedCapHdrOffset = ExtendedCapHdr.NextCapabilityOffset & 0xFFC;
683 if ((ExtendedCapHdrOffset > 0) &&
684 (ExtendedCapHdrOffset < PCI_MAX_CONFIG_OFFSET))
690 goto FreeCapHdrOffsets;
704 if (OffsetEntry !=
NULL) {
717 while (NextOffsetEntry !=
NULL) {
724 OffsetEntry = NextOffsetEntry;
739 *CapList = OutCapList;
815 IN PCI_CAP_DOMAIN Domain,
826 Key.Instance = Instance;
829 if (PciCapEntry ==
NULL) {
877 IN PCI_CAP_DOMAIN Domain,
905 if ((PciCap->Key.Domain != Domain) || (PciCap->Key.CapId != CapId)) {
909 if (PciCap->Version >= MinVersion) {
947 ASSERT (Info !=
NULL);
949 InstanceZero = (Cap->Key.Instance == 0 ? Cap :
950 Cap->NumInstancesUnion.InstanceZero);
952 Info->Domain = Cap->Key.Domain;
953 Info->CapId = Cap->Key.CapId;
954 Info->NumInstances = InstanceZero->NumInstancesUnion.NumInstances;
955 Info->Instance = Cap->Key.Instance;
956 Info->Offset = Cap->Offset;
957 Info->MaxSizeHint = Cap->MaxSizeHint;
958 Info->Version = Cap->Version;
1004 IN UINT16 SourceOffsetInCap,
1005 OUT VOID *DestinationBuffer,
1013 if (SourceOffsetInCap + Size > Cap->MaxSizeHint) {
1017 return PciDevice->ReadConfig (
1019 Cap->Offset + SourceOffsetInCap,
1067 IN UINT16 DestinationOffsetInCap,
1068 IN VOID *SourceBuffer,
1076 if (DestinationOffsetInCap + Size > Cap->MaxSizeHint) {
1080 return PciDevice->WriteConfig (
1082 Cap->Offset + DestinationOffsetInCap,
BOOLEAN EFIAPI IsZeroBuffer(IN CONST VOID *Buffer, IN UINTN Length)
VOID EFIAPI PciCapListUninit(IN PCI_CAP_LIST *CapList)
RETURN_STATUS EFIAPI PciCapWrite(IN PCI_CAP_DEV *PciDevice, IN PCI_CAP *Cap, IN UINT16 DestinationOffsetInCap, IN VOID *SourceBuffer, IN UINT16 Size)
RETURN_STATUS EFIAPI PciCapListFindCapVersion(IN PCI_CAP_LIST *CapList, IN PCI_CAP_DOMAIN Domain, IN UINT16 CapId, IN UINT8 MinVersion, OUT PCI_CAP **Cap OPTIONAL)
STATIC VOID EFIAPI DebugDumpPciCapList(IN PCI_CAP_LIST *CapList)
STATIC INTN EFIAPI ComparePciCap(IN CONST VOID *PciCap1, IN CONST VOID *PciCap2)
STATIC INTN EFIAPI ComparePciCapOffsetKey(IN CONST VOID *CapHdrOffset, IN CONST VOID *PciCap)
RETURN_STATUS EFIAPI PciCapListInit(IN PCI_CAP_DEV *PciDevice, OUT PCI_CAP_LIST **CapList)
STATIC INTN EFIAPI ComparePciCapOffset(IN CONST VOID *PciCap1, IN CONST VOID *PciCap2)
RETURN_STATUS EFIAPI PciCapGetInfo(IN PCI_CAP *Cap, OUT PCI_CAP_INFO *Info)
STATIC VOID CalculatePciCapMaxSizeHint(IN OUT PCI_CAP *PciCap, IN PCI_CAP *NextPciCap OPTIONAL)
STATIC RETURN_STATUS InsertPciCap(IN OUT PCI_CAP_LIST *CapList, IN OUT ORDERED_COLLECTION *CapHdrOffsets, IN PCI_CAP_DOMAIN Domain, IN UINT16 CapId, IN UINT16 Offset, IN UINT8 Version)
STATIC INTN EFIAPI ComparePciCapKey(IN CONST VOID *PciCapKey, IN CONST VOID *PciCap)
STATIC VOID EmptyAndUninitPciCapCollection(IN OUT ORDERED_COLLECTION *PciCapCollection, IN BOOLEAN FreePciCap)
RETURN_STATUS EFIAPI PciCapRead(IN PCI_CAP_DEV *PciDevice, IN PCI_CAP *Cap, IN UINT16 SourceOffsetInCap, OUT VOID *DestinationBuffer, IN UINT16 Size)
RETURN_STATUS EFIAPI PciCapListFindCap(IN PCI_CAP_LIST *CapList, IN PCI_CAP_DOMAIN Domain, IN UINT16 CapId, IN UINT16 Instance, OUT PCI_CAP **Cap OPTIONAL)
VOID EFIAPI FreePool(IN VOID *Buffer)
#define RETURN_ERROR(StatusCode)
#define RETURN_DEVICE_ERROR
#define RETURN_OUT_OF_RESOURCES
#define RETURN_ALREADY_STARTED
#define RETURN_BAD_BUFFER_SIZE
#define ASSERT_RETURN_ERROR(StatusParameter)
#define DEBUG_CODE_BEGIN()
#define DEBUG(Expression)
ORDERED_COLLECTION_ENTRY *EFIAPI OrderedCollectionFind(IN CONST ORDERED_COLLECTION *Collection, IN CONST VOID *StandaloneKey)
ORDERED_COLLECTION_ENTRY *EFIAPI OrderedCollectionMin(IN CONST ORDERED_COLLECTION *Collection)
VOID *EFIAPI OrderedCollectionUserStruct(IN CONST ORDERED_COLLECTION_ENTRY *Entry)
RETURN_STATUS EFIAPI OrderedCollectionInsert(IN OUT ORDERED_COLLECTION *Collection, OUT ORDERED_COLLECTION_ENTRY **Entry OPTIONAL, IN VOID *UserStruct)
VOID EFIAPI OrderedCollectionUninit(IN ORDERED_COLLECTION *Collection)
ORDERED_COLLECTION *EFIAPI OrderedCollectionInit(IN ORDERED_COLLECTION_USER_COMPARE UserStructCompare, IN ORDERED_COLLECTION_KEY_COMPARE KeyCompare)
ORDERED_COLLECTION_ENTRY *EFIAPI OrderedCollectionNext(IN CONST ORDERED_COLLECTION_ENTRY *Entry)
VOID EFIAPI OrderedCollectionDelete(IN OUT ORDERED_COLLECTION *Collection, IN ORDERED_COLLECTION_ENTRY *Entry, OUT VOID **UserStruct OPTIONAL)
BOOLEAN EFIAPI OrderedCollectionIsEmpty(IN CONST ORDERED_COLLECTION *Collection)
#define EFI_PCI_STATUS_CAPABILITY
0x0010
#define PCI_EXP_MAX_CONFIG_OFFSET
#define EFI_PCI_CAPABILITY_ID_PCIEXP
VOID *EFIAPI AllocatePool(IN UINTN AllocationSize)