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CpuIo2Mm.c
Go to the documentation of this file.
1
9#include "CpuIo2Mm.h"
10
11//
12// Handle for the SMM CPU I/O Protocol
13//
15
16//
17// SMM CPU I/O Protocol instance
18//
19EFI_SMM_CPU_IO2_PROTOCOL mSmmCpuIo2 = {
20 {
23 },
24 {
27 }
28};
29
30//
31// Lookup table for increment values based on transfer widths
32//
33UINT8 mStride[] = {
34 1, // SMM_IO_UINT8
35 2, // SMM_IO_UINT16
36 4, // SMM_IO_UINT32
37 8 // SMM_IO_UINT64
38};
39
59 IN BOOLEAN MmioOperation,
60 IN EFI_SMM_IO_WIDTH Width,
61 IN UINT64 Address,
62 IN UINTN Count,
63 IN VOID *Buffer
64 )
65{
66 UINT64 MaxCount;
67 UINT64 Limit;
68
69 //
70 // Check to see if Buffer is NULL
71 //
72 if (Buffer == NULL) {
73 return EFI_INVALID_PARAMETER;
74 }
75
76 //
77 // Check to see if Width is in the valid range
78 //
79 if ((UINT32)Width > SMM_IO_UINT64) {
80 return EFI_INVALID_PARAMETER;
81 }
82
83 //
84 // Check to see if Width is in the valid range for I/O Port operations
85 //
86 if (!MmioOperation && (Width == SMM_IO_UINT64)) {
87 return EFI_INVALID_PARAMETER;
88 }
89
90 //
91 // Check to see if any address associated with this transfer exceeds the maximum
92 // allowed address. The maximum address implied by the parameters passed in is
93 // Address + Size * Count. If the following condition is met, then the transfer
94 // is not supported.
95 //
96 // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1
97 //
98 // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count
99 // can also be the maximum integer value supported by the CPU, this range
100 // check must be adjusted to avoid all overflow conditions.
101 //
102 // The following form of the range check is equivalent but assumes that
103 // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1).
104 //
105 Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS);
106 if (Count == 0) {
107 if (Address > Limit) {
108 return EFI_UNSUPPORTED;
109 }
110 } else {
111 MaxCount = RShiftU64 (Limit, Width);
112 if (MaxCount < (Count - 1)) {
113 return EFI_UNSUPPORTED;
114 }
115
116 if (Address > LShiftU64 (MaxCount - Count + 1, Width)) {
117 return EFI_UNSUPPORTED;
118 }
119 }
120
121 //
122 // Check to see if Address is aligned
123 //
124 if ((Address & ((UINT64)mStride[Width] - 1)) != 0) {
125 return EFI_UNSUPPORTED;
126 }
127
128 return EFI_SUCCESS;
129}
130
155EFIAPI
158 IN EFI_SMM_IO_WIDTH Width,
159 IN UINT64 Address,
160 IN UINTN Count,
161 OUT VOID *Buffer
162 )
163{
164 EFI_STATUS Status;
165 UINT8 Stride;
166 UINT8 *Uint8Buffer;
167
168 Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
169 if (EFI_ERROR (Status)) {
170 return Status;
171 }
172
173 //
174 // Select loop based on the width of the transfer
175 //
176 Stride = mStride[Width];
177 for (Uint8Buffer = Buffer; Count > 0; Address += Stride, Uint8Buffer += Stride, Count--) {
178 if (Width == SMM_IO_UINT8) {
179 *Uint8Buffer = MmioRead8 ((UINTN)Address);
180 } else if (Width == SMM_IO_UINT16) {
181 *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
182 } else if (Width == SMM_IO_UINT32) {
183 *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
184 } else if (Width == SMM_IO_UINT64) {
185 *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);
186 }
187 }
188
189 return EFI_SUCCESS;
190}
191
216EFIAPI
219 IN EFI_SMM_IO_WIDTH Width,
220 IN UINT64 Address,
221 IN UINTN Count,
222 IN VOID *Buffer
223 )
224{
225 EFI_STATUS Status;
226 UINT8 Stride;
227 UINT8 *Uint8Buffer;
228
229 Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer);
230 if (EFI_ERROR (Status)) {
231 return Status;
232 }
233
234 //
235 // Select loop based on the width of the transfer
236 //
237 Stride = mStride[Width];
238 for (Uint8Buffer = Buffer; Count > 0; Address += Stride, Uint8Buffer += Stride, Count--) {
239 if (Width == SMM_IO_UINT8) {
240 MmioWrite8 ((UINTN)Address, *Uint8Buffer);
241 } else if (Width == SMM_IO_UINT16) {
242 MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
243 } else if (Width == SMM_IO_UINT32) {
244 MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
245 } else if (Width == SMM_IO_UINT64) {
246 MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));
247 }
248 }
249
250 return EFI_SUCCESS;
251}
252
277EFIAPI
280 IN EFI_SMM_IO_WIDTH Width,
281 IN UINT64 Address,
282 IN UINTN Count,
283 OUT VOID *Buffer
284 )
285{
286 EFI_STATUS Status;
287 UINT8 Stride;
288 UINT8 *Uint8Buffer;
289
290 Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
291 if (EFI_ERROR (Status)) {
292 return Status;
293 }
294
295 //
296 // Select loop based on the width of the transfer
297 //
298 Stride = mStride[Width];
299 for (Uint8Buffer = Buffer; Count > 0; Address += Stride, Uint8Buffer += Stride, Count--) {
300 if (Width == SMM_IO_UINT8) {
301 *Uint8Buffer = IoRead8 ((UINTN)Address);
302 } else if (Width == SMM_IO_UINT16) {
303 *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
304 } else if (Width == SMM_IO_UINT32) {
305 *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
306 }
307 }
308
309 return EFI_SUCCESS;
310}
311
336EFIAPI
339 IN EFI_SMM_IO_WIDTH Width,
340 IN UINT64 Address,
341 IN UINTN Count,
342 IN VOID *Buffer
343 )
344{
345 EFI_STATUS Status;
346 UINT8 Stride;
347 UINT8 *Uint8Buffer;
348
349 //
350 // Make sure the parameters are valid
351 //
352 Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer);
353 if (EFI_ERROR (Status)) {
354 return Status;
355 }
356
357 //
358 // Select loop based on the width of the transfer
359 //
360 Stride = mStride[Width];
361 for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += Stride, Uint8Buffer += Stride, Count--) {
362 if (Width == SMM_IO_UINT8) {
363 IoWrite8 ((UINTN)Address, *Uint8Buffer);
364 } else if (Width == SMM_IO_UINT16) {
365 IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
366 } else if (Width == SMM_IO_UINT32) {
367 IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
368 }
369 }
370
371 return EFI_SUCCESS;
372}
373
383 VOID
384 )
385{
386 EFI_STATUS Status;
387
388 //
389 // Copy the SMM CPU I/O Protocol instance into the System Management System Table
390 //
391 CopyMem (&gMmst->MmIo, &mSmmCpuIo2, sizeof (mSmmCpuIo2));
392
393 //
394 // Install the SMM CPU I/O Protocol into the MM protocol database
395 //
396 Status = gMmst->MmInstallProtocolInterface (
397 &mHandle,
398 &gEfiSmmCpuIo2ProtocolGuid,
400 &mSmmCpuIo2
401 );
402 ASSERT_EFI_ERROR (Status);
403
404 return Status;
405}
UINT64 UINTN
#define MAX_ADDRESS
UINT64 EFIAPI RShiftU64(IN UINT64 Operand, IN UINTN Count)
Definition: RShiftU64.c:28
UINT64 EFIAPI LShiftU64(IN UINT64 Operand, IN UINTN Count)
Definition: LShiftU64.c:28
VOID *EFIAPI CopyMem(OUT VOID *DestinationBuffer, IN CONST VOID *SourceBuffer, IN UINTN Length)
EFI_STATUS EFIAPI CpuMemoryServiceRead(IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
Definition: CpuIo2Mm.c:156
EFI_STATUS EFIAPI CpuIoServiceWrite(IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
Definition: CpuIo2Mm.c:337
EFI_STATUS EFIAPI CpuIoServiceRead(IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer)
Definition: CpuIo2Mm.c:278
EFI_STATUS CpuIoCheckParameter(IN BOOLEAN MmioOperation, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
Definition: CpuIo2Mm.c:58
EFI_STATUS EFIAPI CpuMemoryServiceWrite(IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This, IN EFI_SMM_IO_WIDTH Width, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer)
Definition: CpuIo2Mm.c:217
EFI_HANDLE mHandle
Definition: CpuIo2Mm.c:14
EFI_STATUS CommonCpuIo2Initialize(VOID)
Definition: CpuIo2Mm.c:382
UINT8 EFIAPI IoWrite8(IN UINTN Port, IN UINT8 Value)
Definition: IoLibArmVirt.c:200
UINT64 EFIAPI MmioWrite64(IN UINTN Address, IN UINT64 Value)
Definition: IoLib.c:400
UINT64 EFIAPI MmioRead64(IN UINTN Address)
Definition: IoLib.c:355
UINT16 EFIAPI MmioRead16(IN UINTN Address)
Definition: IoLib.c:170
UINT8 EFIAPI MmioRead8(IN UINTN Address)
Definition: IoLib.c:82
UINT8 EFIAPI MmioWrite8(IN UINTN Address, IN UINT8 Value)
Definition: IoLib.c:126
UINT8 EFIAPI IoRead8(IN UINTN Port)
Definition: IoLibArmVirt.c:175
UINT32 EFIAPI MmioRead32(IN UINTN Address)
Definition: IoLib.c:262
UINT16 EFIAPI IoRead16(IN UINTN Port)
Definition: IoLibArmVirt.c:225
UINT16 EFIAPI MmioWrite16(IN UINTN Address, IN UINT16 Value)
Definition: IoLib.c:216
UINT32 EFIAPI IoRead32(IN UINTN Port)
Definition: IoLibArmVirt.c:275
UINT32 EFIAPI IoWrite32(IN UINTN Port, IN UINT32 Value)
Definition: IoLibArmVirt.c:300
UINT16 EFIAPI IoWrite16(IN UINTN Port, IN UINT16 Value)
Definition: IoLibArmVirt.c:250
UINT32 EFIAPI MmioWrite32(IN UINTN Address, IN UINT32 Value)
Definition: IoLib.c:309
#define NULL
Definition: Base.h:319
#define CONST
Definition: Base.h:259
#define TRUE
Definition: Base.h:301
#define FALSE
Definition: Base.h:307
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
#define ASSERT_EFI_ERROR(StatusParameter)
Definition: DebugLib.h:462
EFI_MM_IO_WIDTH
Definition: MmCpuIo.h:24
#define SMM_IO_UINT8
Definition: SmmCpuIo2.h:23
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:29
VOID * EFI_HANDLE
Definition: UefiBaseType.h:33
#define EFI_SUCCESS
Definition: UefiBaseType.h:112
@ EFI_NATIVE_INTERFACE
Definition: UefiSpec.h:1193
EFI_INSTALL_PROTOCOL_INTERFACE MmInstallProtocolInterface
Definition: PiMmCis.h:327
EFI_MM_CPU_IO_PROTOCOL MmIo
Definition: PiMmCis.h:269