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CreateHobList.c
Go to the documentation of this file.
1
10#include <PiMm.h>
11
12#include <PiPei.h>
14#include <Guid/MpInformation.h>
15
16#include <StandaloneMmCpu.h>
18#include <Library/ArmMmuLib.h>
19#include <Library/ArmSvcLib.h>
20#include <Library/DebugLib.h>
21#include <Library/HobLib.h>
22#include <Library/BaseLib.h>
25
27
29HobConstructor (
30 IN VOID *EfiMemoryBegin,
31 IN UINTN EfiMemoryLength,
32 IN VOID *EfiFreeMemoryBottom,
33 IN VOID *EfiFreeMemoryTop
34 );
35
36// GUID to identify HOB with whereabouts of communication buffer with Normal
37// World
38extern EFI_GUID gEfiStandaloneMmNonSecureBufferGuid;
39
40// GUID to identify HOB where the entry point of the CPU driver will be
41// populated to allow this entry point driver to invoke it upon receipt of an
42// event
43extern EFI_GUID gEfiMmCpuDriverEpDescriptorGuid;
44
54VOID *
56 IN OUT PI_MM_CPU_DRIVER_ENTRYPOINT *CpuDriverEntryPoint,
57 IN EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo
58 )
59{
62 UINT32 Index;
63 UINT32 BufferSize;
64 UINT32 Flags;
65 EFI_MMRAM_HOB_DESCRIPTOR_BLOCK *MmramRangesHob;
66 EFI_MMRAM_DESCRIPTOR *MmramRanges;
67 EFI_MMRAM_DESCRIPTOR *NsCommBufMmramRange;
68 MP_INFORMATION_HOB_DATA *MpInformationHobData;
69 EFI_PROCESSOR_INFORMATION *ProcInfoBuffer;
71 MM_CPU_DRIVER_EP_DESCRIPTOR *CpuDriverEntryPointDesc;
72
73 // Create a hoblist with a PHIT and EOH
74 HobStart = HobConstructor (
75 (VOID *)(UINTN)PayloadBootInfo->SpMemBase,
76 (UINTN)PayloadBootInfo->SpMemLimit - PayloadBootInfo->SpMemBase,
77 (VOID *)(UINTN)PayloadBootInfo->SpHeapBase,
78 (VOID *)(UINTN)(PayloadBootInfo->SpHeapBase + PayloadBootInfo->SpHeapSize)
79 );
80
81 // Check that the Hoblist starts at the bottom of the Heap
82 ASSERT (HobStart == (VOID *)(UINTN)PayloadBootInfo->SpHeapBase);
83
84 // Build a Boot Firmware Volume HOB
85 BuildFvHob (PayloadBootInfo->SpImageBase, PayloadBootInfo->SpImageSize);
86
87 // Build a resource descriptor Hob that describes the available physical
88 // memory range
89 Attributes = (
90 EFI_RESOURCE_ATTRIBUTE_PRESENT |
91 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
92 EFI_RESOURCE_ATTRIBUTE_TESTED |
93 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
94 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
95 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
96 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
97 );
98
100 EFI_RESOURCE_SYSTEM_MEMORY,
101 Attributes,
102 (UINTN)PayloadBootInfo->SpMemBase,
103 PayloadBootInfo->SpMemLimit - PayloadBootInfo->SpMemBase
104 );
105
106 // Find the size of the GUIDed HOB with MP information
107 BufferSize = sizeof (MP_INFORMATION_HOB_DATA);
108 BufferSize += sizeof (EFI_PROCESSOR_INFORMATION) * PayloadBootInfo->NumCpus;
109
110 // Create a Guided MP information HOB to enable the ARM TF CPU driver to
111 // perform per-cpu allocations.
112 MpInformationHobData = BuildGuidHob (&gMpInformationHobGuid, BufferSize);
113
114 // Populate the MP information HOB with the topology information passed by
115 // privileged firmware
116 MpInformationHobData->NumberOfProcessors = PayloadBootInfo->NumCpus;
117 MpInformationHobData->NumberOfEnabledProcessors = PayloadBootInfo->NumCpus;
118 ProcInfoBuffer = MpInformationHobData->ProcessorInfoBuffer;
119 CpuInfo = PayloadBootInfo->CpuInfo;
120
121 for (Index = 0; Index < PayloadBootInfo->NumCpus; Index++) {
122 ProcInfoBuffer[Index].ProcessorId = CpuInfo[Index].Mpidr;
123 ProcInfoBuffer[Index].Location.Package = GET_CLUSTER_ID (CpuInfo[Index].Mpidr);
124 ProcInfoBuffer[Index].Location.Core = GET_CORE_ID (CpuInfo[Index].Mpidr);
125 ProcInfoBuffer[Index].Location.Thread = GET_CORE_ID (CpuInfo[Index].Mpidr);
126
128 if (CpuInfo[Index].Flags & CPU_INFO_FLAG_PRIMARY_CPU) {
129 Flags |= PROCESSOR_AS_BSP_BIT;
130 }
131
132 ProcInfoBuffer[Index].StatusFlag = Flags;
133 }
134
135 // Create a Guided HOB to tell the ARM TF CPU driver the location and length
136 // of the communication buffer shared with the Normal world.
137 NsCommBufMmramRange = (EFI_MMRAM_DESCRIPTOR *)BuildGuidHob (
138 &gEfiStandaloneMmNonSecureBufferGuid,
139 sizeof (EFI_MMRAM_DESCRIPTOR)
140 );
141 NsCommBufMmramRange->PhysicalStart = PayloadBootInfo->SpNsCommBufBase;
142 NsCommBufMmramRange->CpuStart = PayloadBootInfo->SpNsCommBufBase;
143 NsCommBufMmramRange->PhysicalSize = PayloadBootInfo->SpNsCommBufSize;
144 NsCommBufMmramRange->RegionState = EFI_CACHEABLE | EFI_ALLOCATED;
145
146 // Create a Guided HOB to enable the ARM TF CPU driver to share its entry
147 // point and populate it with the address of the shared buffer
148 CpuDriverEntryPointDesc = (MM_CPU_DRIVER_EP_DESCRIPTOR *)BuildGuidHob (
149 &gEfiMmCpuDriverEpDescriptorGuid,
151 );
152
153 *CpuDriverEntryPoint = NULL;
154 CpuDriverEntryPointDesc->MmCpuDriverEpPtr = CpuDriverEntryPoint;
155
156 // Find the size of the GUIDed HOB with SRAM ranges
157 BufferSize = sizeof (EFI_MMRAM_HOB_DESCRIPTOR_BLOCK);
158 BufferSize += PayloadBootInfo->NumSpMemRegions * sizeof (EFI_MMRAM_DESCRIPTOR);
159
160 // Create a GUIDed HOB with SRAM ranges
161 MmramRangesHob = BuildGuidHob (&gEfiMmPeiMmramMemoryReserveGuid, BufferSize);
162
163 // Fill up the number of MMRAM memory regions
164 MmramRangesHob->NumberOfMmReservedRegions = PayloadBootInfo->NumSpMemRegions;
165 // Fill up the MMRAM ranges
166 MmramRanges = &MmramRangesHob->Descriptor[0];
167
168 // Base and size of memory occupied by the Standalone MM image
169 MmramRanges[0].PhysicalStart = PayloadBootInfo->SpImageBase;
170 MmramRanges[0].CpuStart = PayloadBootInfo->SpImageBase;
171 MmramRanges[0].PhysicalSize = PayloadBootInfo->SpImageSize;
172 MmramRanges[0].RegionState = EFI_CACHEABLE | EFI_ALLOCATED;
173
174 // Base and size of buffer shared with privileged Secure world software
175 MmramRanges[1].PhysicalStart = PayloadBootInfo->SpSharedBufBase;
176 MmramRanges[1].CpuStart = PayloadBootInfo->SpSharedBufBase;
177 MmramRanges[1].PhysicalSize = PayloadBootInfo->SpSharedBufSize;
178 MmramRanges[1].RegionState = EFI_CACHEABLE | EFI_ALLOCATED;
179
180 // Base and size of buffer used for synchronous communication with Normal
181 // world software
182 MmramRanges[2].PhysicalStart = PayloadBootInfo->SpNsCommBufBase;
183 MmramRanges[2].CpuStart = PayloadBootInfo->SpNsCommBufBase;
184 MmramRanges[2].PhysicalSize = PayloadBootInfo->SpNsCommBufSize;
185 MmramRanges[2].RegionState = EFI_CACHEABLE | EFI_ALLOCATED;
186
187 // Base and size of memory allocated for stacks for all cpus
188 MmramRanges[3].PhysicalStart = PayloadBootInfo->SpStackBase;
189 MmramRanges[3].CpuStart = PayloadBootInfo->SpStackBase;
190 MmramRanges[3].PhysicalSize = PayloadBootInfo->SpPcpuStackSize * PayloadBootInfo->NumCpus;
191 MmramRanges[3].RegionState = EFI_CACHEABLE | EFI_ALLOCATED;
192
193 // Base and size of heap memory shared by all cpus
194 MmramRanges[4].PhysicalStart = (EFI_PHYSICAL_ADDRESS)(UINTN)HobStart;
195 MmramRanges[4].CpuStart = (EFI_PHYSICAL_ADDRESS)(UINTN)HobStart;
196 MmramRanges[4].PhysicalSize = HobStart->EfiFreeMemoryBottom - (EFI_PHYSICAL_ADDRESS)(UINTN)HobStart;
197 MmramRanges[4].RegionState = EFI_CACHEABLE | EFI_ALLOCATED;
198
199 // Base and size of heap memory shared by all cpus
200 MmramRanges[5].PhysicalStart = HobStart->EfiFreeMemoryBottom;
201 MmramRanges[5].CpuStart = HobStart->EfiFreeMemoryBottom;
202 MmramRanges[5].PhysicalSize = HobStart->EfiFreeMemoryTop - HobStart->EfiFreeMemoryBottom;
203 MmramRanges[5].RegionState = EFI_CACHEABLE;
204
205 return HobStart;
206}
UINT64 UINTN
VOID EFIAPI BuildResourceDescriptorHob(IN EFI_RESOURCE_TYPE ResourceType, IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute, IN EFI_PHYSICAL_ADDRESS PhysicalStart, IN UINT64 NumberOfBytes)
Definition: HobLib.c:299
VOID EFIAPI BuildFvHob(IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length)
Definition: HobLib.c:404
VOID *EFIAPI BuildGuidHob(IN CONST EFI_GUID *Guid, IN UINTN DataLength)
Definition: HobLib.c:336
VOID * CreateHobListFromBootInfo(IN OUT PI_MM_CPU_DRIVER_ENTRYPOINT *CpuDriverEntryPoint, IN EFI_SECURE_PARTITION_BOOT_INFO *PayloadBootInfo)
Definition: CreateHobList.c:55
#define NULL
Definition: Base.h:319
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
#define PROCESSOR_HEALTH_STATUS_BIT
Definition: MpService.h:84
#define PROCESSOR_AS_BSP_BIT
Definition: MpService.h:70
#define PROCESSOR_ENABLED_BIT
Definition: MpService.h:77
UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE
Definition: PiHob.h:241
UINT64 EFI_PHYSICAL_ADDRESS
Definition: UefiBaseType.h:50
EFI_PHYSICAL_ADDRESS EfiFreeMemoryBottom
Definition: PiHob.h:92
EFI_PHYSICAL_ADDRESS EfiFreeMemoryTop
Definition: PiHob.h:88
EFI_PHYSICAL_ADDRESS CpuStart
Definition: PiMultiPhase.h:127
EFI_PHYSICAL_ADDRESS PhysicalStart
Definition: PiMultiPhase.h:122
EFI_MMRAM_DESCRIPTOR Descriptor[1]
EFI_CPU_PHYSICAL_LOCATION Location
Definition: MpService.h:178
Definition: Base.h:213