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FdtParserLib.c
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1
6#include <PiPei.h>
7#include <Library/BaseLib.h>
10#include <Library/DebugLib.h>
11#include <Library/HobLib.h>
12#include <Library/PcdLib.h>
13#include <Library/IoLib.h>
29#include <Library/PrintLib.h>
30#include <Library/FdtLib.h>
32#include <Protocol/PciIo.h>
34
35typedef enum {
36 ReservedMemory = 1,
37 Memory,
38 FrameBuffer,
39 PciRootBridge,
40 Options,
41 DoNothing
42} FDT_NODE_TYPE;
43
44#define MEMORY_ATTRIBUTE_DEFAULT (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
45 EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \
46 EFI_RESOURCE_ATTRIBUTE_TESTED | \
47 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | \
48 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | \
49 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | \
50 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE )
51
52#define ROOT_BRIDGE_SUPPORTS_DEFAULT (EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 | \
53 EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 | \
54 EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 | \
55 EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO | \
56 EFI_PCI_IO_ATTRIBUTE_VGA_IO | \
57 EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | \
58 EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | \
59 EFI_PCI_IO_ATTRIBUTE_ISA_IO | \
60 EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO )
61
62extern VOID *mHobList;
63UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *mPciRootBridgeInfo = NULL;
64INT32 mNode[0x500] = { 0 };
65UINT32 mNodeIndex = 0;
66UPL_PCI_SEGMENT_INFO_HOB *mUplPciSegmentInfoHob;
67
84EFIAPI
86 IN VOID *EfiMemoryBottom,
87 IN VOID *EfiMemoryTop,
88 IN VOID *EfiFreeMemoryBottom,
89 IN VOID *EfiFreeMemoryTop
90 );
91
97VOID
99 INT32 Node
100 )
101{
102 DEBUG ((DEBUG_INFO, "\n RecordMemoryNode %x , mNodeIndex :%x \n", Node, mNodeIndex));
103 mNode[mNodeIndex] = Node;
104 mNodeIndex++;
105}
106
115BOOLEAN
117 INT32 Node
118 )
119{
120 UINT32 i;
121
122 for (i = 0; i < mNodeIndex; i++) {
123 if (mNode[i] == Node) {
124 return TRUE;
125 }
126 }
127
128 return FALSE;
129}
130
139FDT_NODE_TYPE
141 CHAR8 *NodeString,
142 INT32 Depth
143 )
144{
145 DEBUG ((DEBUG_INFO, "\n CheckNodeType %a \n", NodeString));
146 if (AsciiStrnCmp (NodeString, "reserved-memory", AsciiStrLen ("reserved-memory")) == 0 ) {
147 return ReservedMemory;
148 } else if (AsciiStrnCmp (NodeString, "memory@", AsciiStrLen ("memory@")) == 0 ) {
149 return Memory;
150 } else if (AsciiStrnCmp (NodeString, "framebuffer@", AsciiStrLen ("framebuffer@")) == 0) {
151 return FrameBuffer;
152 } else if (AsciiStrnCmp (NodeString, "pci-rb", AsciiStrLen ("pci-rb")) == 0 ) {
153 return PciRootBridge;
154 } else if (AsciiStrCmp (NodeString, "options") == 0) {
155 return Options;
156 } else {
157 return DoNothing;
158 }
159}
160
167VOID
169 IN VOID *Fdt,
170 IN INT32 Node
171 )
172{
173 UINT32 Attribute;
174 UINT8 ECCAttribute;
175 UINT32 ECCData, ECCData2;
176 INT32 Property;
177 CONST FDT_PROPERTY *PropertyPtr;
178 INT32 TempLen;
179 CONST CHAR8 *TempStr;
180 UINT64 *Data64;
181 UINT32 *Data32;
182 UINT64 StartAddress;
183 UINT64 NumberOfBytes;
184
185 Attribute = MEMORY_ATTRIBUTE_DEFAULT;
186 ECCAttribute = 0;
187 ECCData = ECCData2 = 0;
188 for (Property = FdtFirstPropertyOffset (Fdt, Node); Property >= 0; Property = FdtNextPropertyOffset (Fdt, Property)) {
189 PropertyPtr = FdtGetPropertyByOffset (Fdt, Property, &TempLen);
190 TempStr = FdtGetString (Fdt, Fdt32ToCpu (PropertyPtr->NameOffset), NULL);
191 if (AsciiStrCmp (TempStr, "reg") == 0) {
192 Data64 = (UINT64 *)(PropertyPtr->Data);
193 StartAddress = Fdt64ToCpu (*Data64);
194 NumberOfBytes = Fdt64ToCpu (*(Data64 + 1));
195 } else if (AsciiStrCmp (TempStr, "ecc-detection-bits") == 0) {
196 Data32 = (UINT32 *)(PropertyPtr->Data);
197 ECCData = Fdt32ToCpu (*Data32);
198 } else if (AsciiStrCmp (TempStr, "ecc-correction-bits") == 0) {
199 Data32 = (UINT32 *)(PropertyPtr->Data);
200 ECCData2 = Fdt32ToCpu (*Data32);
201 }
202 }
203
204 if (ECCData == ECCData2) {
205 if (ECCData == 1) {
206 ECCAttribute = EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC;
207 } else if (ECCData == 2) {
208 ECCAttribute = EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC;
209 }
210 }
211
212 if (ECCAttribute != 0) {
213 Attribute |= ECCAttribute;
214 }
215
216 BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY, Attribute, StartAddress, NumberOfBytes);
217}
218
225VOID
227 IN VOID *Fdt,
228 IN INT32 Node
229 )
230{
231 INT32 SubNode;
232 INT32 TempLen;
233 CONST CHAR8 *TempStr;
234 CONST FDT_PROPERTY *PropertyPtr;
235 UINT64 *Data64;
236 UINT64 StartAddress;
237 UINT64 NumberOfBytes;
238 UNIVERSAL_PAYLOAD_ACPI_TABLE *PlatformAcpiTable;
240 FDT_NODE_HEADER *NodePtr;
241 UINT32 Attribute;
242
243 PlatformAcpiTable = NULL;
244
245 for (SubNode = FdtFirstSubnode (Fdt, Node); SubNode >= 0; SubNode = FdtNextSubnode (Fdt, SubNode)) {
246 NodePtr = (FDT_NODE_HEADER *)((CONST CHAR8 *)Fdt + SubNode + Fdt32ToCpu (((FDT_HEADER *)Fdt)->OffsetDtStruct));
247 DEBUG ((DEBUG_INFO, "\n SubNode(%08X) %a", SubNode, NodePtr->Name));
248 PropertyPtr = FdtGetProperty (Fdt, SubNode, "reg", &TempLen);
249 ASSERT (TempLen > 0);
250 TempStr = (CHAR8 *)(PropertyPtr->Data);
251 if (TempLen > 0) {
252 Data64 = (UINT64 *)(PropertyPtr->Data);
253 StartAddress = Fdt64ToCpu (*Data64);
254 NumberOfBytes = Fdt64ToCpu (*(Data64 + 1));
255 DEBUG ((DEBUG_INFO, "\n Property %a", TempStr));
256 DEBUG ((DEBUG_INFO, " %016lX %016lX\n", StartAddress, NumberOfBytes));
257 }
258
259 RecordMemoryNode (SubNode);
260
261 if (AsciiStrnCmp (NodePtr->Name, "mmio@", AsciiStrLen ("mmio@")) == 0) {
262 DEBUG ((DEBUG_INFO, " MemoryMappedIO"));
263 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiMemoryMappedIO);
264 } else {
265 PropertyPtr = FdtGetProperty (Fdt, SubNode, "compatible", &TempLen);
266 TempStr = (CHAR8 *)(PropertyPtr->Data);
267 DEBUG ((DEBUG_INFO, "compatible: %a\n", TempStr));
268 if (AsciiStrnCmp (TempStr, "boot-code", AsciiStrLen ("boot-code")) == 0) {
269 DEBUG ((DEBUG_INFO, " boot-code\n"));
270 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiBootServicesCode);
271 } else if (AsciiStrnCmp (TempStr, "boot-data", AsciiStrLen ("boot-data")) == 0) {
272 DEBUG ((DEBUG_INFO, " boot-data\n"));
273 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiBootServicesData);
274 } else if (AsciiStrnCmp (TempStr, "runtime-code", AsciiStrLen ("runtime-code")) == 0) {
275 DEBUG ((DEBUG_INFO, " runtime-code\n"));
276 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiRuntimeServicesCode);
277 } else if (AsciiStrnCmp (TempStr, "runtime-data", AsciiStrLen ("runtime-data")) == 0) {
278 DEBUG ((DEBUG_INFO, " runtime-data\n"));
279 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiRuntimeServicesData);
280 } else if (AsciiStrnCmp (TempStr, "special-purpose", AsciiStrLen ("special-purpose")) == 0) {
281 Attribute = MEMORY_ATTRIBUTE_DEFAULT | EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE;
282 DEBUG ((DEBUG_INFO, " special-purpose memory\n"));
283 BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY, Attribute, StartAddress, NumberOfBytes);
284 } else if (AsciiStrnCmp (TempStr, "acpi-nvs", AsciiStrLen ("acpi-nvs")) == 0) {
285 DEBUG ((DEBUG_INFO, "\n ********* acpi-nvs ********\n"));
286 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiACPIMemoryNVS);
287 } else if (AsciiStrnCmp (TempStr, "acpi", AsciiStrLen ("acpi")) == 0) {
288 DEBUG ((DEBUG_INFO, " acpi, StartAddress:%x, NumberOfBytes:%x\n", StartAddress, NumberOfBytes));
289 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiBootServicesData);
290 PlatformAcpiTable = BuildGuidHob (&gUniversalPayloadAcpiTableGuid, sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE));
291 if (PlatformAcpiTable != NULL) {
292 DEBUG ((DEBUG_INFO, " build gUniversalPayloadAcpiTableGuid , NumberOfBytes:%x\n", NumberOfBytes));
293 PlatformAcpiTable->Rsdp = (EFI_PHYSICAL_ADDRESS)(UINTN)StartAddress;
294 PlatformAcpiTable->Header.Revision = UNIVERSAL_PAYLOAD_ACPI_TABLE_REVISION;
295 PlatformAcpiTable->Header.Length = sizeof (UNIVERSAL_PAYLOAD_ACPI_TABLE);
296 }
297 } else if (AsciiStrnCmp (TempStr, "smbios", AsciiStrLen ("smbios")) == 0) {
298 DEBUG ((DEBUG_INFO, " build smbios, NumberOfBytes:%x\n", NumberOfBytes));
299 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiBootServicesData);
300 SmbiosTable = BuildGuidHob (&gUniversalPayloadSmbios3TableGuid, sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE));
301 if (SmbiosTable != NULL) {
302 SmbiosTable->Header.Revision = UNIVERSAL_PAYLOAD_SMBIOS_TABLE_REVISION;
303 SmbiosTable->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SMBIOS_TABLE);
304 SmbiosTable->SmBiosEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)(StartAddress);
305 }
306 } else {
307 BuildMemoryAllocationHob (StartAddress, NumberOfBytes, EfiReservedMemoryType);
308 }
309 }
310 }
311}
312
321CHAR8 *
323 IN VOID *Fdt,
324 IN INT32 Node
325 )
326{
327 INT32 Property;
328 INT32 TempLen;
329 CONST FDT_PROPERTY *PropertyPtr;
330 CONST CHAR8 *TempStr;
331 UINT32 *Data32;
332 UINT64 FrameBufferBase;
333 UINT32 FrameBufferSize;
334 EFI_PEI_GRAPHICS_INFO_HOB *GraphicsInfo;
335 CHAR8 *GmaStr;
336
337 GmaStr = "Gma";
338 //
339 // Create GraphicInfo HOB.
340 //
341 GraphicsInfo = BuildGuidHob (&gEfiGraphicsInfoHobGuid, sizeof (EFI_PEI_GRAPHICS_INFO_HOB));
342 ASSERT (GraphicsInfo != NULL);
343 if (GraphicsInfo == NULL) {
344 return GmaStr;
345 }
346
347 ZeroMem (GraphicsInfo, sizeof (EFI_PEI_GRAPHICS_INFO_HOB));
348
349 for (Property = FdtFirstPropertyOffset (Fdt, Node); Property >= 0; Property = FdtNextPropertyOffset (Fdt, Property)) {
350 PropertyPtr = FdtGetPropertyByOffset (Fdt, Property, &TempLen);
351 TempStr = FdtGetString (Fdt, Fdt32ToCpu (PropertyPtr->NameOffset), NULL);
352 if (AsciiStrCmp (TempStr, "reg") == 0) {
353 Data32 = (UINT32 *)(PropertyPtr->Data);
354 FrameBufferBase = Fdt32ToCpu (*(Data32 + 0));
355 FrameBufferSize = Fdt32ToCpu (*(Data32 + 1));
356 GraphicsInfo->FrameBufferBase = FrameBufferBase;
357 GraphicsInfo->FrameBufferSize = (UINT32)FrameBufferSize;
358 } else if (AsciiStrCmp (TempStr, "width") == 0) {
359 Data32 = (UINT32 *)(PropertyPtr->Data);
360 GraphicsInfo->GraphicsMode.HorizontalResolution = Fdt32ToCpu (*Data32);
361 } else if (AsciiStrCmp (TempStr, "height") == 0) {
362 Data32 = (UINT32 *)(PropertyPtr->Data);
363 GraphicsInfo->GraphicsMode.VerticalResolution = Fdt32ToCpu (*Data32);
364 } else if (AsciiStrCmp (TempStr, "format") == 0) {
365 TempStr = (CHAR8 *)(PropertyPtr->Data);
366 if (AsciiStrCmp (TempStr, "a8r8g8b8") == 0) {
367 GraphicsInfo->GraphicsMode.PixelFormat = PixelRedGreenBlueReserved8BitPerColor;
368 } else if (AsciiStrCmp (TempStr, "a8b8g8r8") == 0) {
369 GraphicsInfo->GraphicsMode.PixelFormat = PixelBlueGreenRedReserved8BitPerColor;
370 } else {
371 GraphicsInfo->GraphicsMode.PixelFormat = PixelFormatMax;
372 }
373 } else if (AsciiStrCmp (TempStr, "display") == 0) {
374 GmaStr = (CHAR8 *)(PropertyPtr->Data);
375 GmaStr++;
376 DEBUG ((DEBUG_INFO, " display (%s)", GmaStr));
377 }
378 }
379
380 return GmaStr;
381}
382
391VOID
393 IN VOID *Fdt,
394 IN INT32 Node,
395 OUT UINT8 *PciEnumDone,
396 OUT EFI_BOOT_MODE *BootMode
397 )
398{
399 INT32 SubNode;
400 FDT_NODE_HEADER *NodePtr;
401 UNIVERSAL_PAYLOAD_BASE *PayloadBase;
402 CONST FDT_PROPERTY *PropertyPtr;
403 CONST CHAR8 *TempStr;
404 INT32 TempLen;
405 UINT32 *Data32;
406 UINT64 *Data64;
407 UINT64 StartAddress;
408 UINT8 SizeOfMemorySpace;
409
410 for (SubNode = FdtFirstSubnode (Fdt, Node); SubNode >= 0; SubNode = FdtNextSubnode (Fdt, SubNode)) {
411 NodePtr = (FDT_NODE_HEADER *)((CONST CHAR8 *)Fdt + SubNode + Fdt32ToCpu (((FDT_HEADER *)Fdt)->OffsetDtStruct));
412 DEBUG ((DEBUG_INFO, "\n SubNode(%08X) %a", SubNode, NodePtr->Name));
413
414 if (AsciiStrnCmp (NodePtr->Name, "upl-images@", AsciiStrLen ("upl-images@")) == 0) {
415 DEBUG ((DEBUG_INFO, " Found image@ node \n"));
416 //
417 // Build PayloadBase HOB .
418 //
419 PayloadBase = BuildGuidHob (&gUniversalPayloadBaseGuid, sizeof (UNIVERSAL_PAYLOAD_BASE));
420 ASSERT (PayloadBase != NULL);
421 if (PayloadBase == NULL) {
422 return;
423 }
424
425 PayloadBase->Header.Revision = UNIVERSAL_PAYLOAD_BASE_REVISION;
426 PayloadBase->Header.Length = sizeof (UNIVERSAL_PAYLOAD_BASE);
427
428 PropertyPtr = FdtGetProperty (Fdt, SubNode, "addr", &TempLen);
429
430 ASSERT (TempLen > 0);
431 if (TempLen > 0) {
432 Data64 = (UINT64 *)(PropertyPtr->Data);
433 StartAddress = Fdt64ToCpu (*Data64);
434 DEBUG ((DEBUG_INFO, "\n Property(00000000) entry"));
435 DEBUG ((DEBUG_INFO, " %016lX\n", StartAddress));
436
437 PayloadBase->Entry = (EFI_PHYSICAL_ADDRESS)StartAddress;
438 }
439 }
440
441 if (AsciiStrnCmp (NodePtr->Name, "upl-params", AsciiStrLen ("upl-params")) == 0) {
442 PropertyPtr = FdtGetProperty (Fdt, SubNode, "addr-width", &TempLen);
443 if (TempLen > 0) {
444 Data32 = (UINT32 *)(PropertyPtr->Data);
445 DEBUG ((DEBUG_INFO, "\n Property(00000000) address_width"));
446 DEBUG ((DEBUG_INFO, " %X", Fdt32ToCpu (*Data32)));
447 SizeOfMemorySpace = (UINT8)Fdt32ToCpu (*Data32);
448 BuildCpuHob (SizeOfMemorySpace, PcdGet8 (SizeOfIoSpace));
449 }
450
451 PropertyPtr = FdtGetProperty (Fdt, SubNode, "pci-enum-done", &TempLen);
452 if (TempLen > 0) {
453 *PciEnumDone = 1;
454 DEBUG ((DEBUG_INFO, " Found PciEnumDone (%08X)\n", *PciEnumDone));
455 } else {
456 *PciEnumDone = 0;
457 DEBUG ((DEBUG_INFO, " Not Found PciEnumDone \n"));
458 }
459
460 PropertyPtr = FdtGetProperty (Fdt, SubNode, "boot-mode", &TempLen);
461 if (TempLen > 0) {
462 TempStr = (CHAR8 *)(PropertyPtr->Data);
463 if (AsciiStrCmp (TempStr, "normal") == 0) {
464 *BootMode = BOOT_WITH_FULL_CONFIGURATION;
465 } else if (AsciiStrCmp (TempStr, "fast") == 0) {
466 *BootMode = BOOT_WITH_MINIMAL_CONFIGURATION;
467 } else if (AsciiStrCmp (TempStr, "full") == 0) {
468 *BootMode = BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS;
469 } else if (AsciiStrCmp (TempStr, "default") == 0) {
470 *BootMode = BOOT_WITH_DEFAULT_SETTINGS;
471 } else if (AsciiStrCmp (TempStr, "s4") == 0) {
472 *BootMode = BOOT_ON_S4_RESUME;
473 } else if (AsciiStrCmp (TempStr, "s3") == 0) {
474 *BootMode = BOOT_ON_S3_RESUME;
475 }
476 }
477 }
478 }
479}
480
487VOID
489 IN VOID *Fdt,
490 IN INT32 SubNode
491 )
492{
494 CONST FDT_PROPERTY *PropertyPtr;
495 UINT16 GmaID;
496 UINT32 *Data32;
497 INT32 TempLen;
498
499 DEBUG ((DEBUG_INFO, " Found gma@ node \n"));
500 GraphicsDev = NULL;
501 //
502 // Build Graphic info HOB .
503 //
504 GraphicsDev = BuildGuidHob (&gEfiGraphicsDeviceInfoHobGuid, sizeof (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB));
505 ASSERT (GraphicsDev != NULL);
506 if (GraphicsDev == NULL) {
507 return;
508 }
509
510 SetMem (GraphicsDev, sizeof (EFI_PEI_GRAPHICS_DEVICE_INFO_HOB), 0xFF);
511 PropertyPtr = FdtGetProperty (Fdt, SubNode, "vendor-id", &TempLen);
512 ASSERT (TempLen > 0);
513 if (TempLen > 0) {
514 Data32 = (UINT32 *)(PropertyPtr->Data);
515 GmaID = (UINT16)Fdt32ToCpu (*Data32);
516 DEBUG ((DEBUG_INFO, "\n vendor-id"));
517 DEBUG ((DEBUG_INFO, " %016lX\n", GmaID));
518 GraphicsDev->VendorId = GmaID;
519 }
520
521 PropertyPtr = FdtGetProperty (Fdt, SubNode, "device-id", &TempLen);
522 ASSERT (TempLen > 0);
523 if (TempLen > 0) {
524 Data32 = (UINT32 *)(PropertyPtr->Data);
525 GmaID = (UINT16)Fdt32ToCpu (*Data32);
526 DEBUG ((DEBUG_INFO, "\n device-id"));
527 DEBUG ((DEBUG_INFO, " %016lX\n", GmaID));
528 GraphicsDev->DeviceId = GmaID;
529 }
530
531 PropertyPtr = FdtGetProperty (Fdt, SubNode, "revision-id", &TempLen);
532 ASSERT (TempLen > 0);
533 if (TempLen > 0) {
534 Data32 = (UINT32 *)(PropertyPtr->Data);
535 GmaID = (UINT16)Fdt32ToCpu (*Data32);
536 DEBUG ((DEBUG_INFO, "\n revision-id"));
537 DEBUG ((DEBUG_INFO, " %016lX\n", GmaID));
538 GraphicsDev->RevisionId = (UINT8)GmaID;
539 }
540
541 PropertyPtr = FdtGetProperty (Fdt, SubNode, "subsystem-vendor-id", &TempLen);
542 ASSERT (TempLen > 0);
543 if (TempLen > 0) {
544 Data32 = (UINT32 *)(PropertyPtr->Data);
545 GmaID = (UINT16)Fdt32ToCpu (*Data32);
546 DEBUG ((DEBUG_INFO, "\n subsystem-vendor-id"));
547 DEBUG ((DEBUG_INFO, " %016lX\n", GmaID));
548 GraphicsDev->SubsystemVendorId = GmaID;
549 }
550
551 PropertyPtr = FdtGetProperty (Fdt, SubNode, "subsystem-id", &TempLen);
552 ASSERT (TempLen > 0);
553 if (TempLen > 0) {
554 Data32 = (UINT32 *)(PropertyPtr->Data);
555 GmaID = (UINT16)Fdt32ToCpu (*Data32);
556 DEBUG ((DEBUG_INFO, "\n subsystem-id"));
557 DEBUG ((DEBUG_INFO, " %016lX\n", GmaID));
558 GraphicsDev->SubsystemId = GmaID;
559 }
560}
561
568VOID
570 IN VOID *Fdt,
571 IN INT32 SubNode
572 )
573{
575 CONST FDT_PROPERTY *PropertyPtr;
576 INT32 TempLen;
577 CONST CHAR8 *TempStr;
578 UINT32 *Data32;
579 UINT32 Attribute;
580
581 //
582 // Create SerialPortInfo HOB.
583 //
584 Serial = BuildGuidHob (&gUniversalPayloadSerialPortInfoGuid, sizeof (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO));
585 ASSERT (Serial != NULL);
586 if (Serial == NULL) {
587 return;
588 }
589
590 Serial->Header.Revision = UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_REVISION;
591 Serial->Header.Length = sizeof (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO);
592 Serial->RegisterStride = 1;
593 Serial->UseMmio = 1;
594
595 PropertyPtr = FdtGetProperty (Fdt, SubNode, "current-speed", &TempLen);
596 ASSERT (TempLen > 0);
597 if (TempLen > 0) {
598 Data32 = (UINT32 *)(PropertyPtr->Data);
599 DEBUG ((DEBUG_INFO, " %X", Fdt32ToCpu (*Data32)));
600 Serial->BaudRate = Fdt32ToCpu (*Data32);
601 }
602
603 PropertyPtr = FdtGetProperty (Fdt, SubNode, "compatible", &TempLen);
604 TempStr = (CHAR8 *)(PropertyPtr->Data);
605 if (AsciiStrnCmp (TempStr, "isa", AsciiStrLen ("isa")) == 0) {
606 DEBUG ((DEBUG_INFO, " find serial compatible isa \n"));
607 Serial->UseMmio = 0;
608 PropertyPtr = FdtGetProperty (Fdt, SubNode, "reg", &TempLen);
609 ASSERT (TempLen > 0);
610 if (TempLen > 0) {
611 Data32 = (UINT32 *)(PropertyPtr->Data);
612 Attribute = Fdt32ToCpu (*(Data32 + 0));
613 Serial->RegisterBase = Fdt32ToCpu (*(Data32 + 1));
614 Serial->UseMmio = Attribute == 1 ? FALSE : TRUE;
615 DEBUG ((DEBUG_INFO, "\n in espi serial Property() %a", TempStr));
616 DEBUG ((DEBUG_INFO, " StartAddress %016lX\n", Serial->RegisterBase));
617 DEBUG ((DEBUG_INFO, " Attribute %016lX\n", Attribute));
618 }
619 } else {
620 DEBUG ((DEBUG_INFO, " NOT serial compatible isa \n"));
621 PropertyPtr = FdtGetProperty (Fdt, SubNode, "reg", &TempLen);
622 ASSERT (TempLen > 0);
623 if (TempLen > 0) {
624 Data32 = (UINT32 *)(PropertyPtr->Data);
625 Serial->RegisterBase = Fdt32ToCpu (*Data32);
626 }
627 }
628}
629
640VOID
642 IN VOID *Fdt,
643 IN INT32 Node,
644 IN UINT8 RootBridgeCount,
645 IN CHAR8 *GmaStr,
646 IN UINT8 *index
647 )
648{
649 INT32 SubNode;
650 INT32 Property;
651 INT32 SSubNode;
652 FDT_NODE_HEADER *NodePtr;
653 CONST FDT_PROPERTY *PropertyPtr;
654 INT32 TempLen;
655 UINT32 *Data32;
656 UINT32 MemType;
657 CONST CHAR8 *TempStr;
658 UINT8 RbIndex;
659 UINTN HobDataSize;
660 UINT8 Base;
661
662 if (RootBridgeCount == 0) {
663 return;
664 }
665
666 RbIndex = *index;
667 HobDataSize = sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES) + (RootBridgeCount * sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE));
668 //
669 // Create PCI Root Bridge Info Hob.
670 //
671 if (mPciRootBridgeInfo == NULL) {
672 mPciRootBridgeInfo = BuildGuidHob (&gUniversalPayloadPciRootBridgeInfoGuid, HobDataSize);
673 ASSERT (mPciRootBridgeInfo != NULL);
674 if (mPciRootBridgeInfo == NULL) {
675 return;
676 }
677
678 ZeroMem (mPciRootBridgeInfo, HobDataSize);
679 mPciRootBridgeInfo->Header.Length = (UINT16)HobDataSize;
680 mPciRootBridgeInfo->Header.Revision = UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION;
681 mPciRootBridgeInfo->Count = RootBridgeCount;
682 mPciRootBridgeInfo->ResourceAssigned = FALSE;
683 }
684
685 if (mUplPciSegmentInfoHob == NULL) {
686 HobDataSize = sizeof (UPL_PCI_SEGMENT_INFO_HOB) + ((RootBridgeCount) * sizeof (UPL_SEGMENT_INFO));
687 mUplPciSegmentInfoHob = BuildGuidHob (&gUplPciSegmentInfoHobGuid, HobDataSize);
688 if (mUplPciSegmentInfoHob != NULL) {
689 ZeroMem (mUplPciSegmentInfoHob, HobDataSize);
690 mUplPciSegmentInfoHob->Header.Revision = UNIVERSAL_PAYLOAD_PCI_SEGMENT_INFO_REVISION;
691 mUplPciSegmentInfoHob->Header.Length = (UINT16)HobDataSize;
692 mUplPciSegmentInfoHob->Count = RootBridgeCount;
693 }
694 }
695
696 for (SubNode = FdtFirstSubnode (Fdt, Node); SubNode >= 0; SubNode = FdtNextSubnode (Fdt, SubNode)) {
697 NodePtr = (FDT_NODE_HEADER *)((CONST CHAR8 *)Fdt + SubNode + Fdt32ToCpu (((FDT_HEADER *)Fdt)->OffsetDtStruct));
698 DEBUG ((DEBUG_INFO, "\n SubNode(%08X) %a", SubNode, NodePtr->Name));
699
700 if (AsciiStrnCmp (NodePtr->Name, GmaStr, AsciiStrLen (GmaStr)) == 0) {
701 DEBUG ((DEBUG_INFO, " Found gma@ node \n"));
702 ParsegraphicNode (Fdt, SubNode);
703 }
704
705 if (AsciiStrnCmp (NodePtr->Name, "isa", AsciiStrLen ("isa")) == 0) {
706 SSubNode = FdtFirstSubnode (Fdt, SubNode); // serial
707 ParseSerialPort (Fdt, SSubNode);
708 }
709
710 if (AsciiStrnCmp (NodePtr->Name, "serial@", AsciiStrLen ("serial@")) == 0) {
711 ParseSerialPort (Fdt, SubNode);
712 }
713 }
714
715 for (Property = FdtFirstPropertyOffset (Fdt, Node); Property >= 0; Property = FdtNextPropertyOffset (Fdt, Property)) {
716 PropertyPtr = FdtGetPropertyByOffset (Fdt, Property, &TempLen);
717 TempStr = FdtGetString (Fdt, Fdt32ToCpu (PropertyPtr->NameOffset), NULL);
718
719 if (AsciiStrCmp (TempStr, "ranges") == 0) {
720 DEBUG ((DEBUG_INFO, " Found ranges Property TempLen (%08X), limit %x\n", TempLen, TempLen/sizeof (UINT32)));
721
723 mPciRootBridgeInfo->RootBridge[RbIndex].Supports = ROOT_BRIDGE_SUPPORTS_DEFAULT;
724 mPciRootBridgeInfo->RootBridge[RbIndex].PMemAbove4G.Base = PcdGet64 (PcdPciReservedPMemAbove4GBBase);
725 mPciRootBridgeInfo->RootBridge[RbIndex].PMemAbove4G.Limit = PcdGet64 (PcdPciReservedPMemAbove4GBLimit);
726 mPciRootBridgeInfo->RootBridge[RbIndex].PMem.Base = PcdGet32 (PcdPciReservedPMemBase);
727 mPciRootBridgeInfo->RootBridge[RbIndex].PMem.Limit = PcdGet32 (PcdPciReservedPMemLimit);
728 mPciRootBridgeInfo->RootBridge[RbIndex].UID = RbIndex;
729 mPciRootBridgeInfo->RootBridge[RbIndex].HID = EISA_PNP_ID (0x0A03);
730
731 Data32 = (UINT32 *)(PropertyPtr->Data);
732 for (Base = 0; Base < TempLen/sizeof (UINT32); Base = Base + DWORDS_TO_NEXT_ADDR_TYPE) {
733 DEBUG ((DEBUG_INFO, " Base :%x \n", Base));
734 MemType = Fdt32ToCpu (*(Data32 + Base));
735 if (((MemType) & (SS_64BIT_MEMORY_SPACE)) == SS_64BIT_MEMORY_SPACE) {
736 mPciRootBridgeInfo->RootBridge[RbIndex].MemAbove4G.Base = Fdt32ToCpu (*(Data32 + Base + 2)) + LShiftU64 (Fdt32ToCpu (*(Data32 + Base + 1)), 32);
737 mPciRootBridgeInfo->RootBridge[RbIndex].MemAbove4G.Limit = mPciRootBridgeInfo->RootBridge[RbIndex].MemAbove4G.Base + LShiftU64 (Fdt32ToCpu (*(Data32 + Base + 5)), 32) + Fdt32ToCpu (*(Data32 + Base + 6)) -1;
738 } else if (((MemType) & (SS_32BIT_MEMORY_SPACE)) == SS_32BIT_MEMORY_SPACE) {
739 mPciRootBridgeInfo->RootBridge[RbIndex].Mem.Base = Fdt32ToCpu (*(Data32 + Base + 2));
740 mPciRootBridgeInfo->RootBridge[RbIndex].Mem.Limit = mPciRootBridgeInfo->RootBridge[RbIndex].Mem.Base + Fdt32ToCpu (*(Data32 + Base + 6)) -1;
741 } else if (((MemType) & (SS_IO_SPACE)) == SS_IO_SPACE) {
742 mPciRootBridgeInfo->RootBridge[RbIndex].Io.Base = Fdt32ToCpu (*(Data32 + Base + 2));
743 mPciRootBridgeInfo->RootBridge[RbIndex].Io.Limit = mPciRootBridgeInfo->RootBridge[RbIndex].Io.Base + Fdt32ToCpu (*(Data32 + Base + 6)) -1;
744 }
745 }
746
747 DEBUG ((DEBUG_INFO, "RootBridgeCount %x, index :%x\n", RootBridgeCount, RbIndex));
748
749 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.Base %x, \n", mPciRootBridgeInfo->RootBridge[RbIndex].Mem.Base));
750 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.limit %x, \n", mPciRootBridgeInfo->RootBridge[RbIndex].Mem.Limit));
751
752 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.Base %llx, \n", mPciRootBridgeInfo->RootBridge[RbIndex].MemAbove4G.Base));
753 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.limit %llx, \n", mPciRootBridgeInfo->RootBridge[RbIndex].MemAbove4G.Limit));
754
755 DEBUG ((DEBUG_INFO, "PciRootBridge->Io.Base %llx, \n", mPciRootBridgeInfo->RootBridge[RbIndex].Io.Base));
756 DEBUG ((DEBUG_INFO, "PciRootBridge->Io.limit %llx, \n", mPciRootBridgeInfo->RootBridge[RbIndex].Io.Limit));
757 }
758
759 if (AsciiStrCmp (TempStr, "reg") == 0) {
760 UINT64 *Data64 = (UINT64 *)(PropertyPtr->Data);
761 mUplPciSegmentInfoHob->SegmentInfo[RbIndex].BaseAddress = Fdt64ToCpu (*Data64);
762 DEBUG ((DEBUG_INFO, "PciRootBridge->Ecam.Base %llx, \n", mUplPciSegmentInfoHob->SegmentInfo[RbIndex].BaseAddress));
763 }
764
765 if (AsciiStrCmp (TempStr, "bus-range") == 0) {
766 Data32 = (UINT32 *)(PropertyPtr->Data);
767 mPciRootBridgeInfo->RootBridge[RbIndex].Bus.Base = Fdt32ToCpu (*Data32) & 0xFF;
768 mPciRootBridgeInfo->RootBridge[RbIndex].Bus.Limit = Fdt32ToCpu (*(Data32 + 1)) & 0xFF;
769 mPciRootBridgeInfo->RootBridge[RbIndex].Bus.Translation = 0;
770
771 DEBUG ((DEBUG_INFO, "PciRootBridge->Bus.Base %x, index %x\n", mPciRootBridgeInfo->RootBridge[RbIndex].Bus.Base, RbIndex));
772 DEBUG ((DEBUG_INFO, "PciRootBridge->Bus.limit %x, index %x\n", mPciRootBridgeInfo->RootBridge[RbIndex].Bus.Limit, RbIndex));
773 }
774 }
775
776 if (RbIndex > 0) {
777 RbIndex--;
778 }
779
780 *index = RbIndex;
781}
782
790UINTN
791EFIAPI
793 IN VOID *FdtBase
794 )
795{
796 VOID *Fdt;
797 INT32 Node;
798 INT32 Property;
799 INT32 Depth;
800 FDT_NODE_HEADER *NodePtr;
801 CONST FDT_PROPERTY *PropertyPtr;
802 CONST CHAR8 *TempStr;
803 INT32 TempLen;
804 UINT64 *Data64;
805 UINT64 StartAddress;
806 UINT64 NumberOfBytes;
807 UINTN MinimalNeededSize;
808 EFI_PHYSICAL_ADDRESS FreeMemoryBottom;
809 EFI_PHYSICAL_ADDRESS FreeMemoryTop;
810 EFI_PHYSICAL_ADDRESS MemoryBottom;
811 EFI_PHYSICAL_ADDRESS MemoryTop;
812 BOOLEAN IsHobConstructed;
813 UINTN NewHobList;
814 UINT8 RootBridgeCount;
815 UINT8 index;
816 UINT8 PciEnumDone;
817 UINT8 NodeType;
818 EFI_BOOT_MODE BootMode;
819 CHAR8 *GmaStr;
820 INTN NumRsv;
822 UINT64 Size;
823 UINT16 SegmentNumber;
824 UINT64 CurrentPciBaseAddress;
825 UINT64 NextPciBaseAddress;
826 UINT8 *RbSegNumAlreadyAssigned;
827 UINT8 NumberOfRbSegNumAlreadyAssigned;
828
829 Fdt = FdtBase;
830 Depth = 0;
831 MinimalNeededSize = FixedPcdGet32 (PcdSystemMemoryUefiRegionSize);
832 IsHobConstructed = FALSE;
833 NewHobList = 0;
834 RootBridgeCount = 0;
835 index = 0;
836 // TODO: This value comes from FDT. Currently there is a bug in implementation
837 // which assumes node ordering. Which requires a fix.
838 PciEnumDone = 1;
839 BootMode = 0;
840 NodeType = 0;
841
842 DEBUG ((DEBUG_INFO, "FDT = 0x%x %x\n", Fdt, Fdt32ToCpu (*((UINT32 *)Fdt))));
843 DEBUG ((DEBUG_INFO, "Start parsing DTB data\n"));
844 DEBUG ((DEBUG_INFO, "MinimalNeededSize :%x\n", MinimalNeededSize));
845
846 for (Node = FdtNextNode (Fdt, 0, &Depth); Node >= 0; Node = FdtNextNode (Fdt, Node, &Depth)) {
847 NodePtr = (FDT_NODE_HEADER *)((CONST CHAR8 *)Fdt + Node + Fdt32ToCpu (((FDT_HEADER *)Fdt)->OffsetDtStruct));
848 DEBUG ((DEBUG_INFO, "\n Node(%08x) %a Depth %x", Node, NodePtr->Name, Depth));
849 // memory node
850 if (AsciiStrnCmp (NodePtr->Name, "memory@", AsciiStrLen ("memory@")) == 0) {
851 for (Property = FdtFirstPropertyOffset (Fdt, Node); Property >= 0; Property = FdtNextPropertyOffset (Fdt, Property)) {
852 PropertyPtr = FdtGetPropertyByOffset (Fdt, Property, &TempLen);
853 TempStr = FdtGetString (Fdt, Fdt32ToCpu (PropertyPtr->NameOffset), NULL);
854 if (AsciiStrCmp (TempStr, "reg") == 0) {
855 Data64 = (UINT64 *)(PropertyPtr->Data);
856 StartAddress = Fdt64ToCpu (*Data64);
857 NumberOfBytes = Fdt64ToCpu (*(Data64 + 1));
858 DEBUG ((DEBUG_INFO, "\n Property(%08X) %a", Property, TempStr));
859 DEBUG ((DEBUG_INFO, " %016lX %016lX", StartAddress, NumberOfBytes));
860 if (!IsHobConstructed) {
861 if ((NumberOfBytes > MinimalNeededSize) && (StartAddress < BASE_4GB)) {
862 MemoryBottom = StartAddress + NumberOfBytes - MinimalNeededSize;
863 FreeMemoryBottom = MemoryBottom;
864 FreeMemoryTop = StartAddress + NumberOfBytes;
865 MemoryTop = FreeMemoryTop;
866
867 DEBUG ((DEBUG_INFO, "MemoryBottom :0x%llx\n", MemoryBottom));
868 DEBUG ((DEBUG_INFO, "FreeMemoryBottom :0x%llx\n", FreeMemoryBottom));
869 DEBUG ((DEBUG_INFO, "FreeMemoryTop :0x%llx\n", FreeMemoryTop));
870 DEBUG ((DEBUG_INFO, "MemoryTop :0x%llx\n", MemoryTop));
871 mHobList = HobConstructor ((VOID *)(UINTN)MemoryBottom, (VOID *)(UINTN)MemoryTop, (VOID *)(UINTN)FreeMemoryBottom, (VOID *)(UINTN)FreeMemoryTop);
872 IsHobConstructed = TRUE;
873 NewHobList = (UINTN)mHobList;
874 break;
875 }
876 }
877 }
878 }
879 } // end of memory node
880 else {
881 PropertyPtr = FdtGetProperty (Fdt, Node, "compatible", &TempLen);
882 if (PropertyPtr == NULL) {
883 continue;
884 }
885
886 TempStr = (CHAR8 *)(PropertyPtr->Data);
887 if (AsciiStrnCmp (TempStr, "pci-rb", AsciiStrLen ("pci-rb")) == 0) {
888 RootBridgeCount++;
889 }
890 }
891 }
892
893 NumRsv = FdtGetNumberOfReserveMapEntries (Fdt);
894 /* Look for an existing entry and add it to the efi mem map. */
895 for (index = 0; index < NumRsv; index++) {
896 if (FdtGetReserveMapEntry (Fdt, index, &Addr, &Size) != 0) {
897 continue;
898 }
899
901 }
902
903 index = RootBridgeCount - 1;
904 Depth = 0;
905 for (Node = FdtNextNode (Fdt, 0, &Depth); Node >= 0; Node = FdtNextNode (Fdt, Node, &Depth)) {
906 NodePtr = (FDT_NODE_HEADER *)((CONST CHAR8 *)Fdt + Node + Fdt32ToCpu (((FDT_HEADER *)Fdt)->OffsetDtStruct));
907 DEBUG ((DEBUG_INFO, "\n Node(%08x) %a Depth %x", Node, NodePtr->Name, Depth));
908
909 NodeType = CheckNodeType (NodePtr->Name, Depth);
910 DEBUG ((DEBUG_INFO, "NodeType :0x%x\n", NodeType));
911 switch (NodeType) {
912 case ReservedMemory:
913 DEBUG ((DEBUG_INFO, "ParseReservedMemory\n"));
914 ParseReservedMemory (Fdt, Node);
915 break;
916 case Memory:
917 DEBUG ((DEBUG_INFO, "ParseMemory\n"));
918 if (!CheckMemoryNodeIfInit (Node)) {
919 ParseMemory (Fdt, Node);
920 } else {
921 DEBUG ((DEBUG_INFO, "Memory has initialized\n"));
922 }
923
924 break;
925 case FrameBuffer:
926 DEBUG ((DEBUG_INFO, "ParseFrameBuffer\n"));
927 GmaStr = ParseFrameBuffer (Fdt, Node);
928 break;
929 case PciRootBridge:
930 DEBUG ((DEBUG_INFO, "ParsePciRootBridge, index :%x \n", index));
931 ParsePciRootBridge (Fdt, Node, RootBridgeCount, GmaStr, &index);
932 DEBUG ((DEBUG_INFO, "After ParsePciRootBridge, index :%x\n", index));
933 break;
934 case Options:
935 // FIXME: Need to ensure this node gets parsed first so that it gets
936 // correct options to feed into other init like PciEnumDone etc.
937 DEBUG ((DEBUG_INFO, "ParseOptions\n"));
938 ParseOptions (Fdt, Node, &PciEnumDone, &BootMode);
939 break;
940 default:
941 DEBUG ((DEBUG_INFO, "ParseNothing\n"));
942 break;
943 }
944 }
945
946 // Post processing: TODO: Need to look into it. Such cross dependency on DT nodes
947 // may not be good idea. Instead have this prop part of RB
948 mPciRootBridgeInfo->ResourceAssigned = (BOOLEAN)PciEnumDone;
949
950 //
951 // Assign PCI Segment number after all root bridge info ready
952 //
953 SegmentNumber = 0;
954 RbSegNumAlreadyAssigned = AllocateZeroPool (sizeof (UINT8) * RootBridgeCount);
955 NextPciBaseAddress = 0;
956 NumberOfRbSegNumAlreadyAssigned = 0;
957
958 //
959 // Always assign first root bridge segment number as 0
960 //
961 CurrentPciBaseAddress = mUplPciSegmentInfoHob->SegmentInfo[0].BaseAddress & ~0xFFFFFFF;
962 NextPciBaseAddress = CurrentPciBaseAddress;
963 mUplPciSegmentInfoHob->SegmentInfo[0].SegmentNumber = SegmentNumber;
964 mPciRootBridgeInfo->RootBridge[0].Segment = SegmentNumber;
965 RbSegNumAlreadyAssigned[0] = 1;
966 NumberOfRbSegNumAlreadyAssigned++;
967
968 while (NumberOfRbSegNumAlreadyAssigned < RootBridgeCount) {
969 for (index = 1; index < RootBridgeCount; index++) {
970 if (RbSegNumAlreadyAssigned[index] == 1) {
971 continue;
972 }
973
974 if (CurrentPciBaseAddress == (mUplPciSegmentInfoHob->SegmentInfo[index].BaseAddress & ~0xFFFFFFF)) {
975 mUplPciSegmentInfoHob->SegmentInfo[index].SegmentNumber = SegmentNumber;
976 mPciRootBridgeInfo->RootBridge[index].Segment = SegmentNumber;
977 RbSegNumAlreadyAssigned[index] = 1;
978 NumberOfRbSegNumAlreadyAssigned++;
979 } else if (CurrentPciBaseAddress == NextPciBaseAddress) {
980 NextPciBaseAddress = mUplPciSegmentInfoHob->SegmentInfo[index].BaseAddress & ~0xFFFFFFF;
981 }
982 }
983
984 SegmentNumber++;
985 CurrentPciBaseAddress = NextPciBaseAddress;
986 }
987
988 ((EFI_HOB_HANDOFF_INFO_TABLE *)(mHobList))->BootMode = BootMode;
989 DEBUG ((DEBUG_INFO, "\n"));
990
991 return NewHobList;
992}
993
1000UINTN
1001EFIAPI
1003 IN VOID *FdtBase
1004 )
1005{
1006 return ParseDtb (FdtBase);
1007}
1008
1017UINTN
1018EFIAPI
1020 IN VOID *FdtBase
1021 )
1022{
1023 UINTN NHobAddress;
1024
1025 NHobAddress = 0;
1026 //
1027 // Check parameter type(
1028 //
1029 if (FdtCheckHeader (FdtBase) == 0) {
1030 DEBUG ((DEBUG_INFO, "%a() FDT blob\n", __func__));
1031 NHobAddress = FdtNodeParser ((VOID *)FdtBase);
1032 } else {
1033 DEBUG ((DEBUG_INFO, "%a() HOb list\n", __func__));
1034 mHobList = FdtBase;
1035
1036 return (UINTN)(mHobList);
1037 }
1038
1039 return NHobAddress;
1040}
UINT64 UINTN
INT64 INTN
VOID EFIAPI BuildCpuHob(IN UINT8 SizeOfMemorySpace, IN UINT8 SizeOfIoSpace)
Definition: HobLib.c:520
VOID EFIAPI BuildResourceDescriptorHob(IN EFI_RESOURCE_TYPE ResourceType, IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute, IN EFI_PHYSICAL_ADDRESS PhysicalStart, IN UINT64 NumberOfBytes)
Definition: HobLib.c:299
VOID *EFIAPI BuildGuidHob(IN CONST EFI_GUID *Guid, IN UINTN DataLength)
Definition: HobLib.c:336
VOID EFIAPI BuildMemoryAllocationHob(IN EFI_PHYSICAL_ADDRESS BaseAddress, IN UINT64 Length, IN EFI_MEMORY_TYPE MemoryType)
Definition: HobLib.c:601
UINTN EFIAPI AsciiStrLen(IN CONST CHAR8 *String)
Definition: String.c:641
INTN EFIAPI AsciiStrCmp(IN CONST CHAR8 *FirstString, IN CONST CHAR8 *SecondString)
Definition: String.c:716
INTN EFIAPI AsciiStrnCmp(IN CONST CHAR8 *FirstString, IN CONST CHAR8 *SecondString, IN UINTN Length)
Definition: String.c:872
UINT64 EFIAPI LShiftU64(IN UINT64 Operand, IN UINTN Count)
Definition: LShiftU64.c:28
VOID *EFIAPI SetMem(OUT VOID *Buffer, IN UINTN Length, IN UINT8 Value)
Definition: SetMemWrapper.c:38
VOID *EFIAPI ZeroMem(OUT VOID *Buffer, IN UINTN Length)
VOID *EFIAPI AllocateZeroPool(IN UINTN AllocationSize)
INT32 EFIAPI FdtNextPropertyOffset(IN CONST VOID *Fdt, IN INT32 Offset)
Definition: FdtLib.c:508
INT32 EFIAPI FdtFirstSubnode(IN CONST VOID *Fdt, IN INT32 Offset)
Definition: FdtLib.c:240
CONST FDT_PROPERTY *EFIAPI FdtGetProperty(IN CONST VOID *Fdt, IN INT32 NodeOffset, IN CONST CHAR8 *Name, IN INT32 *Length)
Definition: FdtLib.c:446
UINT64 EFIAPI Fdt64ToCpu(IN UINT64 Value)
Definition: FdtLib.c:91
CONST CHAR8 *EFIAPI FdtGetString(IN CONST VOID *Fdt, IN INT32 StrOffset, IN INT32 *Length OPTIONAL)
Definition: FdtLib.c:549
INT32 EFIAPI FdtNextNode(IN CONST VOID *Fdt, IN INT32 Offset, IN INT32 *Depth)
Definition: FdtLib.c:220
INT32 EFIAPI FdtCheckHeader(IN CONST VOID *Fdt)
Definition: FdtLib.c:125
INTN EFIAPI FdtGetNumberOfReserveMapEntries(IN CONST VOID *Fdt)
Definition: FdtLib.c:277
UINT32 EFIAPI Fdt32ToCpu(IN UINT32 Value)
Definition: FdtLib.c:57
INT32 EFIAPI FdtFirstPropertyOffset(IN CONST VOID *Fdt, IN INT32 NodeOffset)
Definition: FdtLib.c:489
INTN EFIAPI FdtGetReserveMapEntry(IN CONST VOID *Fdt, IN INTN Index, OUT UINT64 *Addr, OUT UINT64 *Size)
Definition: FdtLib.c:297
INT32 EFIAPI FdtNextSubnode(IN CONST VOID *Fdt, IN INT32 Offset)
Definition: FdtLib.c:259
CONST FDT_PROPERTY *EFIAPI FdtGetPropertyByOffset(IN CONST VOID *Fdt, IN INT32 Offset, IN INT32 *Length)
Definition: FdtLib.c:528
VOID RecordMemoryNode(INT32 Node)
Definition: FdtParserLib.c:98
CHAR8 * ParseFrameBuffer(IN VOID *Fdt, IN INT32 Node)
Definition: FdtParserLib.c:322
VOID ParseMemory(IN VOID *Fdt, IN INT32 Node)
Definition: FdtParserLib.c:168
UINTN EFIAPI FdtNodeParser(IN VOID *FdtBase)
EFI_HOB_HANDOFF_INFO_TABLE *EFIAPI HobConstructor(IN VOID *EfiMemoryBottom, IN VOID *EfiMemoryTop, IN VOID *EfiFreeMemoryBottom, IN VOID *EfiFreeMemoryTop)
Definition: Hob.c:54
VOID ParsePciRootBridge(IN VOID *Fdt, IN INT32 Node, IN UINT8 RootBridgeCount, IN CHAR8 *GmaStr, IN UINT8 *index)
Definition: FdtParserLib.c:641
FDT_NODE_TYPE CheckNodeType(CHAR8 *NodeString, INT32 Depth)
Definition: FdtParserLib.c:140
BOOLEAN CheckMemoryNodeIfInit(INT32 Node)
Definition: FdtParserLib.c:116
UINTN EFIAPI UplInitHob(IN VOID *FdtBase)
VOID ParsegraphicNode(IN VOID *Fdt, IN INT32 SubNode)
Definition: FdtParserLib.c:488
VOID ParseReservedMemory(IN VOID *Fdt, IN INT32 Node)
Definition: FdtParserLib.c:226
VOID ParseOptions(IN VOID *Fdt, IN INT32 Node, OUT UINT8 *PciEnumDone, OUT EFI_BOOT_MODE *BootMode)
Definition: FdtParserLib.c:392
VOID ParseSerialPort(IN VOID *Fdt, IN INT32 SubNode)
Definition: FdtParserLib.c:569
UINTN EFIAPI ParseDtb(IN VOID *FdtBase)
Definition: FdtParserLib.c:792
#define NULL
Definition: Base.h:319
#define CONST
Definition: Base.h:259
#define TRUE
Definition: Base.h:301
#define FALSE
Definition: Base.h:307
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
#define DEBUG(Expression)
Definition: DebugLib.h:434
@ PixelRedGreenBlueReserved8BitPerColor
@ PixelBlueGreenRedReserved8BitPerColor
@ PixelFormatMax
#define PcdGet64(TokenName)
Definition: PcdLib.h:375
#define FixedPcdGet32(TokenName)
Definition: PcdLib.h:92
#define PcdGet8(TokenName)
Definition: PcdLib.h:336
#define PcdGet32(TokenName)
Definition: PcdLib.h:362
#define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
#define EFI_PCI_HOST_BRIDGE_MEM64_DECODE
EFI_GUID gUplPciSegmentInfoHobGuid
UINT32 EFI_BOOT_MODE
Definition: PiBootMode.h:18
UINT64 EFI_PHYSICAL_ADDRESS
Definition: UefiBaseType.h:50
@ EfiBootServicesData
@ EfiReservedMemoryType
@ EfiBootServicesCode
@ EfiACPIMemoryNVS
@ EfiMemoryMappedIO
@ EfiRuntimeServicesCode
@ EfiRuntimeServicesData
EFI_GRAPHICS_PIXEL_FORMAT PixelFormat
UINT16 SubsystemId
Ignore if the value is 0xFFFF.
UINT16 VendorId
Ignore if the value is 0xFFFF.
UINT16 SubsystemVendorId
Ignore if the value is 0xFFFF.
UINT8 RevisionId
Ignore if the value is 0xFF.
UINT16 DeviceId
Ignore if the value is 0xFFFF.
UINT32 Segment
Segment number.
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Bus
Bus aperture which can be used by the root bridge.
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Mem
MMIO aperture below 4GB which can be used by the root bridge.
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMemAbove4G
Prefetchable MMIO aperture above 4GB which can be used by the root bridge.
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE MemAbove4G
MMIO aperture above 4GB which can be used by the root bridge.
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMem
Prefetchable MMIO aperture below 4GB which can be used by the root bridge.
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Io
IO aperture which can be used by the root bridge.
UINT16 SegmentNumber
Segment number.
UINT64 BaseAddress
ECAM Base address.