TianoCore EDK2 master
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MadtParser.c
Go to the documentation of this file.
1
17#include <Library/UefiLib.h>
18#include "AcpiParser.h"
19#include "AcpiTableParser.h"
20#include "AcpiViewConfig.h"
21#include "MadtParser.h"
22
23// Local Variables
24STATIC CONST UINT8 *MadtInterruptControllerType;
25STATIC CONST UINT8 *MadtInterruptControllerLength;
27
37VOID
38EFIAPI
40 IN UINT8 *Ptr,
41 IN UINT32 Length,
42 IN VOID *Context
43 )
44{
45 if (*(UINT32 *)Ptr != 0) {
47 Print (
48 L"\nERROR: System Vector Base must be zero."
49 );
50 }
51}
52
62VOID
63EFIAPI
65 IN UINT8 *Ptr,
66 IN UINT32 Length,
67 IN VOID *Context
68 )
69{
70 UINT16 SpeOverflowInterrupt;
71
72 SpeOverflowInterrupt = *(UINT16 *)Ptr;
73
74 // SPE not supported by this processor
75 if (SpeOverflowInterrupt == 0) {
76 return;
77 }
78
79 if ((SpeOverflowInterrupt < ARM_PPI_ID_MIN) ||
80 ((SpeOverflowInterrupt > ARM_PPI_ID_MAX) &&
81 (SpeOverflowInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
82 (SpeOverflowInterrupt > ARM_PPI_ID_EXTENDED_MAX))
83 {
85 Print (
86 L"\nERROR: SPE Overflow Interrupt ID of %d is not in the allowed PPI ID "
87 L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
88 SpeOverflowInterrupt,
89 ARM_PPI_ID_MIN,
91 ARM_PPI_ID_EXTENDED_MIN,
92 ARM_PPI_ID_EXTENDED_MAX
93 );
94 } else if (SpeOverflowInterrupt != ARM_PPI_ID_PMBIRQ) {
96 Print (
97 L"\nWARNING: SPE Overflow Interrupt ID of %d is not compliant with SBSA "
98 L"Level 3 PPI ID assignment: %d.",
99 SpeOverflowInterrupt,
100 ARM_PPI_ID_PMBIRQ
101 );
102 }
103}
104
113STATIC
114VOID
115EFIAPI
117 IN UINT8 *Ptr,
118 IN UINT32 Length,
119 IN VOID *Context
120 )
121{
122 UINT16 TrbeInterrupt;
123
124 TrbeInterrupt = *(UINT16 *)Ptr;
125
126 // SPE not supported by this processor
127 if (TrbeInterrupt == 0) {
128 return;
129 }
130
131 if ((TrbeInterrupt < ARM_PPI_ID_MIN) ||
132 ((TrbeInterrupt > ARM_PPI_ID_MAX) &&
133 (TrbeInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
134 (TrbeInterrupt > ARM_PPI_ID_EXTENDED_MAX))
135 {
137 Print (
138 L"\nERROR: TRBE Interrupt ID of %d is not in the allowed PPI ID "
139 L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
140 TrbeInterrupt,
141 ARM_PPI_ID_MIN,
143 ARM_PPI_ID_EXTENDED_MIN,
144 ARM_PPI_ID_EXTENDED_MAX
145 );
146 }
147}
148
159STATIC
160VOID
161EFIAPI
163 IN CONST CHAR16 *Format,
164 IN UINT8 *Ptr,
165 IN UINT32 Length OPTIONAL
166 )
167{
168 UINT32 Value;
169 UINTN Len;
170 CONST CHAR16 *Format_Alt;
171
172 Len = StrLen (Format);
173 Format_Alt = Format + Len + 1;
174 Value = *(UINT32 *)Ptr;
175
176 Print (L"%s", Value ? Format : Format_Alt);
177}
178
179STATIC CONST ACPI_PARSER GICCFlagParser[] = {
180 { L"Enabled", 1, 0, L"%d", NULL, NULL, NULL, NULL },
181 { L"Performance Inter. Mode", 1, 1, L"Level Triggered\0Edge Triggered", DumpValue, NULL, NULL, NULL },
182 { L"VGIC Maintenance Inter. Mode", 1, 2, L"Level Triggered\0Edge Triggered", DumpValue, NULL, NULL, NULL },
183 { L"Online Capable", 1, 3, L"%d", NULL, NULL, NULL, NULL },
184 { L"Reserved", 28, 4, L"%d", NULL, NULL, NULL, NULL }
185};
186
195STATIC
196VOID
197EFIAPI
199 IN CONST CHAR16 *Format OPTIONAL,
200 IN UINT8 *Ptr,
201 IN UINT32 Length OPTIONAL
202 )
203{
204 Print (L"0x%X\n", *(UINT32 *)Ptr);
206 TRUE,
207 2,
208 NULL,
209 Ptr,
210 4,
211 PARSER_PARAMS (GICCFlagParser)
212 );
213}
214
219 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
220 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
221 { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
222
223 { L"CPU Interface Number", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
224 { L"ACPI Processor UID", 4, 8, L"0x%x", NULL, NULL, NULL, NULL },
225 { L"Flags", 4, 12, NULL, DumpGicCFlags, NULL, NULL, NULL },
226 { L"Parking Protocol Version", 4, 16, L"0x%x", NULL, NULL, NULL, NULL },
227
228 { L"Performance Interrupt GSIV", 4, 20, L"0x%x", NULL, NULL, NULL, NULL },
229 { L"Parked Address", 8, 24, L"0x%lx", NULL, NULL, NULL, NULL },
230 { L"Physical Base Address", 8, 32, L"0x%lx", NULL, NULL, NULL, NULL },
231 { L"GICV", 8, 40, L"0x%lx", NULL, NULL, NULL, NULL },
232 { L"GICH", 8, 48, L"0x%lx", NULL, NULL, NULL, NULL },
233 { L"VGIC Maintenance interrupt", 4, 56, L"0x%x", NULL, NULL, NULL, NULL },
234 { L"GICR Base Address", 8, 60, L"0x%lx", NULL, NULL, NULL, NULL },
235 { L"MPIDR", 8, 68, L"0x%lx", NULL, NULL, NULL, NULL },
236 { L"Processor Power Efficiency Class", 1, 76, L"0x%x", NULL, NULL, NULL, NULL },
237 { L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL, NULL },
238 { L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL,
240 { L"TRBE Interrupt", 2, 80, L"0x%x", NULL, NULL,
242};
243
248 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
249 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
250 { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
251
252 { L"GIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
253 { L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
254 { L"System Vector Base", 4, 16, L"0x%x", NULL, NULL,
256 { L"GIC Version", 1, 20, L"%d", NULL, NULL, NULL, NULL },
257 { L"Reserved", 3, 21, L"%x %x %x", Dump3Chars, NULL, NULL, NULL }
258};
259
264 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
265 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
266 { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
267
268 { L"MSI Frame ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
269 { L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
270 { L"Flags", 4, 16, L"0x%x", NULL, NULL, NULL, NULL },
271
272 { L"SPI Count", 2, 20, L"%d", NULL, NULL, NULL, NULL },
273 { L"SPI Base", 2, 22, L"0x%x", NULL, NULL, NULL, NULL }
274};
275
280 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
281 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
282 { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
283
284 { L"Discovery Range Base Address", 8, 4, L"0x%lx", NULL, NULL, NULL,
285 NULL },
286 { L"Discovery Range Length", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }
287};
288
293 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
294 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
295 { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
296
297 { L"GIC ITS ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
298 { L"Physical Base Address", 8, 8, L"0x%lx", NULL, NULL, NULL, NULL },
299 { L"Reserved", 4, 16, L"0x%x", NULL, NULL, NULL, NULL }
300};
301
306 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
307 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
308 { L"I/O APIC ID", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
309 { L"Reserved", 1, 3, L"0x%x", NULL, NULL, NULL, NULL },
310 { L"I/O APIC Address", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
311 { L"Global System Interrupt Base", 4, 8, L"0x%x", NULL, NULL, NULL, NULL }
312};
313
318 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
319 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
320 { L"Bus", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
321 { L"Source", 1, 3, L"0x%x", NULL, NULL, NULL, NULL },
322 { L"Global System Interrupt", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
323 { L"Flags", 2, 8, L"0x%x", NULL, NULL, NULL, NULL }
324};
325
326STATIC CONST ACPI_PARSER LocalApicFlags[] = {
327 { L"Enabled", 1, 0, L"%d", NULL, NULL, NULL, NULL },
328 { L"Online Capable", 1, 1, L"%d", NULL, NULL, NULL, NULL },
329 { L"Reserved", 30, 2, L"%d", NULL, NULL, NULL, NULL }
330};
331
340VOID
341EFIAPI
343 IN CONST CHAR16 *Format OPTIONAL,
344 IN UINT8 *Ptr,
345 IN UINT32 Length
346 )
347{
348 if (Format != NULL) {
349 Print (Format, *(UINT32 *)Ptr);
350 return;
351 }
352
353 Print (L"0x%X\n", *(UINT32 *)Ptr);
355 TRUE,
356 2,
357 NULL,
358 Ptr,
359 4,
360 PARSER_PARAMS (LocalApicFlags)
361 );
362}
363
368 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
369 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
370
371 { L"ACPI Processor UID", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
372 { L"APIC ID", 1, 3, L"0x%x", NULL, NULL, NULL, NULL },
373 { L"Flags", 4, 4, NULL, DumpLocalApicBitFlags, NULL, NULL, NULL }
374};
375
380 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
381 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
382 { L"Reserved", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
383
384 { L"X2APIC ID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
385 { L"Flags", 4, 8, NULL, DumpLocalApicBitFlags, NULL, NULL, NULL },
386 { L"ACPI Processor UID", 4, 12, L"0x%x", NULL, NULL, NULL, NULL }
387};
388
393 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
394 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
395 { L"Flags", 2, 2, L"0x%x", NULL, NULL, NULL, NULL },
396
397 { L"ACPI Processor UID", 4, 4, L"0x%x", NULL, NULL, NULL, NULL },
398 { L"Local x2APIC LINT#", 1, 8, L"0x%x", NULL, NULL, NULL, NULL },
399 { L"Reserved", 3, 9, L"0x%x%x%x", Dump3Chars, NULL, NULL, NULL }
400};
401
406 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
407 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
408 { L"Version", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
409 { L"ACPI Processor ID", 4, 3, L"0x%x", NULL, NULL, NULL, NULL },
410 { L"Physical Processor ID", 4, 7, L"0x%x", NULL, NULL, NULL, NULL },
411 { L"Flags", 4, 11, L"0x%x", NULL, NULL, NULL, NULL }
412};
413
418 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
419 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
420 { L"Version", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
421 { L"Base Address", 8, 3, L"0x%lx", NULL, NULL, NULL, NULL },
422 { L"Size", 2, 11, L"0x%x", NULL, NULL, NULL, NULL },
423 { L"Cascade Vector", 2, 13, L"0x%x", NULL, NULL, NULL, NULL },
424 { L"Cascade vector mapping", 8, 15, L"0x%lx", NULL, NULL, NULL, NULL }
425};
426
431 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
432 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
433 { L"Version", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
434 { L"Base Address", 8, 3, L"0x%lx", NULL, NULL, NULL, NULL },
435 { L"Size", 2, 11, L"0x%x", NULL, NULL, NULL, NULL },
436 { L"Cascade Vector", 8, 13, L"0x%lx", NULL, NULL, NULL, NULL }
437};
438
443 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
444 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
445 { L"Version", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
446 { L"Cascade Vector", 1, 3, L"0x%x", NULL, NULL, NULL, NULL },
447 { L"Node", 1, 4, L"0x%x", NULL, NULL, NULL, NULL },
448 { L"Node Map", 8, 5, L"0x%lx", NULL, NULL, NULL, NULL }
449};
450
455 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
456 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
457 { L"Version", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
458 { L"Message Address", 8, 3, L"0x%lx", NULL, NULL, NULL, NULL },
459 { L"Start", 4, 11, L"0x%x", NULL, NULL, NULL, NULL },
460 { L"Count", 4, 15, L"0x%x", NULL, NULL, NULL, NULL }
461};
462
467 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
468 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
469 { L"Version", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
470 { L"Base Address", 8, 3, L"0x%lx", NULL, NULL, NULL, NULL },
471 { L"Size", 2, 11, L"0x%x", NULL, NULL, NULL, NULL },
472 { L"Hardware ID", 2, 13, L"0x%x", NULL, NULL, NULL, NULL },
473 { L"GSI base", 2, 15, L"0x%x", NULL, NULL, NULL, NULL }
474};
475
480 { L"Type", 1, 0, L"0x%x", NULL, NULL, NULL, NULL },
481 { L"Length", 1, 1, L"%d", NULL, NULL, NULL, NULL },
482 { L"Version", 1, 2, L"0x%x", NULL, NULL, NULL, NULL },
483 { L"Base Address", 8, 3, L"0x%lx", NULL, NULL, NULL, NULL },
484 { L"Size", 2, 11, L"0x%x", NULL, NULL, NULL, NULL },
485 { L"Cascade vector", 2, 13, L"0x%x", NULL, NULL, NULL, NULL }
486};
487
492 PARSE_ACPI_HEADER (&AcpiHdrInfo),
493 { L"Local Interrupt Controller Address",4, 36, L"0x%x", NULL, NULL, NULL,
494 NULL },
495 { L"Flags", 4, 40, L"0x%x", NULL, NULL, NULL,NULL}
496};
497
502 { NULL, 1, 0, NULL, NULL, (VOID **)&MadtInterruptControllerType, NULL, NULL },
503 { L"Length", 1, 1, NULL, NULL, (VOID **)&MadtInterruptControllerLength, NULL,
504 NULL },
505 { L"Reserved", 2, 2, NULL, NULL, NULL, NULL, NULL }
506};
507
528VOID
529EFIAPI
531 IN BOOLEAN Trace,
532 IN UINT8 *Ptr,
533 IN UINT32 AcpiTableLength,
534 IN UINT8 AcpiTableRevision
535 )
536{
537 UINT32 Offset;
538 UINT8 *InterruptContollerPtr;
539 UINT32 GICDCount;
540
541 GICDCount = 0;
542
543 if (!Trace) {
544 return;
545 }
546
547 Offset = ParseAcpi (
548 TRUE,
549 0,
550 "MADT",
551 Ptr,
552 AcpiTableLength,
554 );
555 InterruptContollerPtr = Ptr + Offset;
556
557 while (Offset < AcpiTableLength) {
558 // Parse Interrupt Controller Structure to obtain Length.
559 ParseAcpi (
560 FALSE,
561 0,
562 NULL,
563 InterruptContollerPtr,
564 AcpiTableLength - Offset,
566 );
567
568 // Check if the values used to control the parsing logic have been
569 // successfully read.
570 if ((MadtInterruptControllerType == NULL) ||
571 (MadtInterruptControllerLength == NULL))
572 {
574 Print (
575 L"ERROR: Insufficient remaining table buffer length to read the " \
576 L"Interrupt Controller Structure header. Length = %d.\n",
577 AcpiTableLength - Offset
578 );
579 return;
580 }
581
582 // Validate Interrupt Controller Structure length
583 if ((*MadtInterruptControllerLength == 0) ||
584 ((Offset + (*MadtInterruptControllerLength)) > AcpiTableLength))
585 {
587 Print (
588 L"ERROR: Invalid Interrupt Controller Structure length. " \
589 L"Length = %d. Offset = %d. AcpiTableLength = %d.\n",
590 *MadtInterruptControllerLength,
591 Offset,
592 AcpiTableLength
593 );
594 return;
595 }
596
597 switch (*MadtInterruptControllerType) {
598 case EFI_ACPI_6_3_GIC:
599 {
600 ParseAcpi (
601 TRUE,
602 2,
603 "GICC",
604 InterruptContollerPtr,
605 *MadtInterruptControllerLength,
607 );
608 break;
609 }
610
611 case EFI_ACPI_6_3_GICD:
612 {
613 if (++GICDCount > 1) {
615 Print (
616 L"ERROR: Only one GICD must be present,"
617 L" GICDCount = %d\n",
618 GICDCount
619 );
620 }
621
622 ParseAcpi (
623 TRUE,
624 2,
625 "GICD",
626 InterruptContollerPtr,
627 *MadtInterruptControllerLength,
629 );
630 break;
631 }
632
633 case EFI_ACPI_6_3_GIC_MSI_FRAME:
634 {
635 ParseAcpi (
636 TRUE,
637 2,
638 "GIC MSI Frame",
639 InterruptContollerPtr,
640 *MadtInterruptControllerLength,
642 );
643 break;
644 }
645
646 case EFI_ACPI_6_3_GICR:
647 {
648 ParseAcpi (
649 TRUE,
650 2,
651 "GICR",
652 InterruptContollerPtr,
653 *MadtInterruptControllerLength,
655 );
656 break;
657 }
658
659 case EFI_ACPI_6_3_GIC_ITS:
660 {
661 ParseAcpi (
662 TRUE,
663 2,
664 "GIC ITS",
665 InterruptContollerPtr,
666 *MadtInterruptControllerLength,
668 );
669 break;
670 }
671
672 case EFI_ACPI_6_3_IO_APIC:
673 {
674 ParseAcpi (
675 TRUE,
676 2,
677 "IO APIC",
678 InterruptContollerPtr,
679 *MadtInterruptControllerLength,
681 );
682 break;
683 }
684
685 case EFI_ACPI_6_3_INTERRUPT_SOURCE_OVERRIDE:
686 {
687 ParseAcpi (
688 TRUE,
689 2,
690 "INTERRUPT SOURCE OVERRIDE",
691 InterruptContollerPtr,
692 *MadtInterruptControllerLength,
694 );
695 break;
696 }
697 case EFI_ACPI_6_3_PROCESSOR_LOCAL_APIC:
698 {
699 ParseAcpi (
700 TRUE,
701 2,
702 "PROCESSOR LOCAL APIC",
703 InterruptContollerPtr,
704 *MadtInterruptControllerLength,
706 );
707 break;
708 }
709 case EFI_ACPI_6_3_PROCESSOR_LOCAL_X2APIC:
710 {
711 ParseAcpi (
712 TRUE,
713 2,
714 "PROCESSOR LOCAL X2APIC",
715 InterruptContollerPtr,
716 *MadtInterruptControllerLength,
718 );
719 break;
720 }
721
722 case EFI_ACPI_6_3_LOCAL_X2APIC_NMI:
723 {
724 ParseAcpi (
725 TRUE,
726 2,
727 "LOCAL x2APIC NMI",
728 InterruptContollerPtr,
729 *MadtInterruptControllerLength,
731 );
732 break;
733 }
734
735 case EFI_ACPI_6_5_CORE_PIC:
736 {
737 ParseAcpi (
738 TRUE,
739 2,
740 "CORE PIC",
741 InterruptContollerPtr,
742 *MadtInterruptControllerLength,
744 );
745 break;
746 }
747
748 case EFI_ACPI_6_5_LIO_PIC:
749 {
750 ParseAcpi (
751 TRUE,
752 2,
753 "LIO PIC",
754 InterruptContollerPtr,
755 *MadtInterruptControllerLength,
757 );
758 break;
759 }
760
761 case EFI_ACPI_6_5_HT_PIC:
762 {
763 ParseAcpi (
764 TRUE,
765 2,
766 "HT PIC",
767 InterruptContollerPtr,
768 *MadtInterruptControllerLength,
770 );
771 break;
772 }
773
774 case EFI_ACPI_6_5_EIO_PIC:
775 {
776 ParseAcpi (
777 TRUE,
778 2,
779 "EIO PIC",
780 InterruptContollerPtr,
781 *MadtInterruptControllerLength,
783 );
784 break;
785 }
786
787 case EFI_ACPI_6_5_MSI_PIC:
788 {
789 ParseAcpi (
790 TRUE,
791 2,
792 "MSI PIC",
793 InterruptContollerPtr,
794 *MadtInterruptControllerLength,
796 );
797 break;
798 }
799
800 case EFI_ACPI_6_5_BIO_PIC:
801 {
802 ParseAcpi (
803 TRUE,
804 2,
805 "BIO PIC",
806 InterruptContollerPtr,
807 *MadtInterruptControllerLength,
809 );
810 break;
811 }
812
813 case EFI_ACPI_6_5_LPC_PIC:
814 {
815 ParseAcpi (
816 TRUE,
817 2,
818 "LPC PIC",
819 InterruptContollerPtr,
820 *MadtInterruptControllerLength,
822 );
823 break;
824 }
825
826 default:
827 {
829 Print (
830 L"ERROR: Unknown Interrupt Controller Structure,"
831 L" Type = %d, Length = %d\n",
832 *MadtInterruptControllerType,
833 *MadtInterruptControllerLength
834 );
835 }
836 } // switch
837
838 InterruptContollerPtr += *MadtInterruptControllerLength;
839 Offset += *MadtInterruptControllerLength;
840 } // while
841}
UINT64 UINTN
VOID EFIAPI IncrementWarningCount(VOID)
Definition: AcpiParser.c:95
VOID EFIAPI Dump3Chars(IN CONST CHAR16 *Format OPTIONAL, IN UINT8 *Ptr, IN UINT32 Length)
Definition: AcpiParser.c:326
VOID EFIAPI IncrementErrorCount(VOID)
Definition: AcpiParser.c:83
UINT32 EFIAPI ParseAcpi(IN BOOLEAN Trace, IN UINT32 Indent, IN CONST CHAR8 *AsciiName OPTIONAL, IN UINT8 *Ptr, IN UINT32 Length, IN CONST ACPI_PARSER *Parser, IN UINT32 ParserItems)
Definition: AcpiParser.c:683
UINT32 EFIAPI ParseAcpiBitFields(IN BOOLEAN Trace, IN UINT32 Indent, IN CONST CHAR8 *AsciiName OPTIONAL, IN UINT8 *Ptr, IN UINT32 Length, IN CONST ACPI_PARSER *Parser, IN UINT32 ParserItems)
Definition: AcpiParser.c:968
#define PARSER_PARAMS(Parser)
Definition: AcpiParser.h:494
#define PARSE_ACPI_HEADER(Info)
Definition: AcpiParser.h:501
UINTN EFIAPI StrLen(IN CONST CHAR16 *String)
Definition: String.c:30
STATIC CONST ACPI_PARSER GicRParser[]
Definition: MadtParser.c:279
STATIC CONST ACPI_PARSER GicCParser[]
Definition: MadtParser.c:218
STATIC VOID EFIAPI ValidateSpeOverflowInterrupt(IN UINT8 *Ptr, IN UINT32 Length, IN VOID *Context)
Definition: MadtParser.c:64
STATIC CONST ACPI_PARSER CorePic[]
Definition: MadtParser.c:405
VOID EFIAPI ParseAcpiMadt(IN BOOLEAN Trace, IN UINT8 *Ptr, IN UINT32 AcpiTableLength, IN UINT8 AcpiTableRevision)
Definition: MadtParser.c:530
STATIC CONST ACPI_PARSER MadtParser[]
Definition: MadtParser.c:491
STATIC CONST ACPI_PARSER InterruptSourceOverride[]
Definition: MadtParser.c:317
STATIC CONST ACPI_PARSER GicDParser[]
Definition: MadtParser.c:247
STATIC CONST ACPI_PARSER LocalX2ApicNmi[]
Definition: MadtParser.c:392
STATIC CONST ACPI_PARSER MadtInterruptControllerHeaderParser[]
Definition: MadtParser.c:501
STATIC CONST ACPI_PARSER LegacyIoPic[]
Definition: MadtParser.c:417
STATIC CONST ACPI_PARSER BridgeIoPic[]
Definition: MadtParser.c:466
STATIC VOID EFIAPI DumpGicCFlags(IN CONST CHAR16 *Format OPTIONAL, IN UINT8 *Ptr, IN UINT32 Length OPTIONAL)
Definition: MadtParser.c:198
STATIC CONST ACPI_PARSER IoApic[]
Definition: MadtParser.c:305
STATIC CONST ACPI_PARSER ProcessorLocalApic[]
Definition: MadtParser.c:367
STATIC CONST ACPI_PARSER MsiPic[]
Definition: MadtParser.c:454
STATIC VOID EFIAPI ValidateGICDSystemVectorBase(IN UINT8 *Ptr, IN UINT32 Length, IN VOID *Context)
Definition: MadtParser.c:39
STATIC CONST ACPI_PARSER ProcessorLocalX2Apic[]
Definition: MadtParser.c:379
STATIC CONST ACPI_PARSER LpcPic[]
Definition: MadtParser.c:479
STATIC CONST ACPI_PARSER GicMSIFrameParser[]
Definition: MadtParser.c:263
STATIC VOID EFIAPI DumpValue(IN CONST CHAR16 *Format, IN UINT8 *Ptr, IN UINT32 Length OPTIONAL)
Definition: MadtParser.c:162
STATIC CONST ACPI_PARSER GicITSParser[]
Definition: MadtParser.c:292
STATIC CONST ACPI_PARSER ExtendIoPic[]
Definition: MadtParser.c:442
STATIC CONST ACPI_PARSER HyperTransportPic[]
Definition: MadtParser.c:430
VOID EFIAPI DumpLocalApicBitFlags(IN CONST CHAR16 *Format OPTIONAL, IN UINT8 *Ptr, IN UINT32 Length)
Definition: MadtParser.c:342
STATIC VOID EFIAPI ValidateTrbeInterrupt(IN UINT8 *Ptr, IN UINT32 Length, IN VOID *Context)
Definition: MadtParser.c:116
#define ARM_PPI_ID_MAX
Definition: MadtParser.h:35
#define NULL
Definition: Base.h:319
#define CONST
Definition: Base.h:259
#define STATIC
Definition: Base.h:264
#define TRUE
Definition: Base.h:301
#define FALSE
Definition: Base.h:307
#define IN
Definition: Base.h:279
UINTN EFIAPI Print(IN CONST CHAR16 *Format,...)
Definition: UefiLibPrint.c:113