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PchSpi.c File Reference
#include "SpiCommon.h"

Go to the source code of this file.

Functions

UINT32 AcquireSpiBar0 (IN UINTN PchSpiBase)
 
VOID ReleaseSpiBar0 (IN UINTN PchSpiBase)
 
VOID CpuSmmDisableBiosWriteProtect (IN BOOLEAN EnableSmmSts)
 
EFI_STATUS EFIAPI DisableBiosWriteProtect (IN UINTN PchSpiBase, IN UINT8 CpuSmmBwp)
 
VOID EFIAPI EnableBiosWriteProtect (IN UINTN PchSpiBase, IN UINT8 CpuSmmBwp)
 
UINT8 SaveAndDisableSpiPrefetchCache (IN UINTN PchSpiBase)
 
VOID SetSpiBiosControlRegister (IN UINTN PchSpiBase, IN UINT8 BiosCtlValue)
 

Detailed Description

Copyright (c) 2017-2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file PchSpi.c.

Function Documentation

◆ AcquireSpiBar0()

UINT32 AcquireSpiBar0 ( IN UINTN  PchSpiBase)

Acquire SPI MMIO BAR.

Parameters
[in]PchSpiBasePCH SPI PCI Base Address
Return values
ReturnSPI BAR Address

Definition at line 18 of file PchSpi.c.

◆ CpuSmmDisableBiosWriteProtect()

VOID CpuSmmDisableBiosWriteProtect ( IN BOOLEAN  EnableSmmSts)

This function is to enable/disable BIOS Write Protect in SMM phase.

Parameters
[in]EnableSmmStsFlag to Enable/disable Bios write protect

Definition at line 45 of file PchSpi.c.

◆ DisableBiosWriteProtect()

EFI_STATUS EFIAPI DisableBiosWriteProtect ( IN UINTN  PchSpiBase,
IN UINT8  CpuSmmBwp 
)

This function is a hook for Spi to disable BIOS Write Protect.

Parameters
[in]PchSpiBasePCH SPI PCI Base Address
[in]CpuSmmBwpNeed to disable CPU SMM Bios write protection or not
Return values
EFI_SUCCESSThe protocol instance was properly initialized
EFI_ACCESS_DENIEDThe BIOS Region can only be updated in SMM phase

Definition at line 83 of file PchSpi.c.

◆ EnableBiosWriteProtect()

VOID EFIAPI EnableBiosWriteProtect ( IN UINTN  PchSpiBase,
IN UINT8  CpuSmmBwp 
)

This function is a hook for Spi to enable BIOS Write Protect.

Parameters
[in]PchSpiBasePCH SPI PCI Base Address
[in]CpuSmmBwpNeed to disable CPU SMM Bios write protection or not

Definition at line 114 of file PchSpi.c.

◆ ReleaseSpiBar0()

VOID ReleaseSpiBar0 ( IN UINTN  PchSpiBase)

Release SPI MMIO BAR. Do nothing.

Parameters
[in]PchSpiBasePCH SPI PCI Base Address

Definition at line 32 of file PchSpi.c.

◆ SaveAndDisableSpiPrefetchCache()

UINT8 SaveAndDisableSpiPrefetchCache ( IN UINTN  PchSpiBase)

This function disables SPI Prefetching and caching, and returns previous BIOS Control Register value before disabling.

Parameters
[in]PchSpiBasePCH SPI PCI Base Address
Return values
PreviousBIOS Control Register value

Definition at line 139 of file PchSpi.c.

◆ SetSpiBiosControlRegister()

VOID SetSpiBiosControlRegister ( IN UINTN  PchSpiBase,
IN UINT8  BiosCtlValue 
)

This function updates BIOS Control Register with the given value.

Parameters
[in]PchSpiBasePCH SPI PCI Base Address
[in]BiosCtlValueBIOS Control Register Value to be updated

Definition at line 164 of file PchSpi.c.