TianoCore EDK2 master
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PciDeviceSupport.c
Go to the documentation of this file.
1
10#include "PciBus.h"
11
12//
13// This device structure is serviced as a header.
14// Its next field points to the first root bridge device node.
15//
16LIST_ENTRY mPciDevicePool;
17
22VOID
24 VOID
25 )
26{
27 InitializeListHead (&mPciDevicePool);
28}
29
36VOID
38 IN PCI_IO_DEVICE *RootBridge
39 )
40{
41 InsertTailList (&mPciDevicePool, &(RootBridge->Link));
42}
43
52VOID
54 IN PCI_IO_DEVICE *Bridge,
55 IN PCI_IO_DEVICE *PciDeviceNode
56 )
57{
58 InsertTailList (&Bridge->ChildList, &(PciDeviceNode->Link));
59 PciDeviceNode->Parent = Bridge;
60}
61
68VOID
70 IN PCI_IO_DEVICE *RootBridge
71 )
72{
73 DestroyPciDeviceTree (RootBridge);
74
75 FreePciDevice (RootBridge);
76}
77
86VOID
88 IN PCI_IO_DEVICE *PciIoDevice
89 )
90{
91 ASSERT (PciIoDevice != NULL);
92 //
93 // Assume all children have been removed underneath this device
94 //
95 if (PciIoDevice->ResourcePaddingDescriptors != NULL) {
96 FreePool (PciIoDevice->ResourcePaddingDescriptors);
97 }
98
99 if (PciIoDevice->DevicePath != NULL) {
100 FreePool (PciIoDevice->DevicePath);
101 }
102
103 if (PciIoDevice->BusNumberRanges != NULL) {
104 FreePool (PciIoDevice->BusNumberRanges);
105 }
106
107 FreePool (PciIoDevice);
108}
109
117VOID
119 IN PCI_IO_DEVICE *Bridge
120 )
121{
122 LIST_ENTRY *CurrentLink;
123 PCI_IO_DEVICE *Temp;
124
125 while (!IsListEmpty (&Bridge->ChildList)) {
126 CurrentLink = Bridge->ChildList.ForwardLink;
127
128 //
129 // Remove this node from the linked list
130 //
131 RemoveEntryList (CurrentLink);
132
133 Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
134
135 if (!IsListEmpty (&Temp->ChildList)) {
137 }
138
139 FreePciDevice (Temp);
140 }
141}
142
158 IN EFI_HANDLE Controller
159 )
160{
161 LIST_ENTRY *CurrentLink;
162 PCI_IO_DEVICE *Temp;
163
164 CurrentLink = mPciDevicePool.ForwardLink;
165
166 while (CurrentLink != NULL && CurrentLink != &mPciDevicePool) {
167 Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
168
169 if (Temp->Handle == Controller) {
170 RemoveEntryList (CurrentLink);
171
173
174 FreePciDevice (Temp);
175
176 return EFI_SUCCESS;
177 }
178
179 CurrentLink = CurrentLink->ForwardLink;
180 }
181
182 return EFI_NOT_FOUND;
183}
184
202 IN EFI_HANDLE Controller,
203 IN PCI_IO_DEVICE *PciIoDevice,
204 OUT EFI_HANDLE *Handle OPTIONAL
205 )
206{
207 EFI_STATUS Status;
208 VOID *PlatformOpRomBuffer;
209 UINTN PlatformOpRomSize;
210 EFI_PCI_IO_PROTOCOL *PciIo;
211 UINT8 Data8;
212 BOOLEAN HasEfiImage;
213
214 //
215 // Install the pciio protocol, device path protocol
216 //
217 Status = gBS->InstallMultipleProtocolInterfaces (
218 &PciIoDevice->Handle,
219 &gEfiDevicePathProtocolGuid,
220 PciIoDevice->DevicePath,
221 &gEfiPciIoProtocolGuid,
222 &PciIoDevice->PciIo,
223 NULL
224 );
225 if (EFI_ERROR (Status)) {
226 return Status;
227 }
228
229 //
230 // Force Interrupt line to "Unknown" or "No Connection"
231 //
232 PciIo = &(PciIoDevice->PciIo);
233 Data8 = PCI_INT_LINE_UNKNOWN;
234 PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x3C, 1, &Data8);
235
236 //
237 // Process OpRom
238 //
239 if (!PciIoDevice->AllOpRomProcessed) {
240 //
241 // Get the OpRom provided by platform
242 //
243 if (gPciPlatformProtocol != NULL) {
244 Status = gPciPlatformProtocol->GetPciRom (
245 gPciPlatformProtocol,
246 PciIoDevice->Handle,
247 &PlatformOpRomBuffer,
248 &PlatformOpRomSize
249 );
250 if (!EFI_ERROR (Status)) {
251 PciIoDevice->EmbeddedRom = FALSE;
252 PciIoDevice->RomSize = (UINT32)PlatformOpRomSize;
253 PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
254 PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
255 //
256 // For OpROM read from gPciPlatformProtocol:
257 // Add the Rom Image to internal database for later PCI light enumeration
258 //
260 NULL,
261 PciIoDevice->PciRootBridgeIo->SegmentNumber,
262 PciIoDevice->BusNumber,
263 PciIoDevice->DeviceNumber,
264 PciIoDevice->FunctionNumber,
265 PciIoDevice->PciIo.RomImage,
266 PciIoDevice->PciIo.RomSize
267 );
268 }
269 } else if (gPciOverrideProtocol != NULL) {
270 Status = gPciOverrideProtocol->GetPciRom (
271 gPciOverrideProtocol,
272 PciIoDevice->Handle,
273 &PlatformOpRomBuffer,
274 &PlatformOpRomSize
275 );
276 if (!EFI_ERROR (Status)) {
277 PciIoDevice->EmbeddedRom = FALSE;
278 PciIoDevice->RomSize = (UINT32)PlatformOpRomSize;
279 PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
280 PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
281 //
282 // For OpROM read from gPciOverrideProtocol:
283 // Add the Rom Image to internal database for later PCI light enumeration
284 //
286 NULL,
287 PciIoDevice->PciRootBridgeIo->SegmentNumber,
288 PciIoDevice->BusNumber,
289 PciIoDevice->DeviceNumber,
290 PciIoDevice->FunctionNumber,
291 PciIoDevice->PciIo.RomImage,
292 PciIoDevice->PciIo.RomSize
293 );
294 }
295 }
296 }
297
298 //
299 // Determine if there are EFI images in the option rom
300 //
301 HasEfiImage = ContainEfiImage (PciIoDevice->PciIo.RomImage, PciIoDevice->PciIo.RomSize);
302
303 if (HasEfiImage) {
304 Status = gBS->InstallMultipleProtocolInterfaces (
305 &PciIoDevice->Handle,
306 &gEfiLoadFile2ProtocolGuid,
307 &PciIoDevice->LoadFile2,
308 NULL
309 );
310 if (EFI_ERROR (Status)) {
311 gBS->UninstallMultipleProtocolInterfaces (
312 PciIoDevice->Handle,
313 &gEfiDevicePathProtocolGuid,
314 PciIoDevice->DevicePath,
315 &gEfiPciIoProtocolGuid,
316 &PciIoDevice->PciIo,
317 NULL
318 );
319 return Status;
320 }
321 }
322
323 if (!PciIoDevice->AllOpRomProcessed) {
324 PciIoDevice->AllOpRomProcessed = TRUE;
325
326 //
327 // Dispatch the EFI OpRom for the PCI device.
328 // The OpRom is got from platform in the above code
329 // or loaded from device in the previous round of bus enumeration
330 //
331 if (HasEfiImage) {
332 //
333 // Try to searching native OpRom first
334 //
335 Status = ProcessOpRomImage (PciIoDevice, TRUE);
336 //
337 // If the native OpRom is not found, try to searching foreign OpRom
338 //
339 if (Status == EFI_NOT_FOUND) {
340 ProcessOpRomImage (PciIoDevice, FALSE);
341 }
342 }
343 }
344
345 if (PciIoDevice->BusOverride) {
346 //
347 // Install Bus Specific Driver Override Protocol
348 //
349 Status = gBS->InstallMultipleProtocolInterfaces (
350 &PciIoDevice->Handle,
351 &gEfiBusSpecificDriverOverrideProtocolGuid,
352 &PciIoDevice->PciDriverOverride,
353 NULL
354 );
355 if (EFI_ERROR (Status)) {
356 gBS->UninstallMultipleProtocolInterfaces (
357 PciIoDevice->Handle,
358 &gEfiDevicePathProtocolGuid,
359 PciIoDevice->DevicePath,
360 &gEfiPciIoProtocolGuid,
361 &PciIoDevice->PciIo,
362 NULL
363 );
364 if (HasEfiImage) {
365 gBS->UninstallMultipleProtocolInterfaces (
366 PciIoDevice->Handle,
367 &gEfiLoadFile2ProtocolGuid,
368 &PciIoDevice->LoadFile2,
369 NULL
370 );
371 }
372
373 return Status;
374 }
375 }
376
377 Status = gBS->OpenProtocol (
378 Controller,
379 &gEfiPciRootBridgeIoProtocolGuid,
380 (VOID **)&(PciIoDevice->PciRootBridgeIo),
381 gPciBusDriverBinding.DriverBindingHandle,
382 PciIoDevice->Handle,
383 EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
384 );
385 if (EFI_ERROR (Status)) {
386 return Status;
387 }
388
389 if (Handle != NULL) {
390 *Handle = PciIoDevice->Handle;
391 }
392
393 //
394 // Indicate the pci device is registered
395 //
396 PciIoDevice->Registered = TRUE;
397
398 return EFI_SUCCESS;
399}
400
409VOID
411 EFI_HANDLE RootBridgeHandle,
412 PCI_IO_DEVICE *Bridge
413 )
414{
415 LIST_ENTRY *CurrentLink;
416 PCI_IO_DEVICE *Temp;
417
418 while (!IsListEmpty (&Bridge->ChildList)) {
419 CurrentLink = Bridge->ChildList.ForwardLink;
420 Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
421
422 //
423 // Check if the current node has been deregistered before
424 // If it is not, then deregister it
425 //
426 if (Temp->Registered) {
427 DeRegisterPciDevice (RootBridgeHandle, Temp->Handle);
428 }
429
430 //
431 // Remove this node from the linked list
432 //
433 RemoveEntryList (CurrentLink);
434
435 if (!IsListEmpty (&Temp->ChildList)) {
436 RemoveAllPciDeviceOnBridge (RootBridgeHandle, Temp);
437 }
438
439 FreePciDevice (Temp);
440 }
441}
442
458 IN EFI_HANDLE Controller,
459 IN EFI_HANDLE Handle
460 )
461
462{
463 EFI_PCI_IO_PROTOCOL *PciIo;
464 EFI_STATUS Status;
465 PCI_IO_DEVICE *PciIoDevice;
466 PCI_IO_DEVICE *Node;
467 LIST_ENTRY *CurrentLink;
468 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
469
470 Status = gBS->OpenProtocol (
471 Handle,
472 &gEfiPciIoProtocolGuid,
473 (VOID **)&PciIo,
474 gPciBusDriverBinding.DriverBindingHandle,
475 Controller,
476 EFI_OPEN_PROTOCOL_GET_PROTOCOL
477 );
478 if (!EFI_ERROR (Status)) {
479 PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (PciIo);
480
481 //
482 // If it is already de-registered
483 //
484 if (!PciIoDevice->Registered) {
485 return EFI_SUCCESS;
486 }
487
488 //
489 // If it is PPB, first de-register its children
490 //
491
492 if (!IsListEmpty (&PciIoDevice->ChildList)) {
493 CurrentLink = PciIoDevice->ChildList.ForwardLink;
494
495 while (CurrentLink != NULL && CurrentLink != &PciIoDevice->ChildList) {
496 Node = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
497 Status = DeRegisterPciDevice (Controller, Node->Handle);
498
499 if (EFI_ERROR (Status)) {
500 return Status;
501 }
502
503 CurrentLink = CurrentLink->ForwardLink;
504 }
505 }
506
507 //
508 // Close the child handle
509 //
510 Status = gBS->CloseProtocol (
511 Controller,
512 &gEfiPciRootBridgeIoProtocolGuid,
513 gPciBusDriverBinding.DriverBindingHandle,
514 Handle
515 );
516
517 //
518 // Un-install the Device Path protocol and PCI I/O protocol
519 // and Bus Specific Driver Override protocol if needed.
520 //
521 if (PciIoDevice->BusOverride) {
522 Status = gBS->UninstallMultipleProtocolInterfaces (
523 Handle,
524 &gEfiDevicePathProtocolGuid,
525 PciIoDevice->DevicePath,
526 &gEfiPciIoProtocolGuid,
527 &PciIoDevice->PciIo,
528 &gEfiBusSpecificDriverOverrideProtocolGuid,
529 &PciIoDevice->PciDriverOverride,
530 NULL
531 );
532 } else {
533 Status = gBS->UninstallMultipleProtocolInterfaces (
534 Handle,
535 &gEfiDevicePathProtocolGuid,
536 PciIoDevice->DevicePath,
537 &gEfiPciIoProtocolGuid,
538 &PciIoDevice->PciIo,
539 NULL
540 );
541 }
542
543 if (!EFI_ERROR (Status)) {
544 //
545 // Try to uninstall LoadFile2 protocol if exists
546 //
547 Status = gBS->OpenProtocol (
548 Handle,
549 &gEfiLoadFile2ProtocolGuid,
550 NULL,
551 gPciBusDriverBinding.DriverBindingHandle,
552 Controller,
553 EFI_OPEN_PROTOCOL_TEST_PROTOCOL
554 );
555 if (!EFI_ERROR (Status)) {
556 Status = gBS->UninstallMultipleProtocolInterfaces (
557 Handle,
558 &gEfiLoadFile2ProtocolGuid,
559 &PciIoDevice->LoadFile2,
560 NULL
561 );
562 }
563
564 //
565 // Restore Status
566 //
567 Status = EFI_SUCCESS;
568 }
569
570 if (EFI_ERROR (Status)) {
571 gBS->OpenProtocol (
572 Controller,
573 &gEfiPciRootBridgeIoProtocolGuid,
574 (VOID **)&PciRootBridgeIo,
575 gPciBusDriverBinding.DriverBindingHandle,
576 Handle,
577 EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
578 );
579 return Status;
580 }
581
582 //
583 // The Device Driver should disable this device after disconnect
584 // so the Pci Bus driver will not touch this device any more.
585 // Restore the register field to the original value
586 //
587 PciIoDevice->Registered = FALSE;
588 PciIoDevice->Handle = NULL;
589 } else {
590 //
591 // Handle may be closed before
592 //
593 return EFI_SUCCESS;
594 }
595
596 return EFI_SUCCESS;
597}
598
616 IN EFI_HANDLE Controller,
617 IN PCI_IO_DEVICE *RootBridge,
618 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath,
619 IN OUT UINT8 *NumberOfChildren,
620 IN OUT EFI_HANDLE *ChildHandleBuffer
621 )
622
623{
624 PCI_IO_DEVICE *PciIoDevice;
625 EFI_DEV_PATH_PTR Node;
626 EFI_DEVICE_PATH_PROTOCOL *CurrentDevicePath;
627 EFI_STATUS Status;
628 LIST_ENTRY *CurrentLink;
629 UINT64 Supports;
630
631 PciIoDevice = NULL;
632 CurrentLink = RootBridge->ChildList.ForwardLink;
633
634 while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {
635 PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
636 if (RemainingDevicePath != NULL) {
637 Node.DevPath = RemainingDevicePath;
638
639 if ((Node.Pci->Device != PciIoDevice->DeviceNumber) ||
640 (Node.Pci->Function != PciIoDevice->FunctionNumber))
641 {
642 CurrentLink = CurrentLink->ForwardLink;
643 continue;
644 }
645
646 //
647 // Check if the device has been assigned with required resource
648 //
649 if (!PciIoDevice->Allocated) {
650 return EFI_NOT_READY;
651 }
652
653 //
654 // Check if the current node has been registered before
655 // If it is not, register it
656 //
657 if (!PciIoDevice->Registered) {
658 Status = RegisterPciDevice (
659 Controller,
660 PciIoDevice,
661 NULL
662 );
663 }
664
665 if ((NumberOfChildren != NULL) && (ChildHandleBuffer != NULL) && PciIoDevice->Registered) {
666 ChildHandleBuffer[*NumberOfChildren] = PciIoDevice->Handle;
667 (*NumberOfChildren)++;
668 }
669
670 //
671 // Get the next device path
672 //
673 CurrentDevicePath = NextDevicePathNode (RemainingDevicePath);
674 if (IsDevicePathEnd (CurrentDevicePath)) {
675 return EFI_SUCCESS;
676 }
677
678 //
679 // If it is a PPB
680 //
681 if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
682 Status = StartPciDevicesOnBridge (
683 Controller,
684 PciIoDevice,
685 CurrentDevicePath,
686 NumberOfChildren,
687 ChildHandleBuffer
688 );
689
690 PciIoDevice->PciIo.Attributes (
691 &(PciIoDevice->PciIo),
693 0,
694 &Supports
695 );
696 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
697 PciIoDevice->PciIo.Attributes (
698 &(PciIoDevice->PciIo),
700 Supports,
701 NULL
702 );
703
704 return Status;
705 } else {
706 //
707 // Currently, the PCI bus driver only support PCI-PCI bridge
708 //
709 return EFI_UNSUPPORTED;
710 }
711 } else {
712 //
713 // If remaining device path is NULL,
714 // try to enable all the pci devices under this bridge
715 //
716 if (!PciIoDevice->Registered && PciIoDevice->Allocated) {
717 Status = RegisterPciDevice (
718 Controller,
719 PciIoDevice,
720 NULL
721 );
722 }
723
724 if ((NumberOfChildren != NULL) && (ChildHandleBuffer != NULL) && PciIoDevice->Registered) {
725 ChildHandleBuffer[*NumberOfChildren] = PciIoDevice->Handle;
726 (*NumberOfChildren)++;
727 }
728
729 if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
730 Status = StartPciDevicesOnBridge (
731 Controller,
732 PciIoDevice,
733 RemainingDevicePath,
734 NumberOfChildren,
735 ChildHandleBuffer
736 );
737
738 PciIoDevice->PciIo.Attributes (
739 &(PciIoDevice->PciIo),
741 0,
742 &Supports
743 );
744 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
745 PciIoDevice->PciIo.Attributes (
746 &(PciIoDevice->PciIo),
748 Supports,
749 NULL
750 );
751 }
752
753 CurrentLink = CurrentLink->ForwardLink;
754 }
755 }
756
757 if (PciIoDevice == NULL) {
758 return EFI_NOT_FOUND;
759 } else {
760 return EFI_SUCCESS;
761 }
762}
763
776 IN EFI_HANDLE Controller
777 )
778{
779 PCI_IO_DEVICE *RootBridge;
780 EFI_HANDLE ThisHostBridge;
781 LIST_ENTRY *CurrentLink;
782
783 RootBridge = GetRootBridgeByHandle (Controller);
784 ASSERT (RootBridge != NULL);
785 ThisHostBridge = RootBridge->PciRootBridgeIo->ParentHandle;
786
787 CurrentLink = mPciDevicePool.ForwardLink;
788
789 while (CurrentLink != NULL && CurrentLink != &mPciDevicePool) {
790 RootBridge = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
791 //
792 // Locate the right root bridge to start
793 //
794 if (RootBridge->PciRootBridgeIo->ParentHandle == ThisHostBridge) {
796 RootBridge->Handle,
797 RootBridge,
798 NULL,
799 NULL,
800 NULL
801 );
802 }
803
804 CurrentLink = CurrentLink->ForwardLink;
805 }
806
807 return EFI_SUCCESS;
808}
809
821 IN EFI_HANDLE RootBridgeHandle
822 )
823{
824 EFI_STATUS Status;
825 PCI_IO_DEVICE *Dev;
826 EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
827 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
828
829 Dev = AllocateZeroPool (sizeof (PCI_IO_DEVICE));
830 if (Dev == NULL) {
831 return NULL;
832 }
833
834 Dev->Signature = PCI_IO_DEVICE_SIGNATURE;
835 Dev->Handle = RootBridgeHandle;
836 InitializeListHead (&Dev->ChildList);
837
838 Status = gBS->OpenProtocol (
839 RootBridgeHandle,
840 &gEfiDevicePathProtocolGuid,
841 (VOID **)&ParentDevicePath,
842 gPciBusDriverBinding.DriverBindingHandle,
843 RootBridgeHandle,
844 EFI_OPEN_PROTOCOL_GET_PROTOCOL
845 );
846
847 if (EFI_ERROR (Status)) {
848 FreePool (Dev);
849 return NULL;
850 }
851
852 //
853 // Record the root bridge parent device path
854 //
855 Dev->DevicePath = DuplicateDevicePath (ParentDevicePath);
856
857 //
858 // Get the pci root bridge io protocol
859 //
860 Status = gBS->OpenProtocol (
861 RootBridgeHandle,
862 &gEfiPciRootBridgeIoProtocolGuid,
863 (VOID **)&PciRootBridgeIo,
864 gPciBusDriverBinding.DriverBindingHandle,
865 RootBridgeHandle,
866 EFI_OPEN_PROTOCOL_GET_PROTOCOL
867 );
868
869 if (EFI_ERROR (Status)) {
870 FreePciDevice (Dev);
871 return NULL;
872 }
873
874 Dev->PciRootBridgeIo = PciRootBridgeIo;
875
876 //
877 // Initialize the PCI I/O instance structure
878 //
882
883 //
884 // Initialize reserved resource list and
885 // option rom driver list
886 //
887 InitializeListHead (&Dev->ReservedResourceList);
888 InitializeListHead (&Dev->OptionRomDriverList);
889
890 return Dev;
891}
892
904 EFI_HANDLE RootBridgeHandle
905 )
906{
907 PCI_IO_DEVICE *RootBridgeDev;
908 LIST_ENTRY *CurrentLink;
909
910 CurrentLink = mPciDevicePool.ForwardLink;
911
912 while (CurrentLink != NULL && CurrentLink != &mPciDevicePool) {
913 RootBridgeDev = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
914 if (RootBridgeDev->Handle == RootBridgeHandle) {
915 return RootBridgeDev;
916 }
917
918 CurrentLink = CurrentLink->ForwardLink;
919 }
920
921 return NULL;
922}
923
934BOOLEAN
936 IN PCI_IO_DEVICE *Bridge,
937 IN PCI_IO_DEVICE *PciIoDevice
938 )
939{
940 PCI_IO_DEVICE *Temp;
941 LIST_ENTRY *CurrentLink;
942
943 CurrentLink = Bridge->ChildList.ForwardLink;
944
945 while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
946 Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
947
948 if (Temp == PciIoDevice) {
949 return TRUE;
950 }
951
952 if (!IsListEmpty (&Temp->ChildList)) {
953 if (PciDeviceExisted (Temp, PciIoDevice)) {
954 return TRUE;
955 }
956 }
957
958 CurrentLink = CurrentLink->ForwardLink;
959 }
960
961 return FALSE;
962}
963
974 IN EFI_HANDLE HostBridgeHandle
975 )
976{
977 LIST_ENTRY *CurrentLink;
978 PCI_IO_DEVICE *PciIoDevice;
979
980 CurrentLink = mPciDevicePool.ForwardLink;
981
982 while (CurrentLink != NULL && CurrentLink != &mPciDevicePool) {
983 PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
984
985 if (PciIoDevice->PciRootBridgeIo->ParentHandle == HostBridgeHandle) {
986 PciIoDevice = LocateVgaDevice (PciIoDevice);
987
988 if (PciIoDevice != NULL) {
989 return PciIoDevice;
990 }
991 }
992
993 CurrentLink = CurrentLink->ForwardLink;
994 }
995
996 return NULL;
997}
998
1009 IN PCI_IO_DEVICE *Bridge
1010 )
1011{
1012 LIST_ENTRY *CurrentLink;
1013 PCI_IO_DEVICE *PciIoDevice;
1014
1015 CurrentLink = Bridge->ChildList.ForwardLink;
1016
1017 while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) {
1018 PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
1019
1020 if (IS_PCI_VGA (&PciIoDevice->Pci) &&
1021 ((PciIoDevice->Attributes &
1025 {
1026 return PciIoDevice;
1027 }
1028
1029 if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
1030 PciIoDevice = LocateVgaDevice (PciIoDevice);
1031
1032 if (PciIoDevice != NULL) {
1033 return PciIoDevice;
1034 }
1035 }
1036
1037 CurrentLink = CurrentLink->ForwardLink;
1038 }
1039
1040 return NULL;
1041}
UINT64 UINTN
BOOLEAN EFIAPI IsListEmpty(IN CONST LIST_ENTRY *ListHead)
Definition: LinkedList.c:403
LIST_ENTRY *EFIAPI RemoveEntryList(IN CONST LIST_ENTRY *Entry)
Definition: LinkedList.c:590
LIST_ENTRY *EFIAPI InitializeListHead(IN OUT LIST_ENTRY *ListHead)
Definition: LinkedList.c:182
LIST_ENTRY *EFIAPI InsertTailList(IN OUT LIST_ENTRY *ListHead, IN OUT LIST_ENTRY *Entry)
Definition: LinkedList.c:259
BOOLEAN EFIAPI IsDevicePathEnd(IN CONST VOID *Node)
EFI_DEVICE_PATH_PROTOCOL *EFIAPI NextDevicePathNode(IN CONST VOID *Node)
EFI_DEVICE_PATH_PROTOCOL *EFIAPI DuplicateDevicePath(IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath)
VOID *EFIAPI AllocateZeroPool(IN UINTN AllocationSize)
VOID EFIAPI FreePool(IN VOID *Buffer)
#define NULL
Definition: Base.h:319
#define VOID
Definition: Base.h:269
#define TRUE
Definition: Base.h:301
#define FALSE
Definition: Base.h:307
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY
MEM cycles 0xA0000-0xBFFFF (24 bit decode)
Definition: PciIo.h:52
#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16
I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
Definition: PciIo.h:67
@ EfiPciIoAttributeOperationEnable
Definition: PciIo.h:111
@ EfiPciIoAttributeOperationSupported
Definition: PciIo.h:119
#define EFI_PCI_IO_ATTRIBUTE_VGA_IO
I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
Definition: PciIo.h:53
#define IS_PCI_BRIDGE(_p)
Definition: Pci22.h:504
#define PCI_INT_LINE_UNKNOWN
Definition: Pci22.h:572
#define IS_PCI_VGA(_p)
Definition: Pci22.h:360
EFI_STATUS DeRegisterPciDevice(IN EFI_HANDLE Controller, IN EFI_HANDLE Handle)
EFI_STATUS RegisterPciDevice(IN EFI_HANDLE Controller, IN PCI_IO_DEVICE *PciIoDevice, OUT EFI_HANDLE *Handle OPTIONAL)
PCI_IO_DEVICE * CreateRootBridge(IN EFI_HANDLE RootBridgeHandle)
VOID DestroyPciDeviceTree(IN PCI_IO_DEVICE *Bridge)
VOID DestroyRootBridge(IN PCI_IO_DEVICE *RootBridge)
EFI_STATUS DestroyRootBridgeByHandle(IN EFI_HANDLE Controller)
VOID InsertRootBridge(IN PCI_IO_DEVICE *RootBridge)
EFI_STATUS StartPciDevicesOnBridge(IN EFI_HANDLE Controller, IN PCI_IO_DEVICE *RootBridge, IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath, IN OUT UINT8 *NumberOfChildren, IN OUT EFI_HANDLE *ChildHandleBuffer)
BOOLEAN PciDeviceExisted(IN PCI_IO_DEVICE *Bridge, IN PCI_IO_DEVICE *PciIoDevice)
VOID InitializePciDevicePool(VOID)
EFI_STATUS StartPciDevices(IN EFI_HANDLE Controller)
PCI_IO_DEVICE * GetRootBridgeByHandle(EFI_HANDLE RootBridgeHandle)
VOID FreePciDevice(IN PCI_IO_DEVICE *PciIoDevice)
PCI_IO_DEVICE * LocateVgaDevice(IN PCI_IO_DEVICE *Bridge)
VOID InsertPciDevice(IN PCI_IO_DEVICE *Bridge, IN PCI_IO_DEVICE *PciDeviceNode)
PCI_IO_DEVICE * LocateVgaDeviceOnHostBridge(IN EFI_HANDLE HostBridgeHandle)
VOID RemoveAllPciDeviceOnBridge(EFI_HANDLE RootBridgeHandle, PCI_IO_DEVICE *Bridge)
VOID InitializePciDriverOverrideInstance(IN OUT PCI_IO_DEVICE *PciIoDevice)
VOID InitializePciIoInstance(IN PCI_IO_DEVICE *PciIoDevice)
Definition: PciIo.c:52
EFI_STATUS ProcessOpRomImage(IN PCI_IO_DEVICE *PciDevice, IN BOOLEAN NativeOnly)
VOID InitializePciLoadFile2(IN PCI_IO_DEVICE *PciIoDevice)
BOOLEAN ContainEfiImage(IN VOID *RomImage, IN UINT64 RomSize)
VOID PciRomAddImageMapping(IN EFI_HANDLE ImageHandle, IN UINTN Seg, IN UINT8 Bus, IN UINT8 Dev, IN UINT8 Func, IN VOID *RomImage, IN UINT64 RomSize)
Definition: PciRomTable.c:40
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:29
VOID * EFI_HANDLE
Definition: UefiBaseType.h:33
#define EFI_SUCCESS
Definition: UefiBaseType.h:112
EFI_BOOT_SERVICES * gBS
EFI_PCI_PLATFORM_GET_PCI_ROM GetPciRom
Definition: PciPlatform.h:333
EFI_PCI_IO_PROTOCOL_CONFIG Write
Definition: PciIo.h:236