TianoCore EDK2 master
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#include <PiSmm.h>
#include <Library/SmmCpuFeaturesLib.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/SmmServicesTableLib.h>
#include <Library/DebugLib.h>
#include "PiSmmCpuCommon.h"
Go to the source code of this file.
Data Structures | |
struct | PROCESSOR_SMM_DESCRIPTOR |
Macros | |
#define | LMA BIT10 |
Functions | |
UINTN EFIAPI | GetSmiHandlerSize (VOID) |
VOID EFIAPI | InstallSmiHandler (IN UINTN CpuIndex, IN UINT32 SmBase, IN VOID *SmiStack, IN UINTN StackSize, IN UINTN GdtBase, IN UINTN GdtSize, IN UINTN IdtBase, IN UINTN IdtSize, IN UINT32 Cr3) |
Variables | |
CONST PROCESSOR_SMM_DESCRIPTOR | gcPsd |
X86_ASSEMBLY_PATCH_LABEL | gPatchSmbase |
X86_ASSEMBLY_PATCH_LABEL | gPatchSmiStack |
X86_ASSEMBLY_PATCH_LABEL | gPatchSmiCr3 |
volatile UINT8 | gcSmiHandlerTemplate [] |
CONST UINT16 | gcSmiHandlerSize |
IA32_DESCRIPTOR | gSmiHandlerIdtr |
UINT8 | mSmmSaveStateRegisterLma |
Provides services to access SMRAM Save State Map
Copyright (c) 2010 - 2024, Intel Corporation. All rights reserved.
Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file SmramSaveState.c.
#define LMA BIT10 |
Definition at line 51 of file SmramSaveState.c.
UINTN EFIAPI GetSmiHandlerSize | ( | VOID | ) |
Get the size of the SMI Handler in bytes.
The | size, in bytes, of the SMI Handler. |
Definition at line 80 of file SmramSaveState.c.
VOID EFIAPI InstallSmiHandler | ( | IN UINTN | CpuIndex, |
IN UINT32 | SmBase, | ||
IN VOID * | SmiStack, | ||
IN UINTN | StackSize, | ||
IN UINTN | GdtBase, | ||
IN UINTN | GdtSize, | ||
IN UINTN | IdtBase, | ||
IN UINTN | IdtSize, | ||
IN UINT32 | Cr3 | ||
) |
Install the SMI handler for the CPU specified by CpuIndex. This function is called by the CPU that was elected as monarch during System Management Mode initialization.
[in] | CpuIndex | The index of the CPU to install the custom SMI handler. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST). |
[in] | SmBase | The SMBASE address for the CPU specified by CpuIndex. |
[in] | SmiStack | The stack to use when an SMI is processed by the the CPU specified by CpuIndex. |
[in] | StackSize | The size, in bytes, if the stack used when an SMI is processed by the CPU specified by CpuIndex. |
[in] | GdtBase | The base address of the GDT to use when an SMI is processed by the CPU specified by CpuIndex. |
[in] | GdtSize | The size, in bytes, of the GDT used when an SMI is processed by the CPU specified by CpuIndex. |
[in] | IdtBase | The base address of the IDT to use when an SMI is processed by the CPU specified by CpuIndex. |
[in] | IdtSize | The size, in bytes, of the IDT used when an SMI is processed by the CPU specified by CpuIndex. |
[in] | Cr3 | The base address of the page tables to use when an SMI is processed by the CPU specified by CpuIndex. |
Definition at line 120 of file SmramSaveState.c.
X86_ASSEMBLY_PATCH_LABEL gPatchSmbase |
Variables from SMI Handler
Definition at line 56 of file SmramSaveState.c.
X86_ASSEMBLY_PATCH_LABEL gPatchSmiCr3 |
Definition at line 58 of file SmramSaveState.c.
X86_ASSEMBLY_PATCH_LABEL gPatchSmiStack |
Definition at line 57 of file SmramSaveState.c.
IA32_DESCRIPTOR gSmiHandlerIdtr |
Definition at line 65 of file SmramSaveState.c.
UINT8 mSmmSaveStateRegisterLma |
The mode of the CPU at the time an SMI occurs
Definition at line 70 of file SmramSaveState.c.