PiSmmCpuCommon.h

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#ifndef _CPU_PISMMCPUDXESMM_H_
#define _CPU_PISMMCPUDXESMM_H_
 
#include <PiSmm.h>
 
#include <Protocol/SmmConfiguration.h>
#include <Protocol/SmmCpu.h>
#include <Protocol/SmmReadyToLock.h>
#include <Protocol/SmmCpuService.h>
#include <Protocol/SmmMemoryAttribute.h>
#include <Protocol/MmMp.h>
#include <Protocol/SmmVariable.h>
 
#include <Guid/AcpiS3Context.h>
#include <Guid/MemoryAttributesTable.h>
#include <Guid/PiSmmMemoryAttributesTable.h>
#include <Guid/SmramMemoryReserve.h>
#include <Guid/SmmBaseHob.h>
#include <Guid/MpInformation2.h>
#include <Guid/MmProfileData.h>
#include <Guid/MmAcpiS3Enable.h>
#include <Guid/MmCpuSyncConfig.h>
 
#include <Library/BaseLib.h>
#include <Library/IoLib.h>
#include <Library/TimerLib.h>
#include <Library/SynchronizationLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/PcdLib.h>
#include <Library/MtrrLib.h>
#include <Library/SmmCpuPlatformHookLib.h>
#include <Library/MmServicesTableLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/DebugAgentLib.h>
#include <Library/UefiLib.h>
#include <Library/HobLib.h>
#include <Library/LocalApicLib.h>
#include <Library/CpuLib.h>
#include <Library/CpuExceptionHandlerLib.h>
#include <Library/ReportStatusCodeLib.h>
#include <Library/SmmCpuFeaturesLib.h>
#include <Library/PeCoffGetEntryPointLib.h>
#include <Library/RegisterCpuFeaturesLib.h>
#include <Library/PerformanceLib.h>
#include <Library/CpuPageTableLib.h>
#include <Library/MmSaveStateLib.h>
#include <Library/SmmCpuSyncLib.h>
 
#include <AcpiCpuData.h>
#include <CpuHotPlugData.h>
 
#include <Register/Intel/Cpuid.h>
#include <Register/Intel/Msr.h>
 
#include "CpuService.h"
#include "SmmProfile.h"
#include "SmmMpPerf.h"
 
//
// CET definition
//
#define CPUID_CET_SS   BIT7
#define CPUID_CET_IBT  BIT20
 
#define CR4_CET_ENABLE  BIT23
 
#define MSR_IA32_S_CET                     0x6A2
#define MSR_IA32_PL0_SSP                   0x6A4
#define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR  0x6A8
 
typedef union {
  struct {
    // enable shadow stacks
    UINT32    SH_STK_ENP              : 1;
    // enable the WRSS{D,Q}W instructions.
    UINT32    WR_SHSTK_EN             : 1;
    // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.
    UINT32    ENDBR_EN                : 1;
    // enable legacy compatibility treatment for indirect call/jmp tracking.
    UINT32    LEG_IW_EN               : 1;
    // enable use of no-track prefix on indirect call/jmp.
    UINT32    NO_TRACK_EN             : 1;
    // disable suppression of CET indirect branch tracking on legacy compatibility.
    UINT32    SUPPRESS_DIS            : 1;
    UINT32    RSVD                    : 4;
    // indirect branch tracking is suppressed.
    // This bit can be written to 1 only if TRACKER is written as IDLE.
    UINT32    SUPPRESS                : 1;
    // Value of the endbranch state machine
    // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).
    UINT32    TRACKER                 : 1;
    // linear address of a bitmap in memory indicating valid
    // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled
    // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on
    // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are
    // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address
    // (this automatically aligns the address on a 4-Kbyte boundary).
    UINT32    EB_LEG_BITMAP_BASE_low  : 12;
    UINT32    EB_LEG_BITMAP_BASE_high : 32;
  } Bits;
  UINT64    Uint64;
} MSR_IA32_CET;
 
//
// MSRs required for configuration of SMM Code Access Check
//
#define EFI_MSR_SMM_MCA_CAP       0x17D
#define  SMM_CODE_ACCESS_CHK_BIT  BIT58
 
#define  SMM_FEATURE_CONTROL_LOCK_BIT  BIT0
#define  SMM_CODE_CHK_EN_BIT           BIT2
 
#define IA32_PG_P       BIT0
#define IA32_PG_RW      BIT1
#define IA32_PG_U       BIT2
#define IA32_PG_WT      BIT3
#define IA32_PG_CD      BIT4
#define IA32_PG_A       BIT5
#define IA32_PG_D       BIT6
#define IA32_PG_PS      BIT7
#define IA32_PG_PAT_2M  BIT12
#define IA32_PG_PAT_4K  IA32_PG_PS
#define IA32_PG_PMNT    BIT62
#define IA32_PG_NX      BIT63
 
#define PAGE_ATTRIBUTE_BITS  (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
//
// Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
// X64 PAE PDPTE does not have such restriction
//
#define IA32_PAE_PDPTE_ATTRIBUTE_BITS  (IA32_PG_P)
 
#define PAGE_PROGATE_BITS  (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
 
#define PAGING_4K_MASK  0xFFF
#define PAGING_2M_MASK  0x1FFFFF
#define PAGING_1G_MASK  0x3FFFFFFF
 
#define PAGING_PAE_INDEX_MASK  0x1FF
 
#define PAGING_4K_ADDRESS_MASK_64  0x000FFFFFFFFFF000ull
#define PAGING_2M_ADDRESS_MASK_64  0x000FFFFFFFE00000ull
#define PAGING_1G_ADDRESS_MASK_64  0x000FFFFFC0000000ull
 
#define SMRR_MAX_ADDRESS  BASE_4GB
 
typedef enum {
  PageNone,
  Page4K,
  Page2M,
  Page1G,
} PAGE_ATTRIBUTE;
 
typedef struct {
  PAGE_ATTRIBUTE    Attribute;
  UINT64            Length;
  UINT64            AddressMask;
} PAGE_ATTRIBUTE_TABLE;
 
//
// Size of Task-State Segment defined in IA32 Manual
//
#define TSS_SIZE             104
#define EXCEPTION_TSS_SIZE   (TSS_SIZE + 4)  // Add 4 bytes SSP
#define TSS_X64_IST1_OFFSET  36
#define TSS_IA32_CR3_OFFSET  28
#define TSS_IA32_ESP_OFFSET  56
#define TSS_IA32_SSP_OFFSET  104
 
#define CR0_WP  BIT16
 
//
// Code select value
//
#define PROTECT_MODE_CODE_SEGMENT  0x08
#define LONG_MODE_CODE_SEGMENT     0x38
 
#define EXCEPTION_VECTOR_NUMBER  0x20
 
#define INVALID_APIC_ID  0xFFFFFFFFFFFFFFFFULL
 
//
// Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.
//
typedef struct {
  EFI_AP_PROCEDURE    Procedure;
  VOID                *ProcedureArgument;
} PROCEDURE_WRAPPER;
 
#define PROCEDURE_TOKEN_SIGNATURE  SIGNATURE_32 ('P', 'R', 'T', 'S')
 
typedef struct {
  UINTN              Signature;
  LIST_ENTRY         Link;
 
  SPIN_LOCK          *SpinLock;
  volatile UINT32    RunningApCount;
} PROCEDURE_TOKEN;
 
#define PROCEDURE_TOKEN_FROM_LINK(a)  CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)
 
#define TOKEN_BUFFER_SIGNATURE  SIGNATURE_32 ('T', 'K', 'B', 'S')
 
typedef struct {
  UINTN         Signature;
  LIST_ENTRY    Link;
 
  UINT8         *Buffer;
} TOKEN_BUFFER;
 
#define TOKEN_BUFFER_FROM_LINK(a)  CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)
 
//
// Private structure for the SMM CPU module that is stored in DXE Runtime memory
// Contains the SMM Configuration Protocols that is produced.
// Contains a mix of DXE and SMM contents.  All the fields must be used properly.
//
#define SMM_CPU_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('s', 'c', 'p', 'u')
 
typedef struct {
  UINTN                             Signature;
 
  EFI_HANDLE                        SmmCpuHandle;
 
  EFI_PROCESSOR_INFORMATION         *ProcessorInfo;
  SMM_CPU_OPERATION                 *Operation;
  UINTN                             *CpuSaveStateSize;
  VOID                              **CpuSaveState;
 
  EFI_SMM_RESERVED_SMRAM_REGION     SmmReservedSmramRegion[1];
  EFI_SMM_ENTRY_CONTEXT             SmmCoreEntryContext;
  EFI_SMM_ENTRY_POINT               SmmCoreEntry;
 
  EFI_SMM_CONFIGURATION_PROTOCOL    SmmConfiguration;
 
  PROCEDURE_WRAPPER                 *ApWrapperFunc;
  LIST_ENTRY                        TokenList;
  LIST_ENTRY                        *FirstFreeToken;
} SMM_CPU_PRIVATE_DATA;
 
extern const BOOLEAN  mIsStandaloneMm;
 
extern SMM_CPU_PRIVATE_DATA  *gSmmCpuPrivate;
extern CPU_HOT_PLUG_DATA     mCpuHotPlugData;
extern UINTN                 mMaxNumberOfCpus;
extern UINTN                 mNumberOfCpus;
extern EFI_SMM_CPU_PROTOCOL  mSmmCpu;
extern EFI_MM_MP_PROTOCOL    mSmmMp;
extern BOOLEAN               m5LevelPagingNeeded;
extern PAGING_MODE           mPagingMode;
extern UINTN                 mSmmShadowStackSize;
 
extern UINT8  mSmmSaveStateRegisterLma;
 
extern BOOLEAN  mAcpiS3Enable;
 
#define PAGE_TABLE_POOL_ALIGNMENT   BASE_128KB
#define PAGE_TABLE_POOL_UNIT_SIZE   BASE_128KB
#define PAGE_TABLE_POOL_UNIT_PAGES  EFI_SIZE_TO_PAGES (PAGE_TABLE_POOL_UNIT_SIZE)
#define PAGE_TABLE_POOL_ALIGN_MASK  \
  (~(EFI_PHYSICAL_ADDRESS)(PAGE_TABLE_POOL_ALIGNMENT - 1))
 
typedef struct {
  VOID     *NextPool;
  UINTN    Offset;
  UINTN    FreePages;
} PAGE_TABLE_POOL;
 
VOID
EFIAPI
DisableCet (
  VOID
  );
 
VOID
EFIAPI
EnableCet (
  VOID
  );
 
//
// SMM CPU Protocol function prototypes.
//
 
EFI_STATUS
EFIAPI
SmmReadSaveState (
  IN CONST EFI_SMM_CPU_PROTOCOL   *This,
  IN UINTN                        Width,
  IN EFI_SMM_SAVE_STATE_REGISTER  Register,
  IN UINTN                        CpuIndex,
  OUT VOID                        *Buffer
  );
 
EFI_STATUS
EFIAPI
SmmWriteSaveState (
  IN CONST EFI_SMM_CPU_PROTOCOL   *This,
  IN UINTN                        Width,
  IN EFI_SMM_SAVE_STATE_REGISTER  Register,
  IN UINTN                        CpuIndex,
  IN CONST VOID                   *Buffer
  );
 
VOID
InitializeSmm (
  VOID
  );
 
VOID
ExecuteFirstSmiInit (
  VOID
  );
 
extern volatile  BOOLEAN  *mSmmInitialized;
extern UINT32             mBspApicId;
 
X86_ASSEMBLY_PATCH_LABEL  mPatchCetSupported;
extern BOOLEAN            mCetSupported;
 
VOID
EFIAPI
SmmRelocationSemaphoreComplete (
  VOID
  );
 
typedef struct {
  SPIN_LOCK                     *Busy;
  volatile EFI_AP_PROCEDURE2    Procedure;
  volatile VOID                 *Parameter;
  volatile BOOLEAN              *Present;
  PROCEDURE_TOKEN               *Token;
  EFI_STATUS                    *Status;
} SMM_CPU_DATA_BLOCK;
 
typedef struct {
  //
  // Pointer to an array. The array should be located immediately after this structure
  // so that UC cache-ability can be set together.
  //
  SMM_CPU_DATA_BLOCK           *CpuData;
  volatile UINT32              BspIndex;
  volatile BOOLEAN             *InsideSmm;
  volatile BOOLEAN             *AllCpusInSync;
  volatile MM_CPU_SYNC_MODE    EffectiveSyncMode;
  volatile BOOLEAN             SwitchBsp;
  volatile BOOLEAN             *CandidateBsp;
  volatile BOOLEAN             AllApArrivedWithException;
  EFI_AP_PROCEDURE             StartupProcedure;
  VOID                         *StartupProcArgs;
  SMM_CPU_SYNC_CONTEXT         *SyncContext;
} SMM_DISPATCHER_MP_SYNC_DATA;
 
#define SMM_PSD_OFFSET  0xfb00
 
typedef struct {
  volatile BOOLEAN    *InsideSmm;
  volatile BOOLEAN    *AllCpusInSync;
  SPIN_LOCK           *PFLock;
  SPIN_LOCK           *CodeAccessCheckLock;
} SMM_CPU_SEMAPHORE_GLOBAL;
 
typedef struct {
  SPIN_LOCK           *Busy;
  volatile BOOLEAN    *Present;
  SPIN_LOCK           *Token;
} SMM_CPU_SEMAPHORE_CPU;
 
typedef struct {
  SMM_CPU_SEMAPHORE_GLOBAL    SemaphoreGlobal;
  SMM_CPU_SEMAPHORE_CPU       SemaphoreCpu;
} SMM_CPU_SEMAPHORES;
 
extern IA32_DESCRIPTOR               gcSmiGdtr;
extern EFI_PHYSICAL_ADDRESS          mGdtBuffer;
extern UINTN                         mGdtBufferSize;
extern IA32_DESCRIPTOR               gcSmiIdtr;
extern VOID                          *gcSmiIdtrPtr;
extern UINT64                        gPhyMask;
extern SMM_DISPATCHER_MP_SYNC_DATA   *mSmmMpSyncData;
extern UINTN                         mSmmStackArrayBase;
extern UINTN                         mSmmStackArrayEnd;
extern UINTN                         mSmmStackSize;
extern EFI_SMM_CPU_SERVICE_PROTOCOL  mSmmCpuService;
extern SMM_CPU_SEMAPHORES            mSmmCpuSemaphores;
extern UINTN                         mSemaphoreSize;
extern SPIN_LOCK                     *mPFLock;
extern SPIN_LOCK                     *mConfigSmmCodeAccessCheckLock;
extern EFI_SMRAM_DESCRIPTOR          *mSmmCpuSmramRanges;
extern UINTN                         mSmmCpuSmramRangeCount;
extern UINT8                         mPhysicalAddressBits;
extern BOOLEAN                       mSmmDebugAgentSupport;
extern BOOLEAN                       mSmmCodeAccessCheckEnable;
 
//
// Copy of the PcdPteMemoryEncryptionAddressOrMask
//
extern UINT64  mAddressEncMask;
 
extern UINT64  mTimeoutTicker;
extern UINT64  mTimeoutTicker2;
 
typedef struct {
  EFI_PHYSICAL_ADDRESS    Base;
  UINT64                  Length;
  UINT64                  Attribute;
} MM_CPU_MEMORY_REGION;
 
UINT32
Gen4GPageTable (
  IN      BOOLEAN  Is32BitPageTable
  );
 
UINTN
GenSmmPageTable (
  IN PAGING_MODE  PagingMode,
  IN UINT8        PhysicalAddressBits
  );
 
UINT32
InitializeMpServiceData (
  IN VOID   *Stacks,
  IN UINTN  StackSize,
  IN UINTN  ShadowStackSize
  );
 
VOID
InitializeSmmTimer (
  VOID
  );
 
UINT64
EFIAPI
StartSyncTimer (
  VOID
  );
 
BOOLEAN
EFIAPI
IsSyncTimerTimeout (
  IN      UINT64  Timer,
  IN      UINT64  Timeout
  );
 
VOID
EFIAPI
InitializeIDTSmmStackGuard (
  VOID
  );
 
VOID
EFIAPI
InitializeIdtIst (
  IN EFI_EXCEPTION_TYPE  ExceptionType,
  IN UINT8               Ist
  );
 
VOID *
InitGdt (
  IN  UINTN  Cr3,
  OUT UINTN  *GdtStepSize
  );
 
EFI_STATUS
EFIAPI
RegisterSmmEntry (
  IN CONST EFI_SMM_CONFIGURATION_PROTOCOL  *This,
  IN EFI_SMM_ENTRY_POINT                   SmmEntryPoint
  );
 
UINT32
SmmInitPageTable (
  VOID
  );
 
EFI_STATUS
EFIAPI
SmmStartupThisAp (
  IN      EFI_AP_PROCEDURE  Procedure,
  IN      UINTN             CpuIndex,
  IN OUT  VOID              *ProcArguments OPTIONAL
  );
 
EFI_STATUS
EFIAPI
SmmBlockingStartupThisAp (
  IN      EFI_AP_PROCEDURE  Procedure,
  IN      UINTN             CpuIndex,
  IN OUT  VOID              *ProcArguments OPTIONAL
  );
 
RETURN_STATUS
ConvertMemoryPageAttributes (
  IN  UINTN             PageTableBase,
  IN  PAGING_MODE       PagingMode,
  IN  PHYSICAL_ADDRESS  BaseAddress,
  IN  UINT64            Length,
  IN  UINT64            Attributes,
  IN  BOOLEAN           IsSet,
  OUT BOOLEAN           *IsModified   OPTIONAL
  );
 
EFI_STATUS
SmmSetMemoryAttributes (
  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
  IN  UINT64                Length,
  IN  UINT64                Attributes
  );
 
EFI_STATUS
SmmClearMemoryAttributes (
  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
  IN  UINT64                Length,
  IN  UINT64                Attributes
  );
 
EFI_STATUS
EFIAPI
SmmGetSystemConfigurationTable (
  IN  EFI_GUID  *TableGuid,
  OUT VOID      **Table
  );
 
VOID
EFIAPI
InitializeMpSyncData (
  VOID
  );
 
VOID
FindSmramInfo (
  OUT UINT32  *SmrrBase,
  OUT UINT32  *SmrrSize
  );
 
VOID
EFIAPI
SmiPFHandler (
  IN EFI_EXCEPTION_TYPE  InterruptType,
  IN EFI_SYSTEM_CONTEXT  SystemContext
  );
 
BOOLEAN
IsSmmProfileEnabled (
  VOID
  );
 
VOID
PerformRemainingTasks (
  VOID
  );
 
VOID
PerformPreTasks (
  VOID
  );
 
VOID
InitMsrSpinLockByIndex (
  IN UINT32  MsrIndex
  );
 
VOID
EFIAPI
ConfigSmmCodeAccessCheckOnCurrentProcessor (
  IN OUT VOID  *Buffer
  );
 
VOID
ConfigSmmCodeAccessCheck (
  VOID
  );
 
UINTN
EFIAPI
GetSmiHandlerSize (
  VOID
  );
 
VOID
EFIAPI
InstallSmiHandler (
  IN UINTN   CpuIndex,
  IN UINT32  SmBase,
  IN VOID    *SmiStack,
  IN UINTN   StackSize,
  IN UINTN   GdtBase,
  IN UINTN   GdtSize,
  IN UINTN   IdtBase,
  IN UINTN   IdtSize,
  IN UINT32  Cr3
  );
 
VOID
DumpModuleInfoByIp (
  IN  UINTN  CallerIpAddress
  );
 
VOID
SetMemMapAttributes (
  EDKII_PI_SMM_MEMORY_ATTRIBUTES_TABLE  *MemoryAttributesTable
  );
 
EFI_PHYSICAL_ADDRESS
GetSmmProfileData (
  IN OUT  UINT64  *Size
  );
 
BOOLEAN
IsNonMmramLoggingAddress (
  IN UINT64  Address
  );
 
BOOLEAN
IsSmmCommBufferForbiddenAddress (
  IN UINT64  Address
  );
 
VOID
CreateExtendedProtectionRange (
  OUT MM_CPU_MEMORY_REGION  **MemoryRegion,
  OUT UINTN                 *MemoryRegionCount
  );
 
VOID
CreateNonMmramMemMap (
  IN  UINT8                 PhysicalAddressBits,
  OUT MM_CPU_MEMORY_REGION  **MemoryRegion,
  OUT UINTN                 *MemoryRegionCount
  );
 
VOID
UpdateUefiMemMapAttributes (
  VOID
  );
 
VOID
GetUefiMemoryMap (
  VOID
  );
 
VOID
SetPageTableAttributes (
  VOID
  );
 
EFI_STATUS
SmmSetMemoryAttributesEx (
  IN  UINTN             PageTableBase,
  IN  PAGING_MODE       PagingMode,
  IN  PHYSICAL_ADDRESS  BaseAddress,
  IN  UINT64            Length,
  IN  UINT64            Attributes
  );
 
EFI_STATUS
SmmClearMemoryAttributesEx (
  IN  UINTN                 PageTableBase,
  IN  PAGING_MODE           PagingMode,
  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
  IN  UINT64                Length,
  IN  UINT64                Attributes
  );
 
VOID *
AllocatePageTableMemory (
  IN UINTN  Pages
  );
 
VOID *
AllocateCodePages (
  IN UINTN  Pages
  );
 
//
// S3 related global variable and function prototype.
//
 
extern BOOLEAN  mSmmS3Flag;
 
VOID
InitSmmS3ResumeState (
  VOID
  );
 
VOID
RestoreSmmConfigurationInS3 (
  VOID
  );
 
VOID
GetSmmCpuSyncConfigData (
  IN OUT BOOLEAN *RelaxedMode, OPTIONAL
  IN OUT UINT64  *SyncTimeout, OPTIONAL
  IN OUT UINT64  *SyncTimeout2 OPTIONAL
  );
 
VOID
GetAcpiS3EnableFlag (
  VOID
  );
 
EFI_STATUS
SetShadowStack (
  IN  UINTN                 Cr3,
  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
  IN  UINT64                Length
  );
 
VOID
InitShadowStack (
  IN UINTN  CpuIndex,
  IN VOID   *ShadowStack
  );
 
EFI_STATUS
EFIAPI
EdkiiSmmSetMemoryAttributes (
  IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL  *This,
  IN  EFI_PHYSICAL_ADDRESS                 BaseAddress,
  IN  UINT64                               Length,
  IN  UINT64                               Attributes
  );
 
EFI_STATUS
EFIAPI
EdkiiSmmClearMemoryAttributes (
  IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL  *This,
  IN  EFI_PHYSICAL_ADDRESS                 BaseAddress,
  IN  UINT64                               Length,
  IN  UINT64                               Attributes
  );
 
EFI_STATUS
EFIAPI
EdkiiSmmGetMemoryAttributes (
  IN  EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL  *This,
  IN  EFI_PHYSICAL_ADDRESS                 BaseAddress,
  IN  UINT64                               Length,
  IN  UINT64                               *Attributes
  );
 
VOID
EFIAPI
PiSmmCpuSmiEntryFixupAddress (
  );
 
VOID
SaveCr2 (
  OUT UINTN  *Cr2
  );
 
VOID
RestoreCr2 (
  IN UINTN  Cr2
  );
 
EFI_STATUS
InternalSmmStartupThisAp (
  IN      EFI_AP_PROCEDURE2  Procedure,
  IN      UINTN              CpuIndex,
  IN OUT  VOID               *ProcArguments OPTIONAL,
  IN OUT  MM_COMPLETION      *Token,
  IN      UINTN              TimeoutInMicroseconds,
  IN OUT  EFI_STATUS         *CpuStatus
  );
 
BOOLEAN
IsTokenInUse (
  IN SPIN_LOCK  *Token
  );
 
EFI_STATUS
IsApReady (
  IN SPIN_LOCK  *Token
  );
 
BOOLEAN
IsPresentAp (
  IN UINTN  CpuIndex
  );
 
EFI_STATUS
InternalSmmStartupAllAPs (
  IN       EFI_AP_PROCEDURE2  Procedure,
  IN       UINTN              TimeoutInMicroseconds,
  IN OUT   VOID               *ProcedureArguments OPTIONAL,
  IN OUT   MM_COMPLETION      *Token,
  IN OUT   EFI_STATUS         *CPUStatus
  );
 
EFI_STATUS
RegisterStartupProcedure (
  IN     EFI_AP_PROCEDURE  Procedure,
  IN OUT VOID              *ProcedureArguments OPTIONAL
  );
 
VOID
InitPackageFirstThreadIndexInfo (
  VOID
  );
 
VOID
InitializeDataForMmMp (
  VOID
  );
 
BOOLEAN
IsRestrictedMemoryAccess (
  VOID
  );
 
EFI_STATUS
EFIAPI
SmmCpuRendezvous (
  IN  EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL  *This,
  IN  BOOLEAN                            BlockingMode
  );
 
VOID
SmmWaitForApArrival (
  VOID
  );
 
VOID
SmmWriteUnprotectReadOnlyPage (
  OUT BOOLEAN  *WriteProtect
  );
 
VOID
SmmWriteProtectReadOnlyPage (
  IN  BOOLEAN  WriteProtect
  );
 
#define WRITE_UNPROTECT_RO_PAGES(Wp, Cet) \
  do { \
    Cet = ((AsmReadCr4 () & CR4_CET_ENABLE) != 0); \
    if (Cet) { \
      DisableCet (); \
    } \
    SmmWriteUnprotectReadOnlyPage (&Wp); \
  } while (FALSE)
 
#define WRITE_PROTECT_RO_PAGES(Wp, Cet) \
  do { \
    SmmWriteProtectReadOnlyPage (Wp); \
    if (Cet) { \
      EnableCet (); \
    } \
  } while (FALSE)
 
UINTN
GetSupportedMaxLogicalProcessorNumber (
  VOID
  );
 
EFI_PROCESSOR_INFORMATION *
GetMpInformationFromMpServices (
  OUT UINTN  *NumberOfCpus,
  OUT UINTN  *MaxNumberOfCpus
  );
 
EFI_STATUS
PiSmmCpuEntryCommon (
  VOID
  );
 
#endif