TpmPtp.h

Go to the documentation of this file.

 
#ifndef _TPM_PTP_H_
#define _TPM_PTP_H_
 
//
// PTP FIFO definition
//
 
//
// Set structure alignment to 1-byte
//
#pragma pack (1)
 
//
// Register set map as specified in PTP specification Chapter 5
//
typedef struct {
  UINT8     Access;                                     // 0
  UINT8     Reserved1[7];                               // 1
  UINT32    IntEnable;                                  // 8
  UINT8     IntVector;                                  // 0ch
  UINT8     Reserved2[3];                               // 0dh
  UINT32    IntSts;                                     // 10h
  UINT32    InterfaceCapability;                        // 14h
  UINT8     Status;                                     // 18h
  UINT16    BurstCount;                                 // 19h
  UINT8     StatusEx;                                   // 1Bh
  UINT8     Reserved3[8];
  UINT32    DataFifo;                                   // 24h
  UINT8     Reserved4[8];                               // 28h
  UINT32    InterfaceId;                                // 30h
  UINT8     Reserved5[0x4c];                            // 34h
  UINT32    XDataFifo;                                  // 80h
  UINT8     Reserved6[0xe7c];                           // 84h
  UINT16    Vid;                                        // 0f00h
  UINT16    Did;                                        // 0f02h
  UINT8     Rid;                                        // 0f04h
  UINT8     Reserved[0xfb];                             // 0f05h
} PTP_FIFO_REGISTERS;
 
//
// Restore original structure alignment
//
#pragma pack ()
 
//
// Define pointer types used to access TIS registers on PC
//
typedef PTP_FIFO_REGISTERS *PTP_FIFO_REGISTERS_PTR;
 
//
// Define bits of FIFO Interface Identifier Register
//
typedef union {
  struct {
    UINT32    InterfaceType          : 4;
    UINT32    InterfaceVersion       : 4;
    UINT32    CapLocality            : 1;
    UINT32    Reserved1              : 2;
    UINT32    CapDataXferSizeSupport : 2;
    UINT32    CapFIFO                : 1;
    UINT32    CapCRB                 : 1;
    UINT32    CapIFRes               : 2;
    UINT32    InterfaceSelector      : 2;
    UINT32    IntfSelLock            : 1;
    UINT32    Reserved2              : 4;
    UINT32    Reserved3              : 8;
  } Bits;
  UINT32    Uint32;
} PTP_FIFO_INTERFACE_IDENTIFIER;
 
//
// Define bits of FIFO Interface Capability Register
//
typedef union {
  struct {
    UINT32    DataAvailIntSupport      : 1;
    UINT32    StsValidIntSupport       : 1;
    UINT32    LocalityChangeIntSupport : 1;
    UINT32    InterruptLevelHigh       : 1;
    UINT32    InterruptLevelLow        : 1;
    UINT32    InterruptEdgeRising      : 1;
    UINT32    InterruptEdgeFalling     : 1;
    UINT32    CommandReadyIntSupport   : 1;
    UINT32    BurstCountStatic         : 1;
    UINT32    DataTransferSizeSupport  : 2;
    UINT32    Reserved                 : 17;
    UINT32    InterfaceVersion         : 3;
    UINT32    Reserved2                : 1;
  } Bits;
  UINT32    Uint32;
} PTP_FIFO_INTERFACE_CAPABILITY;
 
#define INTERFACE_CAPABILITY_INTERFACE_VERSION_TIS_12  0x0
#define INTERFACE_CAPABILITY_INTERFACE_VERSION_TIS_13  0x2
#define INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP     0x3
 
//
// Define bits of ACCESS and STATUS registers
//
 
#define PTP_FIFO_VALID  BIT7
#define PTP_FIFO_ACC_ACTIVE  BIT5
#define PTP_FIFO_ACC_SEIZED  BIT4
#define PTP_FIFO_ACC_SEIZE  BIT3
#define PTP_FIFO_ACC_PENDIND  BIT2
#define PTP_FIFO_ACC_RQUUSE  BIT1
#define PTP_FIFO_ACC_ESTABLISH  BIT0
 
#define PTP_FIFO_STS_VALID  BIT7
#define PTP_FIFO_STS_READY  BIT6
#define PTP_FIFO_STS_GO  BIT5
#define PTP_FIFO_STS_DATA  BIT4
#define PTP_FIFO_STS_EXPECT  BIT3
#define PTP_FIFO_STS_SELFTEST_DONE  BIT2
#define PTP_FIFO_STS_RETRY  BIT1
 
#define PTP_FIFO_STS_EX_TPM_FAMILY         (BIT2 | BIT3)
#define PTP_FIFO_STS_EX_TPM_FAMILY_OFFSET  (2)
#define PTP_FIFO_STS_EX_TPM_FAMILY_TPM12   (0)
#define PTP_FIFO_STS_EX_TPM_FAMILY_TPM20   (BIT2)
#define PTP_FIFO_STS_EX_CANCEL  BIT0
 
//
// PTP CRB definition
//
 
//
// Set structure alignment to 1-byte
//
#pragma pack (1)
 
//
// Register set map as specified in PTP specification Chapter 5
//
typedef struct {
  UINT32    LocalityState;                                     // 0
  UINT8     Reserved1[4];                                      // 4
  UINT32    LocalityControl;                                   // 8
  UINT32    LocalityStatus;                                    // 0ch
  UINT8     Reserved2[0x20];                                   // 10h
  UINT32    InterfaceId;                                       // 30h
  UINT16    Vid;                                               // 34h
  UINT16    Did;                                               // 36h
  UINT64    CrbControlExtension;                               // 38h
  UINT32    CrbControlRequest;                                 // 40h
  UINT32    CrbControlStatus;                                  // 44h
  UINT32    CrbControlCancel;                                  // 48h
  UINT32    CrbControlStart;                                   // 4Ch
  UINT32    CrbInterruptEnable;                                // 50h
  UINT32    CrbInterruptStatus;                                // 54h
  UINT32    CrbControlCommandSize;                             // 58h
  UINT32    CrbControlCommandAddressLow;                           // 5Ch
  UINT32    CrbControlCommandAddressHigh;                          // 60h
  UINT32    CrbControlResponseSize;                            // 64h
  UINT64    CrbControlResponseAddrss;                          // 68h
  UINT8     Reserved4[0x10];                                   // 70h
  UINT8     CrbDataBuffer[0xF80];                              // 80h
} PTP_CRB_REGISTERS;
 
//
// Define pointer types used to access CRB registers on PTP
//
typedef PTP_CRB_REGISTERS *PTP_CRB_REGISTERS_PTR;
 
//
// Define bits of CRB Interface Identifier Register
//
typedef union {
  struct {
    UINT32    InterfaceType          : 4;
    UINT32    InterfaceVersion       : 4;
    UINT32    CapLocality            : 1;
    UINT32    CapCRBIdleBypass       : 1;
    UINT32    Reserved1              : 1;
    UINT32    CapDataXferSizeSupport : 2;
    UINT32    CapFIFO                : 1;
    UINT32    CapCRB                 : 1;
    UINT32    CapIFRes               : 2;
    UINT32    InterfaceSelector      : 2;
    UINT32    IntfSelLock            : 1;
    UINT32    Reserved2              : 4;
    UINT32    Rid                    : 8;
  } Bits;
  UINT32    Uint32;
} PTP_CRB_INTERFACE_IDENTIFIER;
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO  0x0
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB   0x1
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_TIS   0xF
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO  0x0
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB   0x1
 
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_FIFO  0x0
#define PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_CRB   0x1
 
//
// Define bits of Locality State Register
//
 
#define PTP_CRB_LOCALITY_STATE_TPM_REG_VALID_STATUS  BIT7
 
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_MASK  (BIT2 | BIT3 | BIT4)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_0     (0)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_1     (BIT2)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_2     (BIT3)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_3     (BIT2 | BIT3)
#define PTP_CRB_LOCALITY_STATE_ACTIVE_LOCALITY_4     (BIT4)
 
#define PTP_CRB_LOCALITY_STATE_LOCALITY_ASSIGNED  BIT1
 
#define PTP_CRB_LOCALITY_STATE_TPM_ESTABLISHED  BIT0
 
//
// Define bits of Locality Control Register
//
 
#define PTP_CRB_LOCALITY_CONTROL_RESET_ESTABLISHMENT_BIT  BIT3
 
#define PTP_CRB_LOCALITY_CONTROL_SEIZE  BIT2
 
#define PTP_CRB_LOCALITY_CONTROL_RELINQUISH  BIT1
 
#define PTP_CRB_LOCALITY_CONTROL_REQUEST_ACCESS  BIT0
 
//
// Define bits of Locality Status Register
//
 
#define PTP_CRB_LOCALITY_STATUS_BEEN_SEIZED  BIT1
 
#define PTP_CRB_LOCALITY_STATUS_GRANTED  BIT0
 
//
// Define bits of CRB Control Area Request Register
//
 
#define PTP_CRB_CONTROL_AREA_REQUEST_GO_IDLE  BIT1
 
#define PTP_CRB_CONTROL_AREA_REQUEST_COMMAND_READY  BIT0
 
//
// Define bits of CRB Control Area Status Register
//
 
#define PTP_CRB_CONTROL_AREA_STATUS_TPM_IDLE  BIT1
 
#define PTP_CRB_CONTROL_AREA_STATUS_TPM_STATUS  BIT0
 
//
// Define bits of CRB Control Cancel Register
//
 
#define PTP_CRB_CONTROL_CANCEL  BIT0
 
//
// Define bits of CRB Control Start Register
//
 
#define PTP_CRB_CONTROL_START  BIT0
 
//
// Restore original structure alignment
//
#pragma pack ()
 
//
// Default TimeOut value
//
#define PTP_TIMEOUT_A  (750 * 1000)                // 750ms
#define PTP_TIMEOUT_B  (2000 * 1000)               // 2s
#define PTP_TIMEOUT_C  (200 * 1000)                // 200ms
#define PTP_TIMEOUT_D  (30 * 1000)                 // 30ms
 
#endif