TianoCore EDK2 master
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Go to the source code of this file.
Data Structures | |
struct | TIS_PC_REGISTERS |
Macros | |
#define | TIS_PC_VALID BIT7 |
#define | TIS_PC_ACC_ACTIVE BIT5 |
#define | TIS_PC_ACC_SEIZED BIT4 |
#define | TIS_PC_ACC_SEIZE BIT3 |
#define | TIS_PC_ACC_PENDIND BIT2 |
#define | TIS_PC_ACC_RQUUSE BIT1 |
#define | TIS_PC_ACC_ESTABLISH BIT0 |
#define | TIS_PC_STS_CANCEL BIT24 |
#define | TIS_PC_STS_VALID BIT7 |
#define | TIS_PC_STS_READY BIT6 |
#define | TIS_PC_STS_GO BIT5 |
#define | TIS_PC_STS_DATA BIT4 |
#define | TIS_PC_STS_EXPECT BIT3 |
#define | TIS_PC_STS_SELFTEST_DONE BIT2 |
#define | TIS_PC_STS_RETRY BIT1 |
#define | TIS_TIMEOUT_A (750 * 1000) |
#define | TIS_TIMEOUT_B (2000 * 1000) |
#define | TIS_TIMEOUT_C (750 * 1000) |
#define | TIS_TIMEOUT_D (750 * 1000) |
Typedefs | |
typedef TIS_PC_REGISTERS * | TIS_PC_REGISTERS_PTR |
TPM Interface Specification definition. It covers both TPM1.2 and TPM2.0.
Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file TpmTis.h.
#define TIS_PC_ACC_ACTIVE BIT5 |
#define TIS_PC_ACC_ESTABLISH BIT0 |
#define TIS_PC_ACC_PENDIND BIT2 |
#define TIS_PC_ACC_RQUUSE BIT1 |
#define TIS_PC_ACC_SEIZE BIT3 |
#define TIS_PC_ACC_SEIZED BIT4 |
#define TIS_PC_STS_CANCEL BIT24 |
#define TIS_PC_STS_DATA BIT4 |
#define TIS_PC_STS_EXPECT BIT3 |
#define TIS_PC_STS_GO BIT5 |
#define TIS_PC_STS_READY BIT6 |
#define TIS_PC_STS_RETRY BIT1 |
#define TIS_PC_STS_SELFTEST_DONE BIT2 |
#define TIS_PC_STS_VALID BIT7 |
#define TIS_PC_VALID BIT7 |
typedef TIS_PC_REGISTERS* TIS_PC_REGISTERS_PTR |