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X86_BuildFdtLib.c
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1
6#include <PiPei.h>
7#include <IndustryStandard/Pci22.h>
8#include <Library/BaseLib.h>
9#include <Library/BaseMemoryLib.h>
10#include <Library/MemoryAllocationLib.h>
11#include <Library/DebugLib.h>
12#include <Library/HobLib.h>
13#include <Library/PcdLib.h>
14#include <Library/IoLib.h>
15#include <Library/PrintLib.h>
16#include <Library/FdtLib.h>
17#include <Library/PciLib.h>
18#include <Library/PeiServicesLib.h>
19#include <UniversalPayload/UniversalPayload.h>
20#include <UniversalPayload/AcpiTable.h>
21#include <UniversalPayload/SerialPortInfo.h>
22#include <UniversalPayload/SmbiosTable.h>
23#include <UniversalPayload/PciRootBridges.h>
24#include <Guid/GraphicsInfoHob.h>
25#include <Guid/UniversalPayloadSerialPortDeviceParentInfo.h>
26#include <Guid/UniversalPayloadBase.h>
27#include <Protocol/PciRootBridgeIo.h>
28#include <Ppi/PciDevice.h>
29
30#define IGD_BUS_NUM 0x00
31#define IGD_DEV_NUM 0x02
32#define IGD_FUN_NUM 0x00
33
34EDKII_PCI_DEVICE_PPI *mPciDevicePpi;
35BOOLEAN mResourceAssigned;
36
37CHAR8 *mMemoryAllocType[] = {
38 "Reserved",
39 "LoaderCode",
40 "LoaderData",
41 "boot-code",
42 "boot-data",
43 "runtime-code",
44 "runtime-data",
45 "ConventionalMemory",
46 "UnusableMemory",
47 "acpi",
48 "acpi-nvs",
49 "mmio",
50 "MemoryMappedIOPortSpace",
51 "PalCode",
52 "PersistentMemory",
53};
54
61EFI_STATUS
62EFIAPI
63LocatePciDevicePpi (
64 VOID
65 )
66{
67 EFI_STATUS Status;
68 EFI_PEI_PPI_DESCRIPTOR *PpiDescriptor;
69
70 mPciDevicePpi = NULL;
71 Status = PeiServicesLocatePpi (
72 &gEdkiiPeiPciDevicePpiGuid,
73 0,
74 &PpiDescriptor,
75 (void **)&mPciDevicePpi
76 );
77 if (EFI_ERROR (Status) || (mPciDevicePpi == NULL)) {
78 return EFI_NOT_FOUND;
79 }
80
81 return EFI_SUCCESS;
82}
83
90EFI_STATUS
91BuildFdtForMemory (
92 IN VOID *FdtBase
93 )
94{
95 EFI_STATUS Status;
96 EFI_PEI_HOB_POINTERS Hob;
97 EFI_HOB_RESOURCE_DESCRIPTOR *ResourceHob;
98 VOID *HobStart;
99 VOID *Fdt;
100 INT32 TempNode;
101 CHAR8 TempStr[32];
102 UINT64 RegTmp[2];
103
104 Fdt = FdtBase;
105
106 HobStart = GetFirstHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR);
107 //
108 // Scan resource descriptor hobs to set memory nodes
109 //
110 for (Hob.Raw = HobStart; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
111 if (GET_HOB_TYPE (Hob) == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
112 ResourceHob = Hob.ResourceDescriptor;
113 // Memory
114 if (ResourceHob->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) {
115 // DEBUG ((DEBUG_ERROR, "Found hob for memory: base %016lX length %016lX\n", ResourceHob->PhysicalStart, ResourceHob->ResourceLength));
116
117 Status = AsciiSPrint (TempStr, sizeof (TempStr), "memory@%lX", ResourceHob->PhysicalStart);
118 TempNode = FdtAddSubnode (Fdt, 0, TempStr);
119 ASSERT (TempNode > 0);
120
121 RegTmp[0] = CpuToFdt64 (ResourceHob->PhysicalStart);
122 RegTmp[1] = CpuToFdt64 (ResourceHob->ResourceLength);
123 Status = FdtSetProperty (Fdt, TempNode, "reg", &RegTmp, sizeof (RegTmp));
124 ASSERT_EFI_ERROR (Status);
125
126 Status = FdtSetProperty (Fdt, TempNode, "device_type", "memory", (UINT32)(AsciiStrLen ("memory")+1));
127 ASSERT_EFI_ERROR (Status);
128 }
129 }
130 }
131
132 return Status;
133}
134
141EFI_STATUS
142BuildFdtForMemAlloc (
143 IN VOID *FdtBase
144 )
145{
146 EFI_STATUS Status;
147 EFI_PEI_HOB_POINTERS Hob;
148 VOID *HobStart;
149 VOID *Fdt;
150 INT32 ParentNode;
151 INT32 TempNode;
152 CHAR8 TempStr[32];
153 UINT64 RegTmp[2];
154 UINT32 AllocMemType;
155 EFI_GUID *AllocMemName;
156 UINT8 IsStackHob;
157 UINT8 IsBspStore;
158 UINT32 Data32;
159 UNIVERSAL_PAYLOAD_SMBIOS_TABLE *SmbiosTable;
160 UNIVERSAL_PAYLOAD_ACPI_TABLE *AcpiTable;
161 EFI_HOB_GUID_TYPE *GuidHob;
162
163 Fdt = FdtBase;
164
165 ParentNode = FdtAddSubnode (Fdt, 0, "reserved-memory");
166 ASSERT (ParentNode > 0);
167
168 Data32 = CpuToFdt32 (2);
169 Status = FdtSetProperty (Fdt, ParentNode, "#address-cells", &Data32, sizeof (UINT32));
170 Status = FdtSetProperty (Fdt, ParentNode, "#size-cells", &Data32, sizeof (UINT32));
171
172 GuidHob = NULL;
173 SmbiosTable = NULL;
174 GuidHob = GetFirstGuidHob (&gUniversalPayloadSmbios3TableGuid);
175 if (GuidHob != NULL) {
176 SmbiosTable = GET_GUID_HOB_DATA (GuidHob);
177 DEBUG ((DEBUG_INFO, "To build Smbios memory FDT ,SmbiosTable :%lx, SmBiosEntryPoint :%lx\n", (UINTN)SmbiosTable, SmbiosTable->SmBiosEntryPoint));
178 Status = AsciiSPrint (TempStr, sizeof (TempStr), "memory@%lX", SmbiosTable->SmBiosEntryPoint);
179 DEBUG ((DEBUG_INFO, "To build Smbios memory FDT #2, SmbiosTable->Header.Length :%x\n", SmbiosTable->Header.Length));
180 TempNode = 0;
181 TempNode = FdtAddSubnode (Fdt, ParentNode, TempStr);
182 DEBUG ((DEBUG_INFO, "FdtAddSubnode %x", TempNode));
183 RegTmp[0] = CpuToFdt64 (SmbiosTable->SmBiosEntryPoint);
184 RegTmp[1] = CpuToFdt64 (SmbiosTable->Header.Length);
185 FdtSetProperty (Fdt, TempNode, "reg", &RegTmp, sizeof (RegTmp));
186 ASSERT_EFI_ERROR (Status);
187 FdtSetProperty (Fdt, TempNode, "compatible", "smbios", (UINT32)(AsciiStrLen ("smbios")+1));
188 ASSERT_EFI_ERROR (Status);
189 }
190
191 GuidHob = GetFirstGuidHob (&gUniversalPayloadAcpiTableGuid);
192 if (GuidHob != NULL) {
193 AcpiTable = (UNIVERSAL_PAYLOAD_ACPI_TABLE *)GET_GUID_HOB_DATA (GuidHob);
194 }
195
196 HobStart = GetFirstHob (EFI_HOB_TYPE_MEMORY_ALLOCATION);
197 //
198 // Scan memory allocation hobs to set memory type
199 //
200 for (Hob.Raw = HobStart; !END_OF_HOB_LIST (Hob); Hob.Raw = GET_NEXT_HOB (Hob)) {
201 if (GET_HOB_TYPE (Hob) == EFI_HOB_TYPE_MEMORY_ALLOCATION) {
202 AllocMemName = NULL;
203 IsStackHob = 0;
204 IsBspStore = 0;
205 if (CompareGuid (&(Hob.MemoryAllocationModule->MemoryAllocationHeader.Name), &gEfiHobMemoryAllocModuleGuid)) {
206 continue;
207 } else if (IsZeroGuid (&(Hob.MemoryAllocationModule->MemoryAllocationHeader.Name)) == FALSE) {
208 AllocMemName = &(Hob.MemoryAllocationModule->MemoryAllocationHeader.Name);
209
210 if (CompareGuid (AllocMemName, &gEfiHobMemoryAllocStackGuid)) {
211 IsStackHob = 1;
212 } else if (CompareGuid (AllocMemName, &gEfiHobMemoryAllocBspStoreGuid)) {
213 IsBspStore = 1;
214 }
215 }
216
217 DEBUG ((
218 DEBUG_ERROR,
219 "Found hob for rsvd memory alloc: base %016lX length %016lX type %x\n",
220 Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress,
221 Hob.MemoryAllocation->AllocDescriptor.MemoryLength,
222 Hob.MemoryAllocation->AllocDescriptor.MemoryType
223 ));
224
225 AllocMemType = Hob.MemoryAllocation->AllocDescriptor.MemoryType;
226 if (IsStackHob == 1) {
227 Status = AsciiSPrint (
228 TempStr,
229 sizeof (TempStr),
230 "%a@%lX",
231 "stackhob",
232 Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress
233 );
234 } else if (IsBspStore == 1) {
235 Status = AsciiSPrint (
236 TempStr,
237 sizeof (TempStr),
238 "%a@%lX",
239 "bspstore",
240 Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress
241 );
242 } else {
243 Status = AsciiSPrint (
244 TempStr,
245 sizeof (TempStr),
246 "%a@%lX",
247 mMemoryAllocType[AllocMemType],
248 Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress
249 );
250 }
251
252 if (AsciiStrCmp (mMemoryAllocType[AllocMemType], "ConventionalMemory") == 0) {
253 continue;
254 }
255
256 if (AsciiStrCmp (mMemoryAllocType[AllocMemType], "mmio") == 0) {
257 Status = AsciiSPrint (TempStr, sizeof (TempStr), "mmio@%lX", Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress);
258 } else {
259 Status = AsciiSPrint (TempStr, sizeof (TempStr), "memory@%lX", Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress);
260 }
261
262 TempNode = FdtAddSubnode (Fdt, ParentNode, TempStr);
263 DEBUG ((DEBUG_INFO, "FdtAddSubnode %x", TempNode));
264 if (TempNode < 0) {
265 continue;
266 }
267
268 RegTmp[0] = CpuToFdt64 (Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress);
269 RegTmp[1] = CpuToFdt64 (Hob.MemoryAllocation->AllocDescriptor.MemoryLength);
270 Status = FdtSetProperty (Fdt, TempNode, "reg", &RegTmp, sizeof (RegTmp));
271 ASSERT_EFI_ERROR (Status);
272
273 if ((AsciiStrCmp (mMemoryAllocType[AllocMemType], "mmio") == 0)) {
274 continue;
275 }
276
277 if (!(AsciiStrCmp (mMemoryAllocType[AllocMemType], "acpi-nvs") == 0) && (AsciiStrCmp (mMemoryAllocType[AllocMemType], "acpi") == 0)) {
278 DEBUG ((DEBUG_INFO, "find acpi memory hob MemoryBaseAddress:%x , AcpiTable->Rsdp :%x\n", Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress, AcpiTable->Rsdp));
279 if (Hob.MemoryAllocation->AllocDescriptor.MemoryBaseAddress == AcpiTable->Rsdp) {
280 DEBUG ((DEBUG_INFO, "keep acpi memory hob \n"));
281 Status = FdtSetProperty (Fdt, TempNode, "compatible", mMemoryAllocType[AllocMemType], (UINT32)(AsciiStrLen (mMemoryAllocType[AllocMemType])+1));
282 ASSERT_EFI_ERROR (Status);
283 } else {
284 DEBUG ((DEBUG_INFO, "change acpi memory hob \n"));
285 Status = FdtSetProperty (Fdt, TempNode, "compatible", mMemoryAllocType[4], (UINT32)(AsciiStrLen (mMemoryAllocType[4])+1));
286 ASSERT_EFI_ERROR (Status);
287 }
288 } else {
289 DEBUG ((DEBUG_INFO, "other memory hob \n"));
290 Status = FdtSetProperty (Fdt, TempNode, "compatible", mMemoryAllocType[AllocMemType], (UINT32)(AsciiStrLen (mMemoryAllocType[AllocMemType])+1));
291 ASSERT_EFI_ERROR (Status);
292 }
293 }
294 }
295
296 return Status;
297}
298
306EFI_STATUS
307BuildFdtForSerial (
308 IN INT32 ISANode,
309 IN VOID *FdtBase
310 )
311{
312 EFI_STATUS Status;
313 VOID *Fdt;
314 INT32 TempNode;
315 UINT64 RegisterBase;
316 CHAR8 TempStr[32];
317 UINT32 RegData[3];
318 UINT32 Data32;
319 UINT64 Data64;
320
321 Fdt = FdtBase;
322 RegisterBase = 0;
323
324 //
325 // Create SerialPortInfo FDT node.
326 //
327 Status = AsciiSPrint (TempStr, sizeof (TempStr), "serial@%lX", (RegisterBase == 0) ? PcdGet64 (PcdSerialRegisterBase) : RegisterBase);
328 TempNode = FdtAddSubnode (Fdt, ISANode, TempStr);
329 ASSERT (TempNode > 0);
330
331 Data32 = CpuToFdt32 (PcdGet32 (PcdSerialBaudRate));
332 Status = FdtSetProperty (Fdt, TempNode, "current-speed", &Data32, sizeof (Data32));
333 ASSERT_EFI_ERROR (Status);
334
335 if (PcdGetBool (PcdSerialUseMmio)) {
336 Data32 = 0;
337 RegData[0] = CpuToFdt32 (Data32);
338 } else {
339 Data32 = 1;
340 RegData[0] = CpuToFdt32 (Data32);
341 }
342
343 Data64 = (RegisterBase == 0) ? PcdGet64 (PcdSerialRegisterBase) : RegisterBase;
344 Data32 = (UINT32)((Data64 & 0x0FFFFFFFF));
345 RegData[1] = CpuToFdt32 (Data32);
346 RegData[2] = CpuToFdt32 (8);
347 Status = FdtSetProperty (Fdt, TempNode, "reg", &RegData, sizeof (RegData));
348 ASSERT_EFI_ERROR (Status);
349
350 Data32 = CpuToFdt32 (1);
351 Status = FdtSetProperty (Fdt, TempNode, "reg-io-width", &Data32, sizeof (Data32));
352 ASSERT_EFI_ERROR (Status);
353
354 Status = FdtSetProperty (Fdt, TempNode, "compatible", "isa", (UINT32)(AsciiStrLen ("isa")+1));
355 ASSERT_EFI_ERROR (Status);
356
357 return Status;
358}
359
368EFI_STATUS
369BuildFdtForSerialLpss (
370 IN INT32 ISANode,
371 IN VOID *FdtBase
372 )
373{
374 EFI_HOB_GUID_TYPE *GuidHob;
375 EFI_STATUS Status;
376 UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo;
377 VOID *Fdt;
378 INT32 TempNode;
379 UINT32 Data32;
380 UINT32 RegData[2];
381 CHAR8 TempStr[32];
382
383 Status = EFI_SUCCESS;
384 SerialPortInfo = NULL;
385 Fdt = FdtBase;
386
387 DEBUG ((DEBUG_INFO, "BuildFdtForSerialLpss start \n"));
388 GuidHob = GetFirstGuidHob (&gUniversalPayloadSerialPortInfoGuid);
389 while (GuidHob != NULL) {
390 SerialPortInfo = (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *)GET_GUID_HOB_DATA (GuidHob);
391
392 if (!SerialPortInfo->UseMmio) {
393 GuidHob = GET_NEXT_HOB (GuidHob);
394 GuidHob = GetNextGuidHob (&gUniversalPayloadSerialPortInfoGuid, GuidHob);
395 continue;
396 }
397
398 DEBUG ((DEBUG_INFO, "Create SerialPortInfo LPSS FDT node \n"));
399 //
400 // Create SerialPortInfo FDT node.
401 //
402 Status = AsciiSPrint (TempStr, sizeof (TempStr), "serial@%lX", SerialPortInfo->RegisterBase);
403 TempNode = FdtAddSubnode (Fdt, ISANode, TempStr);
404 ASSERT (TempNode > 0);
405
406 Data32 = CpuToFdt32 (SerialPortInfo->BaudRate);
407 Status = FdtSetProperty (Fdt, TempNode, "current-speed", &Data32, sizeof (Data32));
408 ASSERT_EFI_ERROR (Status);
409
410 RegData[0] = CpuToFdt32 ((UINT32)SerialPortInfo->RegisterBase);
411 RegData[1] = CpuToFdt32 (0x80);
412 Status = FdtSetProperty (Fdt, TempNode, "reg", &RegData, sizeof (RegData));
413 ASSERT_EFI_ERROR (Status);
414
415 Data32 = CpuToFdt32 (4);
416 Status = FdtSetProperty (Fdt, TempNode, "reg-io-width", &Data32, sizeof (Data32));
417 ASSERT_EFI_ERROR (Status);
418
419 Status = FdtSetProperty (Fdt, TempNode, "compatible", "ns16550a", (UINT32)(AsciiStrLen ("ns16550a")+1));
420 ASSERT_EFI_ERROR (Status);
421
422 GuidHob = GET_NEXT_HOB (GuidHob);
423 GuidHob = GetNextGuidHob (&gUniversalPayloadSerialPortInfoGuid, GuidHob);
424 }
425
426 return Status;
427}
428
435EFI_STATUS
436BuildFdtForPciRootBridge (
437 IN VOID *FdtBase
438 )
439{
440 EFI_STATUS Status;
441 VOID *Fdt;
442 INT32 TempNode;
443 INT32 GmaNode;
444 INT32 eSPINode;
445 CHAR8 TempStr[32];
446 CHAR8 GmaStr[32];
447 CHAR8 eSPIStr[32];
448 UINT32 RegTmp[2];
449 UINT32 RegData[21];
450 UINT32 DMARegData[8];
451 UINT64 Reg64Data[2];
452 UINT32 Data32;
453 UINT64 Data64;
454 UINT8 BusNumber;
455 UINT8 BusLimit;
456 UINT8 BusBase;
457 UINT8 DevBase;
458 UINT8 FunBase;
459 EFI_HOB_GUID_TYPE *GuidHob;
460 UNIVERSAL_PAYLOAD_GENERIC_HEADER *GenericHeader;
461 UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo;
462 UINT8 Index;
463 PCI_TYPE00 PciData;
464 UNIVERSAL_PAYLOAD_SERIAL_PORT_PARENT_DEVICE_INFO *SerialParent;
465
466 Fdt = FdtBase;
467 BusNumber = 0;
468 BusLimit = 0;
469 BusBase = 0x80;
470 DevBase = 0x31;
471 FunBase = 0;
472 Status = EFI_SUCCESS;
473 PciRootBridgeInfo = NULL;
474
475 DEBUG ((DEBUG_INFO, "%a: #1 \n", __func__));
476 //
477 // Create BuildFdtForPciRootBridge FDT node.
478 //
479
480 GuidHob = GetFirstGuidHob (&gUniversalPayloadPciRootBridgeInfoGuid);
481 if (GuidHob != NULL) {
482 GenericHeader = (UNIVERSAL_PAYLOAD_GENERIC_HEADER *)GET_GUID_HOB_DATA (GuidHob);
483 if ((sizeof (UNIVERSAL_PAYLOAD_GENERIC_HEADER) <= GET_GUID_HOB_DATA_SIZE (GuidHob)) && (GenericHeader->Length <= GET_GUID_HOB_DATA_SIZE (GuidHob))) {
484 if ((GenericHeader->Revision == UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION) && (GenericHeader->Length >= sizeof (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES))) {
485 DEBUG ((DEBUG_INFO, "%a: #2 \n", __func__));
486
487 //
488 // UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES structure is used when Revision equals to UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION
489 //
490 PciRootBridgeInfo = (UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *)GET_GUID_HOB_DATA (GuidHob);
491 }
492 }
493 }
494
495 GuidHob = GetFirstGuidHob (&gUniversalPayloadSerialPortParentDeviceInfoGuid);
496 if (GuidHob != NULL) {
497 SerialParent = (UNIVERSAL_PAYLOAD_SERIAL_PORT_PARENT_DEVICE_INFO *)GET_GUID_HOB_DATA (GuidHob);
498 BusBase = (SerialParent->ParentDevicePcieBaseAddress >> 20) & 0xFF;
499 DevBase = (SerialParent->ParentDevicePcieBaseAddress >> 15) & 0x1F;
500 FunBase = (SerialParent->ParentDevicePcieBaseAddress >> 12) & 0x07;
501 }
502
503 DEBUG ((DEBUG_INFO, "PciRootBridgeInfo->Count %x\n", PciRootBridgeInfo->Count));
504 DEBUG ((DEBUG_INFO, "PciRootBridge->Segment %x, \n", PciRootBridgeInfo->RootBridge[0].Segment));
505
506 DEBUG ((DEBUG_INFO, "PciRootBridge->Bus.Base %x, \n", PciRootBridgeInfo->RootBridge[0].Bus.Base));
507 DEBUG ((DEBUG_INFO, "PciRootBridge->Bus.limit %x, \n", PciRootBridgeInfo->RootBridge[0].Bus.Limit));
508
509 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.Base %x, \n", PciRootBridgeInfo->RootBridge[0].Mem.Base));
510 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.limit %x, \n", PciRootBridgeInfo->RootBridge[0].Mem.Limit));
511
512 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.Base %llx, \n", PciRootBridgeInfo->RootBridge[0].MemAbove4G.Base));
513 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.limit %llx, \n", PciRootBridgeInfo->RootBridge[0].MemAbove4G.Limit));
514
515 DEBUG ((DEBUG_INFO, "PciRootBridge->PMem.Base %llx, \n", PciRootBridgeInfo->RootBridge[0].PMem.Base));
516 DEBUG ((DEBUG_INFO, "PciRootBridge->PMem.limit %llx, \n", PciRootBridgeInfo->RootBridge[0].PMem.Limit));
517
518 DEBUG ((DEBUG_INFO, "PciRootBridge->Bus.Base %x, \n", PciRootBridgeInfo->RootBridge[1].Bus.Base));
519 DEBUG ((DEBUG_INFO, "PciRootBridge->Bus.limit %x, \n", PciRootBridgeInfo->RootBridge[1].Bus.Limit));
520
521 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.Base %x, \n", PciRootBridgeInfo->RootBridge[1].Mem.Base));
522 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.limit %x, \n", PciRootBridgeInfo->RootBridge[1].Mem.Limit));
523
524 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.Base %llx, \n", PciRootBridgeInfo->RootBridge[1].MemAbove4G.Base));
525 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.limit %llx, \n", PciRootBridgeInfo->RootBridge[1].MemAbove4G.Limit));
526
527 DEBUG ((DEBUG_INFO, "PciRootBridge->PMem.Base %x, \n", PciRootBridgeInfo->RootBridge[1].PMem.Base));
528 DEBUG ((DEBUG_INFO, "PciRootBridge->PMem.limit %x, \n", PciRootBridgeInfo->RootBridge[1].PMem.Limit));
529
530 if (PciRootBridgeInfo != NULL) {
531 for (Index = 0; Index < PciRootBridgeInfo->Count; Index++) {
532 UINTN PciExpressBaseAddress;
533
534 mResourceAssigned = PciRootBridgeInfo->ResourceAssigned;
535 PciExpressBaseAddress = PcdGet64 (PcdPciExpressBaseAddress) + (PCI_LIB_ADDRESS (PciRootBridgeInfo->RootBridge[Index].Bus.Base, 0, 0, 0));
536 Status = AsciiSPrint (TempStr, sizeof (TempStr), "pci-rb%d@%lX", Index, PciExpressBaseAddress);
537 TempNode = FdtAddSubnode (Fdt, 0, TempStr);
538 ASSERT (TempNode > 0);
539 SetMem (RegData, sizeof (RegData), 0);
540
541 // non-reloc/non-prefetch/mmio, child-addr, parent-addr, length
542 Data32 = (N_NON_RELOCATABLE + SS_32BIT_MEMORY_SPACE);
543 RegData[0] = CpuToFdt32 (Data32);
544 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.Base RegData[0] %x, \n", Data32));
545
546 // child-addr
547 RegData[1] = CpuToFdt32 (0);
548 Data32 = (UINT32)PciRootBridgeInfo->RootBridge[Index].Mem.Base;
549 RegData[2] = CpuToFdt32 (Data32);
550 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.Base RegData[2] %x, \n", Data32));
551
552 // parent-addr
553 RegData[3] = CpuToFdt32 (0);
554 RegData[4] = CpuToFdt32 (Data32);
555 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.Base RegData[4] %x, \n", Data32));
556
557 // size
558 Data64 = (PciRootBridgeInfo->RootBridge[Index].Mem.Limit - PciRootBridgeInfo->RootBridge[Index].Mem.Base + 1);
559 if (Data64 & 0xFFFFFFFF00000000) {
560 Data32 = (UINT32)RShiftU64 ((Data64 & 0xFFFFFFFF00000000), 31);
561 } else {
562 Data32 = 0;
563 }
564
565 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.size RegData[5] %x, \n", Data32));
566 RegData[5] = CpuToFdt32 (Data32);
567 Data32 = (UINT32)((Data64 & 0x0FFFFFFFF));
568 DEBUG ((DEBUG_INFO, "PciRootBridge->Mem.size RegData[6] %x, \n", Data32));
569
570 RegData[6] = CpuToFdt32 (Data32);
571
572 // non-reloc/non-prefetch/64 mmio, child-addr, parent-addr, length
573 Data32 = (N_NON_RELOCATABLE + SS_64BIT_MEMORY_SPACE);
574 RegData[7] = CpuToFdt32 (Data32);
575 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.Base RegData[7] %x, \n", Data32));
576
577 // child-addr
578 Data64 = PciRootBridgeInfo->RootBridge[Index].MemAbove4G.Base;
579 Data32 = (UINT32)RShiftU64 ((Data64 & 0xFFFFFFFF00000000), 32);
580
581 RegData[8] = CpuToFdt32 (Data32);
582 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.Base RegData[8] %x, \n", Data32));
583 Data32 = (UINT32)((Data64 & 0x0FFFFFFFF));
584 RegData[9] = CpuToFdt32 (Data32);
585 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.Base RegData[9] %x, \n", Data32));
586
587 // parent-addr
588 RegData[10] = RegData[8];
589 RegData[11] = RegData[9];
590
591 // size
592 Data64 = (PciRootBridgeInfo->RootBridge[Index].MemAbove4G.Limit - PciRootBridgeInfo->RootBridge[Index].MemAbove4G.Base + 1);
593 if (Data64 & 0xFFFFFFFF00000000) {
594 Data32 = (UINT32)RShiftU64 ((Data64 & 0xFFFFFFFF00000000), 32);
595 } else {
596 Data32 = 0;
597 }
598
599 RegData[12] = CpuToFdt32 (Data32);
600 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.size RegData[12] %x, \n", Data32));
601
602 Data32 = (UINT32)((Data64 & 0x0FFFFFFFF));
603 RegData[13] = CpuToFdt32 (Data32);
604 DEBUG ((DEBUG_INFO, "PciRootBridge->MemAbove4G.size RegData[13] %x, \n", Data32));
605
606 // non-reloc/32bit/io, child-addr, parent-addr, length
607 Data32 = (N_NON_RELOCATABLE + SS_IO_SPACE);
608
609 RegData[14] = CpuToFdt32 (Data32);
610 DEBUG ((DEBUG_INFO, "PciRootBridge->Io.base RegData[14] %x, \n", Data32));
611
612 Data32 = (UINT32)PciRootBridgeInfo->RootBridge[Index].Io.Base;
613 // child-addr
614 RegData[15] = CpuToFdt32 (0);
615 RegData[16] = CpuToFdt32 (Data32);
616 DEBUG ((DEBUG_INFO, "PciRootBridge->Io.base RegData[16] %x, \n", Data32));
617
618 // parent-addr
619 RegData[17] = CpuToFdt32 (0);
620 RegData[18] = CpuToFdt32 (Data32);
621 // size
622 Data64 = (PciRootBridgeInfo->RootBridge[Index].Io.Limit - PciRootBridgeInfo->RootBridge[Index].Io.Base + 1);
623 if (Data64 & 0xFFFFFFFF00000000) {
624 Data32 = (UINT32)RShiftU64 ((Data64 & 0xFFFFFFFF00000000), 32);
625 } else {
626 Data32 = 0;
627 }
628
629 RegData[19] = CpuToFdt32 (Data32);
630 DEBUG ((DEBUG_INFO, "PciRootBridge->Io.base size [19] %x, \n", Data32));
631
632 Data32 = (UINT32)((Data64 & 0x0FFFFFFFF));
633 RegData[20] = CpuToFdt32 (Data32);
634 DEBUG ((DEBUG_INFO, "PciRootBridge->Io.base size [20] %x, \n", Data32));
635
636 Status = FdtSetProperty (Fdt, TempNode, "ranges", &RegData, sizeof (RegData));
637 ASSERT_EFI_ERROR (Status);
638
639 // non-reloc/non-prefetch/memory, child-addr, parent-addr, length
640 // indicate rb1 does not support above 4GB DMA
641 Data32 = (N_NON_RELOCATABLE + SS_32BIT_MEMORY_SPACE);
642
643 DMARegData[0] = CpuToFdt32 (Data32);
644 DEBUG ((DEBUG_INFO, "PciRootBridge->DMA base RegData[0] %x, \n", Data32));
645
646 // child-addr
647 DMARegData[2] = CpuToFdt32 (0);
648 DMARegData[3] = CpuToFdt32 (0);
649 // parent-addr
650 DMARegData[4] = CpuToFdt32 (0);
651 DMARegData[5] = CpuToFdt32 (0);
652 // size
653 DMARegData[6] = CpuToFdt32 (1);
654 DMARegData[7] = CpuToFdt32 (0);
655
656 Status = FdtSetProperty (Fdt, TempNode, "dma-ranges", &DMARegData, sizeof (DMARegData));
657 ASSERT_EFI_ERROR (Status);
658
659 ASSERT (PciRootBridgeInfo->RootBridge[Index].Bus.Base <= 0xFF);
660 ASSERT (PciRootBridgeInfo->RootBridge[Index].Bus.Limit <= 0xFF);
661
662 Reg64Data[0] = CpuToFdt64 (PciExpressBaseAddress + LShiftU64 (PciRootBridgeInfo->RootBridge[Index].Bus.Base, 20));
663 Reg64Data[1] = CpuToFdt64 (LShiftU64 (PciRootBridgeInfo->RootBridge[Index].Bus.Limit +1, 20));
664
665 Status = FdtSetProperty (Fdt, TempNode, "reg", &Reg64Data, sizeof (Reg64Data));
666 ASSERT_EFI_ERROR (Status);
667
668 BusNumber = PciRootBridgeInfo->RootBridge[Index].Bus.Base & 0xFF;
669 RegTmp[0] = CpuToFdt32 (BusNumber);
670 BusLimit = PciRootBridgeInfo->RootBridge[Index].Bus.Limit & 0xFF;
671 RegTmp[1] = CpuToFdt32 (BusLimit);
672 DEBUG ((DEBUG_INFO, "PciRootBridge->BusNumber %x, \n", BusNumber));
673 DEBUG ((DEBUG_INFO, "PciRootBridge->BusLimit %x, \n", BusLimit));
674
675 Status = FdtSetProperty (Fdt, TempNode, "bus-range", &RegTmp, sizeof (RegTmp));
676 ASSERT_EFI_ERROR (Status);
677
678 Data32 = CpuToFdt32 (2);
679 Status = FdtSetProperty (Fdt, TempNode, "#size-cells", &Data32, sizeof (UINT32));
680
681 Data32 = CpuToFdt32 (3);
682 Status = FdtSetProperty (Fdt, TempNode, "#address-cells", &Data32, sizeof (UINT32));
683
684 Status = FdtSetProperty (Fdt, TempNode, "compatible", "pci-rb", (UINT32)(AsciiStrLen ("pci-rb")+1));
685 ASSERT_EFI_ERROR (Status);
686
687 if (Index == 0) {
688 PciExpressBaseAddress = PcdGet64 (PcdPciExpressBaseAddress) + (PCI_LIB_ADDRESS (IGD_BUS_NUM, IGD_DEV_NUM, IGD_FUN_NUM, 0));
689 Status = AsciiSPrint (GmaStr, sizeof (GmaStr), "gma@%lX", PciExpressBaseAddress);
690 GmaNode = FdtAddSubnode (Fdt, TempNode, GmaStr);
691 Status = LocatePciDevicePpi ();
692 if (!EFI_ERROR (Status)) {
693 Status = mPciDevicePpi->PciIo.Pci.Read (
694 &mPciDevicePpi->PciIo,
695 (EFI_PCI_IO_PROTOCOL_WIDTH)EfiPciWidthUint16,
696 PCI_VENDOR_ID_OFFSET,
697 sizeof (PciData.Hdr.VendorId),
698 &(PciData.Hdr.VendorId)
699 );
700
701 Status = mPciDevicePpi->PciIo.Pci.Read (
702 &mPciDevicePpi->PciIo,
703 (EFI_PCI_IO_PROTOCOL_WIDTH)EfiPciWidthUint16,
704 PCI_DEVICE_ID_OFFSET,
705 sizeof (PciData.Hdr.DeviceId),
706 &(PciData.Hdr.DeviceId)
707 );
708
709 Status = mPciDevicePpi->PciIo.Pci.Read (
710 &mPciDevicePpi->PciIo,
711 (EFI_PCI_IO_PROTOCOL_WIDTH)EfiPciWidthUint8,
712 PCI_REVISION_ID_OFFSET,
713 sizeof (PciData.Hdr.RevisionID),
714 &(PciData.Hdr.RevisionID)
715 );
716
717 Status = mPciDevicePpi->PciIo.Pci.Read (
718 &mPciDevicePpi->PciIo,
719 (EFI_PCI_IO_PROTOCOL_WIDTH)EfiPciWidthUint16,
720 PCI_SVID_OFFSET,
721 sizeof (PciData.Device.SubsystemVendorID),
722 &(PciData.Device.SubsystemVendorID)
723 );
724
725 Status = mPciDevicePpi->PciIo.Pci.Read (
726 &mPciDevicePpi->PciIo,
727 (EFI_PCI_IO_PROTOCOL_WIDTH)EfiPciWidthUint16,
728 PCI_SID_OFFSET,
729 sizeof (PciData.Device.SubsystemID),
730 &(PciData.Device.SubsystemID)
731 );
732 }
733
734 Data32 = CpuToFdt32 (PciData.Device.SubsystemID);
735 Status = FdtSetProperty (Fdt, GmaNode, "subsystem-id", &Data32, sizeof (UINT32));
736
737 Data32 = CpuToFdt32 (PciData.Device.SubsystemVendorID);
738 Status = FdtSetProperty (Fdt, GmaNode, "subsystem-vendor-id", &Data32, sizeof (UINT32));
739
740 Data32 = CpuToFdt32 (PciData.Hdr.RevisionID);
741 Status = FdtSetProperty (Fdt, GmaNode, "revision-id", &Data32, sizeof (UINT32));
742
743 Data32 = CpuToFdt32 (PciData.Hdr.DeviceId);
744 Status = FdtSetProperty (Fdt, GmaNode, "device-id", &Data32, sizeof (UINT32));
745
746 Data32 = CpuToFdt32 (PciData.Hdr.VendorId);
747 Status = FdtSetProperty (Fdt, GmaNode, "vendor-id", &Data32, sizeof (UINT32));
748 }
749
750 if (SerialParent != NULL) {
751 DEBUG ((DEBUG_INFO, "SerialParent->IsIsaCompatible :%x , SerialParent->ParentDevicePcieBaseAddress :%x\n", SerialParent->IsIsaCompatible, SerialParent->ParentDevicePcieBaseAddress));
752 DEBUG ((DEBUG_INFO, "BusBase :%x , PciRootBridgeInfo->RootBridge[Index].Bus.Base :%x\n", BusBase, PciRootBridgeInfo->RootBridge[Index].Bus.Base));
753 }
754
755 {
756 if ((BusBase >= PciRootBridgeInfo->RootBridge[Index].Bus.Base) && (BusBase <= PciRootBridgeInfo->RootBridge[Index].Bus.Limit)) {
757 eSPINode = TempNode;
758 if (SerialParent != NULL) {
759 if (SerialParent->IsIsaCompatible) {
760 Status = AsciiSPrint (eSPIStr, sizeof (eSPIStr), "isa@%X,%X", DevBase, FunBase);
761 eSPINode = FdtAddSubnode (Fdt, TempNode, eSPIStr);
762 Status = FdtSetProperty (Fdt, eSPINode, "compatible", "isa", (UINT32)(AsciiStrLen ("isa")+1));
763 ASSERT_EFI_ERROR (Status);
764 Data32 = CpuToFdt32 (1);
765 Status = FdtSetProperty (Fdt, eSPINode, "#size-cells", &Data32, sizeof (UINT32));
766 Data32 = CpuToFdt32 (2);
767 Status = FdtSetProperty (Fdt, eSPINode, "#address-cells", &Data32, sizeof (UINT32));
768 Status = BuildFdtForSerial (eSPINode, FdtBase);
769 ASSERT_EFI_ERROR (Status);
770 }
771 } else {
772 Status = BuildFdtForSerialLpss (eSPINode, FdtBase);
773 ASSERT_EFI_ERROR (Status);
774 }
775 }
776 }
777 }
778 }
779
780 DEBUG ((DEBUG_INFO, "%a: #3 \n", __func__));
781
782 return Status;
783}
784
791EFI_STATUS
792BuildFdtForFrameBuffer (
793 IN VOID *FdtBase
794 )
795{
796 EFI_STATUS Status;
797 VOID *Fdt;
798 INT32 TempNode;
799 UINT32 Data32;
800 CHAR8 TempStr[32];
801 UINT64 RegData[2];
802 EFI_HOB_GUID_TYPE *GuidHob;
803 EFI_PEI_GRAPHICS_INFO_HOB *GraphicsInfo;
804
805 Fdt = FdtBase;
806
807 GuidHob = GetFirstGuidHob (&gEfiGraphicsInfoHobGuid);
808 if (GuidHob != NULL) {
809 GraphicsInfo = (EFI_PEI_GRAPHICS_INFO_HOB *)(GET_GUID_HOB_DATA (GuidHob));
810 Status = AsciiSPrint (TempStr, sizeof (TempStr), "framebuffer@%lX", GraphicsInfo->FrameBufferBase);
811 TempNode = FdtAddSubnode (Fdt, 0, TempStr);
812 ASSERT (TempNode > 0);
813
814 Status = FdtSetProperty (Fdt, TempNode, "display", "&gma", (UINT32)(AsciiStrLen ("&gma")+1));
815 ASSERT_EFI_ERROR (Status);
816
817 Status = FdtSetProperty (Fdt, TempNode, "format", "a8r8g8b8", (UINT32)(AsciiStrLen ("a8r8g8b8")+1));
818 ASSERT_EFI_ERROR (Status);
819
820 Data32 = CpuToFdt32 (GraphicsInfo->GraphicsMode.VerticalResolution);
821 Status = FdtSetProperty (Fdt, TempNode, "height", &Data32, sizeof (UINT32));
822 ASSERT_EFI_ERROR (Status);
823
824 Data32 = CpuToFdt32 (GraphicsInfo->GraphicsMode.HorizontalResolution);
825 Status = FdtSetProperty (Fdt, TempNode, "width", &Data32, sizeof (UINT32));
826 ASSERT_EFI_ERROR (Status);
827
828 RegData[0] = CpuToFdt64 (GraphicsInfo->FrameBufferBase);
829 RegData[1] = CpuToFdt64 (GraphicsInfo->FrameBufferSize);
830 Status = FdtSetProperty (Fdt, TempNode, "reg", &RegData, sizeof (RegData));
831 ASSERT_EFI_ERROR (Status);
832
833 Status = FdtSetProperty (Fdt, TempNode, "compatible", "simple-framebuffer", (UINT32)(AsciiStrLen ("simple-framebuffer")+1));
834 ASSERT_EFI_ERROR (Status);
835 } else {
836 Status = AsciiSPrint (TempStr, sizeof (TempStr), "framebuffer@%lX", 0xB0000000);
837 TempNode = FdtAddSubnode (Fdt, 0, TempStr);
838 ASSERT (TempNode > 0);
839
840 Status = FdtSetProperty (Fdt, TempNode, "display", "&gma", (UINT32)(AsciiStrLen ("&gma")+1));
841 ASSERT_EFI_ERROR (Status);
842
843 Status = FdtSetProperty (Fdt, TempNode, "format", "a8r8g8b8", (UINT32)(AsciiStrLen ("a8r8g8b8")+1));
844 ASSERT_EFI_ERROR (Status);
845
846 Data32 = CpuToFdt32 (1024);
847 Status = FdtSetProperty (Fdt, TempNode, "height", &Data32, sizeof (UINT32));
848 ASSERT_EFI_ERROR (Status);
849
850 Data32 = CpuToFdt32 (1280);
851 Status = FdtSetProperty (Fdt, TempNode, "width", &Data32, sizeof (UINT32));
852 ASSERT_EFI_ERROR (Status);
853
854 RegData[0] = CpuToFdt64 (0xB0000000);
855 RegData[1] = CpuToFdt64 (0x500000);
856 Status = FdtSetProperty (Fdt, TempNode, "reg", &RegData, sizeof (RegData));
857 ASSERT_EFI_ERROR (Status);
858
859 Status = FdtSetProperty (Fdt, TempNode, "compatible", "simple-framebuffer", (UINT32)(AsciiStrLen ("simple-framebuffer")+1));
860 ASSERT_EFI_ERROR (Status);
861 }
862
863 return Status;
864}
865
872EFI_STATUS
873BuildFdtForUplRequired (
874 IN VOID *FdtBase
875 )
876{
877 EFI_STATUS Status;
878 VOID *Fdt;
879 VOID *Fit;
880 INT32 ParentNode;
881 INT32 CustomNode;
882 INT32 UPLParaNode;
883 INT32 UPLImageNode;
884 EFI_HOB_CPU *CpuHob;
885 UINT64 Data64;
886 UINT32 Data32;
887 VOID *HobPtr;
888 EFI_BOOT_MODE BootMode;
889 CHAR8 TempStr[32];
890 UINT8 *GuidHob;
891 UNIVERSAL_PAYLOAD_BASE *PayloadBase;
892
893 Fdt = FdtBase;
894 Fit = NULL;
895
896 //
897 // Create Hob list FDT node.
898 //
899 ParentNode = FdtAddSubnode (Fdt, 0, "options");
900 ASSERT (ParentNode > 0);
901
902 UPLParaNode = FdtAddSubnode (Fdt, ParentNode, "upl-params");
903 ASSERT (UPLParaNode > 0);
904
905 //
906 // Create CPU info FDT node
907 //
908 CpuHob = GetFirstHob (EFI_HOB_TYPE_CPU);
909 ASSERT (CpuHob != NULL);
910
911 if (mResourceAssigned) {
912 Status = FdtSetProperty (Fdt, UPLParaNode, "pci-enum-done", NULL, 0);
913 ASSERT_EFI_ERROR (Status);
914 }
915
916 BootMode = GetBootModeHob ();
917
918 Data32 = CpuToFdt32 ((UINT32)CpuHob->SizeOfMemorySpace);
919 Status = FdtSetProperty (Fdt, UPLParaNode, "addr-width", &Data32, sizeof (Data32));
920 ASSERT_EFI_ERROR (Status);
921
922 if (BootMode == BOOT_WITH_FULL_CONFIGURATION) {
923 Status = FdtSetProperty (Fdt, UPLParaNode, "boot-mode", "normal", (UINT32)(AsciiStrLen ("normal")+1));
924 } else if (BootMode == BOOT_WITH_MINIMAL_CONFIGURATION) {
925 Status = FdtSetProperty (Fdt, UPLParaNode, "boot-mode", "fast", (UINT32)(AsciiStrLen ("fast")+1));
926 } else if (BootMode == BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS) {
927 Status = FdtSetProperty (Fdt, UPLParaNode, "boot-mode", "full", (UINT32)(AsciiStrLen ("full")+1));
928 } else if (BootMode == BOOT_WITH_DEFAULT_SETTINGS) {
929 Status = FdtSetProperty (Fdt, UPLParaNode, "boot-mode", "default", (UINT32)(AsciiStrLen ("default")+1));
930 } else if (BootMode == BOOT_ON_S4_RESUME) {
931 Status = FdtSetProperty (Fdt, UPLParaNode, "boot-mode", "s4", (UINT32)(AsciiStrLen ("s4")+1));
932 } else if (BootMode == BOOT_ON_S3_RESUME) {
933 Status = FdtSetProperty (Fdt, UPLParaNode, "boot-mode", "s3", (UINT32)(AsciiStrLen ("s3")+1));
934 } else {
935 Status = FdtSetProperty (Fdt, UPLParaNode, "boot-mode", "na", (UINT32)(AsciiStrLen ("na")+1));
936 }
937
938 ASSERT_EFI_ERROR (Status);
939
940 Status = FdtSetProperty (Fdt, UPLParaNode, "compatible", "upl", (UINT32)(AsciiStrLen ("upl")+1));
941 ASSERT_EFI_ERROR (Status);
942
943 GuidHob = GetFirstGuidHob (&gUniversalPayloadBaseGuid);
944 if (GuidHob != NULL) {
945 PayloadBase = (UNIVERSAL_PAYLOAD_BASE *)GET_GUID_HOB_DATA (GuidHob);
946 Fit = (VOID *)(UINTN)PayloadBase->Entry;
947 DEBUG ((DEBUG_INFO, "PayloadBase Entry = 0x%08x\n", PayloadBase->Entry));
948
949 Status = AsciiSPrint (TempStr, sizeof (TempStr), "upl-images@%lX", (UINTN)(Fit));
950 UPLImageNode = FdtAddSubnode (Fdt, ParentNode, TempStr);
951
952 Data64 = CpuToFdt64 ((UINTN)Fit);
953 Status = FdtSetProperty (FdtBase, UPLImageNode, "addr", &Data64, sizeof (Data64));
954 }
955
956 CustomNode = FdtAddSubnode (Fdt, ParentNode, "upl-custom");
957 ASSERT (CustomNode > 0);
958
959 HobPtr = GetHobList ();
960 Data64 = CpuToFdt64 ((UINT64)(EFI_PHYSICAL_ADDRESS)HobPtr);
961 Status = FdtSetProperty (Fdt, CustomNode, "hoblistptr", &Data64, sizeof (Data64));
962 ASSERT_EFI_ERROR (Status);
963
964 return Status;
965}
966
973EFI_STATUS
974BuildFdtForUPL (
975 IN VOID *FdtBase
976 )
977{
978 EFI_STATUS Status;
979
980 //
981 // Build FDT for memory related
982 //
983 Status = BuildFdtForMemory (FdtBase);
984 ASSERT_EFI_ERROR (Status);
985
986 Status = BuildFdtForMemAlloc (FdtBase);
987 ASSERT_EFI_ERROR (Status);
988
989 Status = BuildFdtForPciRootBridge (FdtBase);
990 ASSERT_EFI_ERROR (Status);
991
992 Status = BuildFdtForFrameBuffer (FdtBase);
993 ASSERT_EFI_ERROR (Status);
994
995 Status = BuildFdtForUplRequired (FdtBase);
996 ASSERT_EFI_ERROR (Status);
997
998 return Status;
999}
UINTN
UINT64 UINTN
Definition: ProcessorBind.h:112
GetFirstHob
VOID *EFIAPI GetFirstHob(IN UINT16 Type)
Definition: HobLib.c:142
GetFirstGuidHob
VOID *EFIAPI GetFirstGuidHob(IN CONST EFI_GUID *Guid)
Definition: HobLib.c:215
GetNextGuidHob
VOID *EFIAPI GetNextGuidHob(IN CONST EFI_GUID *Guid, IN CONST VOID *HobStart)
Definition: HobLib.c:176
GetHobList
VOID *EFIAPI GetHobList(VOID)
Definition: HobLib.c:76
GetBootModeHob
EFI_BOOT_MODE EFIAPI GetBootModeHob(VOID)
Definition: HobLib.c:240
AsciiStrLen
UINTN EFIAPI AsciiStrLen(IN CONST CHAR8 *String)
Definition: String.c:641
AsciiStrCmp
INTN EFIAPI AsciiStrCmp(IN CONST CHAR8 *FirstString, IN CONST CHAR8 *SecondString)
Definition: String.c:716
RShiftU64
UINT64 EFIAPI RShiftU64(IN UINT64 Operand, IN UINTN Count)
Definition: RShiftU64.c:28
LShiftU64
UINT64 EFIAPI LShiftU64(IN UINT64 Operand, IN UINTN Count)
Definition: LShiftU64.c:28
SetMem
VOID *EFIAPI SetMem(OUT VOID *Buffer, IN UINTN Length, IN UINT8 Value)
Definition: SetMemWrapper.c:38
CompareGuid
BOOLEAN EFIAPI CompareGuid(IN CONST GUID *Guid1, IN CONST GUID *Guid2)
Definition: MemLibGuid.c:73
IsZeroGuid
BOOLEAN EFIAPI IsZeroGuid(IN CONST GUID *Guid)
Definition: MemLibGuid.c:156
PeiServicesLocatePpi
EFI_STATUS EFIAPI PeiServicesLocatePpi(IN CONST EFI_GUID *Guid, IN UINTN Instance, IN OUT EFI_PEI_PPI_DESCRIPTOR **PpiDescriptor, IN OUT VOID **Ppi)
Definition: PeiServicesLib.c:95
CpuToFdt64
UINT64 EFIAPI CpuToFdt64(IN UINT64 Value)
Definition: FdtLib.c:108
FdtSetProperty
INT32 EFIAPI FdtSetProperty(IN VOID *Fdt, IN INT32 NodeOffset, IN CONST CHAR8 *Name, IN CONST VOID *Value, IN UINT32 Length)
Definition: FdtLib.c:593
FdtAddSubnode
INT32 EFIAPI FdtAddSubnode(IN VOID *Fdt, IN INT32 ParentOffset, IN CONST CHAR8 *Name)
Definition: FdtLib.c:570
CpuToFdt32
UINT32 EFIAPI CpuToFdt32(IN UINT32 Value)
Definition: FdtLib.c:74
AsciiSPrint
UINTN EFIAPI AsciiSPrint(OUT CHAR8 *StartOfBuffer, IN UINTN BufferSize, IN CONST CHAR8 *FormatString,...)
Definition: PrintLib.c:813
NULL
#define NULL
Definition: Base.h:319
FALSE
#define FALSE
Definition: Base.h:307
IN
#define IN
Definition: Base.h:279
ASSERT_EFI_ERROR
#define ASSERT_EFI_ERROR(StatusParameter)
Definition: DebugLib.h:462
DEBUG
#define DEBUG(Expression)
Definition: DebugLib.h:434
PCI_LIB_ADDRESS
#define PCI_LIB_ADDRESS(Bus, Device, Function, Register)
Definition: PciLib.h:34
EFI_PCI_IO_PROTOCOL_WIDTH
EFI_PCI_IO_PROTOCOL_WIDTH
Definition: PciIo.h:28
PcdGet64
#define PcdGet64(TokenName)
Definition: PcdLib.h:375
PcdGet32
#define PcdGet32(TokenName)
Definition: PcdLib.h:362
PcdGetBool
#define PcdGetBool(TokenName)
Definition: PcdLib.h:401
PCI_SID_OFFSET
#define PCI_SID_OFFSET
SubSystem ID.
Definition: Pci22.h:550
PCI_SVID_OFFSET
#define PCI_SVID_OFFSET
SubSystem Vendor id.
Definition: Pci22.h:548
EFI_BOOT_MODE
UINT32 EFI_BOOT_MODE
Definition: PiBootMode.h:18
EFI_PHYSICAL_ADDRESS
UINT64 EFI_PHYSICAL_ADDRESS
Definition: UefiBaseType.h:50
EFI_STATUS
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:29
EFI_SUCCESS
#define EFI_SUCCESS
Definition: UefiBaseType.h:112
BuildFdtForMemAlloc
EFI_STATUS BuildFdtForMemAlloc(IN VOID *FdtBase)
Definition: X86_BuildFdtLib.c:142
LocatePciDevicePpi
EFI_STATUS EFIAPI LocatePciDevicePpi(VOID)
Definition: X86_BuildFdtLib.c:63
BuildFdtForMemory
EFI_STATUS BuildFdtForMemory(IN VOID *FdtBase)
Definition: X86_BuildFdtLib.c:91
BuildFdtForPciRootBridge
EFI_STATUS BuildFdtForPciRootBridge(IN VOID *FdtBase)
Definition: X86_BuildFdtLib.c:436
BuildFdtForUPL
EFI_STATUS BuildFdtForUPL(IN VOID *FdtBase)
Definition: X86_BuildFdtLib.c:974
BuildFdtForSerial
EFI_STATUS BuildFdtForSerial(IN INT32 ISANode, IN VOID *FdtBase)
Definition: X86_BuildFdtLib.c:307
BuildFdtForFrameBuffer
EFI_STATUS BuildFdtForFrameBuffer(IN VOID *FdtBase)
Definition: X86_BuildFdtLib.c:792
BuildFdtForUplRequired
EFI_STATUS BuildFdtForUplRequired(IN VOID *FdtBase)
Definition: X86_BuildFdtLib.c:873
BuildFdtForSerialLpss
EFI_STATUS BuildFdtForSerialLpss(IN INT32 ISANode, IN VOID *FdtBase)
Definition: X86_BuildFdtLib.c:369
EDKII_PCI_DEVICE_PPI
Definition: PciDevice.h:25
EFI_GRAPHICS_OUTPUT_MODE_INFORMATION::VerticalResolution
UINT32 VerticalResolution
Definition: GraphicsOutput.h:72
EFI_GRAPHICS_OUTPUT_MODE_INFORMATION::HorizontalResolution
UINT32 HorizontalResolution
Definition: GraphicsOutput.h:68
EFI_HOB_CPU
Definition: PiHob.h:439
EFI_HOB_CPU::SizeOfMemorySpace
UINT8 SizeOfMemorySpace
Definition: PiHob.h:447
EFI_HOB_GUID_TYPE
Definition: PiHob.h:339
EFI_HOB_MEMORY_ALLOCATION_HEADER::MemoryBaseAddress
EFI_PHYSICAL_ADDRESS MemoryBaseAddress
Definition: PiHob.h:119
EFI_HOB_MEMORY_ALLOCATION_HEADER::MemoryLength
UINT64 MemoryLength
Definition: PiHob.h:124
EFI_HOB_MEMORY_ALLOCATION_HEADER::Name
EFI_GUID Name
Definition: PiHob.h:112
EFI_HOB_MEMORY_ALLOCATION_HEADER::MemoryType
EFI_MEMORY_TYPE MemoryType
Definition: PiHob.h:131
EFI_HOB_MEMORY_ALLOCATION_MODULE::MemoryAllocationHeader
EFI_HOB_MEMORY_ALLOCATION_HEADER MemoryAllocationHeader
Definition: PiHob.h:207
EFI_HOB_MEMORY_ALLOCATION::AllocDescriptor
EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor
Definition: PiHob.h:153
EFI_HOB_RESOURCE_DESCRIPTOR
Definition: PiHob.h:307
EFI_HOB_RESOURCE_DESCRIPTOR::ResourceLength
UINT64 ResourceLength
Definition: PiHob.h:332
EFI_HOB_RESOURCE_DESCRIPTOR::PhysicalStart
EFI_PHYSICAL_ADDRESS PhysicalStart
Definition: PiHob.h:328
EFI_HOB_RESOURCE_DESCRIPTOR::ResourceType
EFI_RESOURCE_TYPE ResourceType
Definition: PiHob.h:320
EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS::Read
EFI_PCI_IO_PROTOCOL_CONFIG Read
Definition: PciIo.h:232
EFI_PEI_GRAPHICS_INFO_HOB
Definition: GraphicsInfoHob.h:27
EFI_PEI_PPI_DESCRIPTOR
Definition: PiPeiCis.h:90
GUID
Definition: Base.h:213
PCI_TYPE00
Definition: Pci22.h:65
UNIVERSAL_PAYLOAD_ACPI_TABLE
Definition: AcpiTable.h:19
UNIVERSAL_PAYLOAD_BASE
Definition: UniversalPayloadBase.h:14
UNIVERSAL_PAYLOAD_GENERIC_HEADER
Definition: UniversalPayload.h:40
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE::Segment
UINT32 Segment
Segment number.
Definition: PciRootBridges.h:49
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE::Bus
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Bus
Bus aperture which can be used by the root bridge.
Definition: PciRootBridges.h:66
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE::Mem
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Mem
MMIO aperture below 4GB which can be used by the root bridge.
Definition: PciRootBridges.h:68
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE::MemAbove4G
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE MemAbove4G
MMIO aperture above 4GB which can be used by the root bridge.
Definition: PciRootBridges.h:69
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE::PMem
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMem
Prefetchable MMIO aperture below 4GB which can be used by the root bridge.
Definition: PciRootBridges.h:70
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE::Io
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Io
IO aperture which can be used by the root bridge.
Definition: PciRootBridges.h:67
UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES
Definition: PciRootBridges.h:78
UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO
Definition: SerialPortInfo.h:17
UNIVERSAL_PAYLOAD_SERIAL_PORT_PARENT_DEVICE_INFO
Definition: UniversalPayloadSerialPortDeviceParentInfo.h:18
UNIVERSAL_PAYLOAD_SMBIOS_TABLE
Definition: SmbiosTable.h:19
EFI_PEI_HOB_POINTERS
Definition: PiHob.h:493