TianoCore EDK2 master
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Defines the structure of the AARCH32 CCSIDR2 register. More...
#include <ArmPkg/Include/IndustryStandard/ArmCache.h>
Data Fields | |
struct { | |
UINT32 NumSets: 24 | |
Number of sets in the cache - 1. More... | |
UINT32 Reserved: 8 | |
Reserved, RES0. More... | |
} | Bits |
Bitfield definition of the register. | |
UINT32 | Data |
The entire 32-bit value. | |
Defines the structure of the AARCH32 CCSIDR2 register.
Definition at line 64 of file ArmCache.h.
UINT32 CCSIDR2_DATA::Data |
The entire 32-bit value.
Definition at line 69 of file ArmCache.h.
UINT32 CCSIDR2_DATA::NumSets |
Number of sets in the cache - 1.
Definition at line 66 of file ArmCache.h.
UINT32 CCSIDR2_DATA::Reserved |
Reserved, RES0.
Definition at line 67 of file ArmCache.h.