CpuTimerLib.c

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#include <Base.h>
#include <Library/TimerLib.h>
#include <Library/BaseLib.h>
#include <Library/PcdLib.h>
#include <Library/DebugLib.h>
#include <Register/Cpuid.h>
 
GUID  mCpuCrystalFrequencyHobGuid = {
  0xe1ec5ad0, 0x8569, 0x46bd, { 0x8d, 0xcd, 0x3b, 0x9f, 0x6f, 0x45, 0x82, 0x7a }
};
 
UINT64
InternalGetPerformanceCounterFrequency (
  VOID
  );
 
UINT64
CpuidCoreClockCalculateTscFrequency (
  VOID
  )
{
  UINT64  TscFrequency;
  UINT64  CoreXtalFrequency;
  UINT32  RegEax;
  UINT32  RegEbx;
  UINT32  RegEcx;
 
  //
  // Use CPUID leaf 0x15 Time Stamp Counter and Nominal Core Crystal Clock Information
  // EBX returns 0 if not supported. ECX, if non zero, provides Core Xtal Frequency in hertz.
  // TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX.
  //
  AsmCpuid (CPUID_TIME_STAMP_COUNTER, &RegEax, &RegEbx, &RegEcx, NULL);
 
  //
  // If EAX or EBX returns 0, the XTAL ratio is not enumerated.
  //
  if ((RegEax == 0) || (RegEbx == 0)) {
    ASSERT (RegEax != 0);
    ASSERT (RegEbx != 0);
    return 0;
  }
 
  //
  // If ECX returns 0, the XTAL frequency is not enumerated.
  // And PcdCpuCoreCrystalClockFrequency defined should base on processor series.
  //
  if (RegEcx == 0) {
    CoreXtalFrequency = PcdGet64 (PcdCpuCoreCrystalClockFrequency);
  } else {
    CoreXtalFrequency = (UINT64)RegEcx;
  }
 
  //
  // Calculate TSC frequency = (ECX, Core Xtal Frequency) * EBX/EAX
  //
  TscFrequency = DivU64x32 (MultU64x32 (CoreXtalFrequency, RegEbx) + (UINT64)(RegEax >> 1), RegEax);
 
  return TscFrequency;
}
 
VOID
InternalCpuDelay (
  IN UINT64  Delay
  )
{
  UINT64  Ticks;
 
  //
  // The target timer count is calculated here
  //
  Ticks = AsmReadTsc () + Delay;
 
  //
  // Wait until time out
  // Timer wrap-arounds are NOT handled correctly by this function.
  // Thus, this function must be called within 10 years of reset since
  // Intel guarantees a minimum of 10 years before the TSC wraps.
  //
  while (AsmReadTsc () <= Ticks) {
    CpuPause ();
  }
}
 
UINTN
EFIAPI
MicroSecondDelay (
  IN UINTN  MicroSeconds
  )
{
  InternalCpuDelay (
    DivU64x32 (
      MultU64x64 (
        MicroSeconds,
        InternalGetPerformanceCounterFrequency ()
        ),
      1000000u
      )
    );
 
  return MicroSeconds;
}
 
UINTN
EFIAPI
NanoSecondDelay (
  IN UINTN  NanoSeconds
  )
{
  InternalCpuDelay (
    DivU64x32 (
      MultU64x64 (
        NanoSeconds,
        InternalGetPerformanceCounterFrequency ()
        ),
      1000000000u
      )
    );
 
  return NanoSeconds;
}
 
UINT64
EFIAPI
GetPerformanceCounter (
  VOID
  )
{
  return AsmReadTsc ();
}
 
UINT64
EFIAPI
GetPerformanceCounterProperties (
  OUT UINT64  *StartValue   OPTIONAL,
  OUT UINT64  *EndValue     OPTIONAL
  )
{
  if (StartValue != NULL) {
    *StartValue = 0;
  }
 
  if (EndValue != NULL) {
    *EndValue = 0xffffffffffffffffULL;
  }
 
  return InternalGetPerformanceCounterFrequency ();
}
 
UINT64
EFIAPI
GetTimeInNanoSecond (
  IN UINT64  Ticks
  )
{
  UINT64  Frequency;
  UINT64  NanoSeconds;
  UINT64  Remainder;
  INTN    Shift;
 
  Frequency = GetPerformanceCounterProperties (NULL, NULL);
 
  //
  //          Ticks
  // Time = --------- x 1,000,000,000
  //        Frequency
  //
  NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);
 
  //
  // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.
  // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,
  // i.e. highest bit set in Remainder should <= 33.
  //
  Shift        = MAX (0, HighBitSet64 (Remainder) - 33);
  Remainder    = RShiftU64 (Remainder, (UINTN)Shift);
  Frequency    = RShiftU64 (Frequency, (UINTN)Shift);
  NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);
 
  return NanoSeconds;
}