#include "CpuFeaturesLib.h"
#include <Library/MtrrLib.h>
#include <Register/Intel/Cpuid.h>
#include <Register/Intel/SmramSaveStateMap.h>

Macros
#define	SMM_FEATURES_LIB_IA32_MTRR_CAP 0x0FE

#define	SMM_FEATURES_LIB_IA32_FEATURE_CONTROL 0x03A

#define	SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE 0x1F2

#define	SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK 0x1F3

#define	SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE 0x0A0

#define	SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK 0x0A1

#define	EFI_MSR_SMRR_MASK 0xFFFFF000

#define	EFI_MSR_SMRR_PHYS_MASK_VALID BIT11

#define	SMM_FEATURES_LIB_SMM_FEATURE_CONTROL 0x4E0

#define	SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D

#define	SMM_CODE_ACCESS_CHK_BIT BIT58

Functions
VOID	CpuFeaturesLibInitialization (VOID)

VOID EFIAPI	SmmCpuFeaturesInitializeProcessor (IN UINTN CpuIndex, IN BOOLEAN IsMonarch, IN EFI_PROCESSOR_INFORMATION ProcessorInfo, IN CPU_HOT_PLUG_DATA CpuHotPlugData)

BOOLEAN EFIAPI	SmmCpuFeaturesNeedConfigureMtrrs (VOID)

VOID EFIAPI	SmmCpuFeaturesDisableSmrr (VOID)

VOID EFIAPI	SmmCpuFeaturesReenableSmrr (VOID)

VOID EFIAPI	SmmCpuFeaturesRendezvousEntry (IN UINTN CpuIndex)

UINT64 EFIAPI	SmmCpuFeaturesGetSmmRegister (IN UINTN CpuIndex, IN SMM_REG_NAME RegName)

VOID EFIAPI	SmmCpuFeaturesSetSmmRegister (IN UINTN CpuIndex, IN SMM_REG_NAME RegName, IN UINT64 Value)

UINT64 EFIAPI	SmmCpuFeaturesHookReturnFromSmm (IN UINTN CpuIndex, IN SMRAM_SAVE_STATE_MAP *CpuState, IN UINT64 NewInstructionPointer32, IN UINT64 NewInstructionPointer)

BOOLEAN EFIAPI	SmmCpuFeaturesIsSmmRegisterSupported (IN UINTN CpuIndex, IN SMM_REG_NAME RegName)

Variables
UINT32	mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE

UINT32	mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK

BOOLEAN	mSmmCpuFeaturesSmmRelocated

BOOLEAN	mNeedConfigureMtrrs = TRUE

BOOLEAN *	mSmrrEnabled

Detailed Description

Implementation shared across all library instances.

Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.
Copyright (c) Microsoft Corporation.
SPDX-License-Identifier: BSD-2-Clause-Patent

Definition in file IntelSmmCpuFeaturesLib.c.

Macro Definition Documentation

◆ EFI_MSR_SMRR_MASK

#define EFI_MSR_SMRR_MASK 0xFFFFF000

Definition at line 25 of file IntelSmmCpuFeaturesLib.c.

◆ EFI_MSR_SMRR_PHYS_MASK_VALID

#define EFI_MSR_SMRR_PHYS_MASK_VALID BIT11

Definition at line 26 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_CODE_ACCESS_CHK_BIT

#define SMM_CODE_ACCESS_CHK_BIT BIT58

Definition at line 33 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE

#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE 0x0A0

Definition at line 23 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK

#define SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK 0x0A1

Definition at line 24 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_FEATURES_LIB_IA32_FEATURE_CONTROL

#define SMM_FEATURES_LIB_IA32_FEATURE_CONTROL 0x03A

Definition at line 20 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_FEATURES_LIB_IA32_MCA_CAP

#define SMM_FEATURES_LIB_IA32_MCA_CAP 0x17D

Definition at line 32 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_FEATURES_LIB_IA32_MTRR_CAP

#define SMM_FEATURES_LIB_IA32_MTRR_CAP 0x0FE

Definition at line 19 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE

#define SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE 0x1F2

Definition at line 21 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK

#define SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK 0x1F3

Definition at line 22 of file IntelSmmCpuFeaturesLib.c.

◆ SMM_FEATURES_LIB_SMM_FEATURE_CONTROL

#define SMM_FEATURES_LIB_SMM_FEATURE_CONTROL 0x4E0

Definition at line 27 of file IntelSmmCpuFeaturesLib.c.

Function Documentation

◆ CpuFeaturesLibInitialization()

VOID CpuFeaturesLibInitialization ( VOID )

Performs library initialization.

This initialization function contains common functionality shared betwen all library instance constructors.

Definition at line 65 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesDisableSmrr()

VOID EFIAPI SmmCpuFeaturesDisableSmrr ( VOID )

Disable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs() returns TRUE.

Definition at line 325 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesGetSmmRegister()

UINT64 EFIAPI SmmCpuFeaturesGetSmmRegister	(	IN UINTN	CpuIndex,
		IN SMM_REG_NAME	RegName
	)

Returns the current value of the SMM register for the specified CPU. If the SMM register is not supported, then 0 is returned.

Parameters

[in]	CpuIndex	The index of the CPU to read the SMM register. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST).
[in]	RegName	Identifies the SMM register to read.

Returns: The value of the SMM register specified by RegName from the CPU specified by CpuIndex.

Definition at line 385 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesHookReturnFromSmm()

UINT64 EFIAPI SmmCpuFeaturesHookReturnFromSmm	(	IN UINTN	CpuIndex,
		IN SMRAM_SAVE_STATE_MAP *	CpuState,
		IN UINT64	NewInstructionPointer32,
		IN UINT64	NewInstructionPointer
	)

This function updates the SMRAM save state on the currently executing CPU to resume execution at a specific address after an RSM instruction. This function must evaluate the SMRAM save state to determine the execution mode the RSM instruction resumes and update the resume execution address with either NewInstructionPointer32 or NewInstructionPoint. The auto HALT restart flag in the SMRAM save state must always be cleared. This function returns the value of the instruction pointer from the SMRAM save state that was replaced. If this function returns 0, then the SMRAM save state was not modified.

This function is called during the very first SMI on each CPU after SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode to signal that the SMBASE of each CPU has been updated before the default SMBASE address is used for the first SMI to the next CPU.

Parameters

[in]	CpuIndex	The index of the CPU to hook. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST).
[in]	CpuState	Pointer to SMRAM Save State Map for the currently executing CPU.
[in]	NewInstructionPointer32	Instruction pointer to use if resuming to 32-bit execution mode from 64-bit SMM.
[in]	NewInstructionPointer	Instruction pointer to use if resuming to same execution mode as SMM.

Return values

0	This function did modify the SMRAM save state.
>	0 The original instruction pointer value from the SMRAM save state before it was replaced.

Definition at line 454 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesInitializeProcessor()

VOID EFIAPI SmmCpuFeaturesInitializeProcessor	(	IN UINTN	CpuIndex,
		IN BOOLEAN	IsMonarch,
		IN EFI_PROCESSOR_INFORMATION *	ProcessorInfo,
		IN CPU_HOT_PLUG_DATA *	CpuHotPlugData
	)

Called during the very first SMI into System Management Mode to initialize CPU features, including SMBASE, for the currently executing CPU. Since this is the first SMI, the SMRAM Save State Map is at the default address of SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET. The currently executing CPU is specified by CpuIndex and CpuIndex can be used to access information about the currently executing CPU in the ProcessorInfo array and the HotPlugCpuData data structure.

Parameters

[in]	CpuIndex	The index of the CPU to initialize. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST).
[in]	IsMonarch	TRUE if the CpuIndex is the index of the CPU that was elected as monarch during System Management Mode initialization. FALSE if the CpuIndex is not the index of the CPU that was elected as monarch during System Management Mode initialization.
[in]	ProcessorInfo	Pointer to an array of EFI_PROCESSOR_INFORMATION structures. ProcessorInfo[CpuIndex] contains the information for the currently executing CPU.
[in]	CpuHotPlugData	Pointer to the CPU_HOT_PLUG_DATA structure that contains the ApidId and SmBase arrays.

Definition at line 187 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesIsSmmRegisterSupported()

BOOLEAN EFIAPI SmmCpuFeaturesIsSmmRegisterSupported	(	IN UINTN	CpuIndex,
		IN SMM_REG_NAME	RegName
	)

Check to see if an SMM register is supported by a specified CPU.

Parameters

[in]	CpuIndex	The index of the CPU to check for SMM register support. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST).
[in]	RegName	Identifies the SMM register to check for support.

Return values

TRUE	The SMM register specified by RegName is supported by the CPU specified by CpuIndex.
FALSE	The SMM register specified by RegName is not supported by the CPU specified by CpuIndex.

Definition at line 479 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesNeedConfigureMtrrs()

BOOLEAN EFIAPI SmmCpuFeaturesNeedConfigureMtrrs ( VOID )

Determines if MTRR registers must be configured to set SMRAM cache-ability when executing in System Management Mode.

Return values

TRUE	MTRR registers must be configured to set SMRAM cache-ability.
FALSE	MTRR registers do not need to be configured to set SMRAM cache-ability.

Definition at line 312 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesReenableSmrr()

VOID EFIAPI SmmCpuFeaturesReenableSmrr ( VOID )

Enable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs() returns TRUE.

Definition at line 340 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesRendezvousEntry()

VOID EFIAPI SmmCpuFeaturesRendezvousEntry ( IN UINTN CpuIndex )

Processor specific hook point each time a CPU enters System Management Mode.

Parameters

[in] CpuIndex The index of the CPU that has entered SMM. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST).

Definition at line 358 of file IntelSmmCpuFeaturesLib.c.

◆ SmmCpuFeaturesSetSmmRegister()

VOID EFIAPI SmmCpuFeaturesSetSmmRegister	(	IN UINTN	CpuIndex,
		IN SMM_REG_NAME	RegName,
		IN UINT64	Value
	)

Sets the value of an SMM register on a specified CPU. If the SMM register is not supported, then no action is performed.

Parameters

[in]	CpuIndex	The index of the CPU to write the SMM register. The value must be between 0 and the NumberOfCpus field in the System Management System Table (SMST).
[in]	RegName	Identifies the SMM register to write. registers are read-only.
[in]	Value	The value to write to the SMM register.

Definition at line 410 of file IntelSmmCpuFeaturesLib.c.

Variable Documentation

◆ mNeedConfigureMtrrs

BOOLEAN mNeedConfigureMtrrs = TRUE

Definition at line 50 of file IntelSmmCpuFeaturesLib.c.

◆ mSmmCpuFeaturesSmmRelocated

BOOLEAN mSmmCpuFeaturesSmmRelocated

Definition at line 45 of file IntelSmmCpuFeaturesLib.c.

◆ mSmrrEnabled

BOOLEAN* mSmrrEnabled

Definition at line 55 of file IntelSmmCpuFeaturesLib.c.

◆ mSmrrPhysBaseMsr

UINT32 mSmrrPhysBaseMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE

Definition at line 38 of file IntelSmmCpuFeaturesLib.c.

◆ mSmrrPhysMaskMsr

UINT32 mSmrrPhysMaskMsr = SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK

Definition at line 39 of file IntelSmmCpuFeaturesLib.c.

Macros

Functions

Variables

Detailed Description

Macro Definition Documentation

◆ EFI_MSR_SMRR_MASK

◆ EFI_MSR_SMRR_PHYS_MASK_VALID

◆ SMM_CODE_ACCESS_CHK_BIT

◆ SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSBASE

◆ SMM_FEATURES_LIB_IA32_CORE_SMRR_PHYSMASK

◆ SMM_FEATURES_LIB_IA32_FEATURE_CONTROL

◆ SMM_FEATURES_LIB_IA32_MCA_CAP

◆ SMM_FEATURES_LIB_IA32_MTRR_CAP

◆ SMM_FEATURES_LIB_IA32_SMRR_PHYSBASE

◆ SMM_FEATURES_LIB_IA32_SMRR_PHYSMASK

◆ SMM_FEATURES_LIB_SMM_FEATURE_CONTROL

Function Documentation

◆ CpuFeaturesLibInitialization()

◆ SmmCpuFeaturesDisableSmrr()

◆ SmmCpuFeaturesGetSmmRegister()

◆ SmmCpuFeaturesHookReturnFromSmm()

◆ SmmCpuFeaturesInitializeProcessor()

◆ SmmCpuFeaturesIsSmmRegisterSupported()

◆ SmmCpuFeaturesNeedConfigureMtrrs()

◆ SmmCpuFeaturesReenableSmrr()

◆ SmmCpuFeaturesRendezvousEntry()

◆ SmmCpuFeaturesSetSmmRegister()

Variable Documentation

◆ mNeedConfigureMtrrs

◆ mSmmCpuFeaturesSmmRelocated

◆ mSmrrEnabled

◆ mSmrrPhysBaseMsr

◆ mSmrrPhysMaskMsr