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Serial.h
Go to the documentation of this file.
1
9#ifndef _SERIAL_H_
10#define _SERIAL_H_
11
12#include <Uefi.h>
13
15
16#include <Protocol/SuperIo.h>
17#include <Protocol/PciIo.h>
18#include <Protocol/SerialIo.h>
19#include <Protocol/DevicePath.h>
20
21#include <Library/DebugLib.h>
23#include <Library/UefiLib.h>
29#include <Library/PcdLib.h>
30#include <Library/IoLib.h>
31#include <Library/PrintLib.h>
32
33//
34// Driver Binding Externs
35//
36extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;
37extern EFI_COMPONENT_NAME_PROTOCOL gPciSioSerialComponentName;
38extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2;
39
40#define SIO_SERIAL_PORT_NAME L"SIO Serial Port #%d"
41#define PCI_SERIAL_PORT_NAME L"PCI Serial Port #%d"
42#define SERIAL_PORT_NAME_LEN (sizeof (SIO_SERIAL_PORT_NAME) / sizeof (CHAR16) + MAXIMUM_VALUE_CHARACTERS)
43
44//
45// Internal Data Structures
46//
47#define TIMEOUT_STALL_INTERVAL 10
48
49#pragma pack(1)
62typedef struct {
63 UINT16 VendorId;
64 UINT16 DeviceId;
65 UINT32 ClockRate;
66 UINT64 Offset;
67 UINT8 BarIndex;
71 UINT8 Reserved[2];
73#pragma pack()
74
75#define SERIAL_MAX_FIFO_SIZE 17
76typedef struct {
77 UINT16 Head;
78 UINT16 Tail;
81
82typedef union {
86
87typedef struct {
88 EFI_PCI_IO_PROTOCOL *PciIo; // Pointer to parent PciIo instance.
89 UINTN ChildCount; // Count of child SerialIo instance.
90 UINT64 PciAttributes; // Original PCI attributes.
92
93typedef struct {
94 UINT32 Signature;
95 EFI_HANDLE Handle;
97 EFI_SERIAL_IO_MODE SerialMode;
98 EFI_DEVICE_PATH_PROTOCOL *DevicePath;
99
100 EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;
101 UART_DEVICE_PATH UartDevicePath;
102
104 BOOLEAN MmioAccess;
106 UINT32 ClockRate;
107
110
113
114 BOOLEAN SoftwareLoopbackEnable;
115 BOOLEAN HardwareFlowControl;
116 EFI_UNICODE_STRING_TABLE *ControllerNameTable;
118 UINT32 Instance;
119 PCI_DEVICE_INFO *PciDeviceInfo;
120} SERIAL_DEV;
121
122#define SERIAL_DEV_SIGNATURE SIGNATURE_32 ('s', 'e', 'r', 'd')
123#define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)
124
125//
126// Serial Driver Defaults
127//
128#define SERIAL_PORT_DEFAULT_TIMEOUT 1000000
129#define SERIAL_PORT_SUPPORT_CONTROL_MASK (EFI_SERIAL_CLEAR_TO_SEND | \
130 EFI_SERIAL_DATA_SET_READY | \
131 EFI_SERIAL_RING_INDICATE | \
132 EFI_SERIAL_CARRIER_DETECT | \
133 EFI_SERIAL_REQUEST_TO_SEND | \
134 EFI_SERIAL_DATA_TERMINAL_READY | \
135 EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE | \
136 EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE | \
137 EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE | \
138 EFI_SERIAL_OUTPUT_BUFFER_EMPTY | \
139 EFI_SERIAL_INPUT_BUFFER_EMPTY)
140
141#define SERIAL_PORT_MIN_TIMEOUT 1 // 1 uS
142#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds
143//
144// UART Registers
145//
146#define SERIAL_REGISTER_THR 0
147#define SERIAL_REGISTER_RBR 0
148#define SERIAL_REGISTER_DLL 0
149#define SERIAL_REGISTER_DLM 1
150#define SERIAL_REGISTER_IER 1
151#define SERIAL_REGISTER_IIR 2
152#define SERIAL_REGISTER_FCR 2
153#define SERIAL_REGISTER_LCR 3
154#define SERIAL_REGISTER_MCR 4
155#define SERIAL_REGISTER_LSR 5
156#define SERIAL_REGISTER_MSR 6
157#define SERIAL_REGISTER_SCR 7
158#pragma pack(1)
159
163typedef union {
164 struct {
165 UINT8 Ravie : 1;
166 UINT8 Theie : 1;
167 UINT8 Rie : 1;
168 UINT8 Mie : 1;
169 UINT8 Reserved : 4;
170 } Bits;
171 UINT8 Data;
173
177typedef union {
178 struct {
179 UINT8 TrFIFOE : 1;
180 UINT8 ResetRF : 1;
181 UINT8 ResetTF : 1;
182 UINT8 Dms : 1;
183 UINT8 Reserved : 1;
184 UINT8 TrFIFO64 : 1;
185 UINT8 Rtb : 2;
186 } Bits;
187 UINT8 Data;
189
193typedef union {
194 struct {
195 UINT8 SerialDB : 2;
196 UINT8 StopB : 1;
197 UINT8 ParEn : 1;
198 UINT8 EvenPar : 1;
199 UINT8 SticPar : 1;
200 UINT8 BrCon : 1;
201 UINT8 DLab : 1;
202 } Bits;
203 UINT8 Data;
205
209typedef union {
210 struct {
211 UINT8 DtrC : 1;
212 UINT8 Rts : 1;
213 UINT8 Out1 : 1;
214 UINT8 Out2 : 1;
215 UINT8 Lme : 1;
216 UINT8 Reserved : 3;
217 } Bits;
218 UINT8 Data;
220
224typedef union {
225 struct {
226 UINT8 Dr : 1;
227 UINT8 Oe : 1;
228 UINT8 Pe : 1;
229 UINT8 Fe : 1;
230 UINT8 Bi : 1;
231 UINT8 Thre : 1;
232 UINT8 Temt : 1;
233 UINT8 FIFOe : 1;
234 } Bits;
235 UINT8 Data;
237
241typedef union {
242 struct {
243 UINT8 DeltaCTS : 1;
244 UINT8 DeltaDSR : 1;
245 UINT8 TrailingEdgeRI : 1;
246 UINT8 DeltaDCD : 1;
247 UINT8 Cts : 1;
248 UINT8 Dsr : 1;
249 UINT8 Ri : 1;
250 UINT8 Dcd : 1;
251 } Bits;
252 UINT8 Data;
254
255#pragma pack()
256//
257// Define serial register I/O macros
258//
259#define READ_RBR(S) SerialReadRegister (S, SERIAL_REGISTER_RBR)
260#define READ_DLL(S) SerialReadRegister (S, SERIAL_REGISTER_DLL)
261#define READ_DLM(S) SerialReadRegister (S, SERIAL_REGISTER_DLM)
262#define READ_IER(S) SerialReadRegister (S, SERIAL_REGISTER_IER)
263#define READ_IIR(S) SerialReadRegister (S, SERIAL_REGISTER_IIR)
264#define READ_LCR(S) SerialReadRegister (S, SERIAL_REGISTER_LCR)
265#define READ_MCR(S) SerialReadRegister (S, SERIAL_REGISTER_MCR)
266#define READ_LSR(S) SerialReadRegister (S, SERIAL_REGISTER_LSR)
267#define READ_MSR(S) SerialReadRegister (S, SERIAL_REGISTER_MSR)
268#define READ_SCR(S) SerialReadRegister (S, SERIAL_REGISTER_SCR)
269
270#define WRITE_THR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_THR, D)
271#define WRITE_DLL(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLL, D)
272#define WRITE_DLM(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLM, D)
273#define WRITE_IER(S, D) SerialWriteRegister (S, SERIAL_REGISTER_IER, D)
274#define WRITE_FCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_FCR, D)
275#define WRITE_LCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LCR, D)
276#define WRITE_MCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MCR, D)
277#define WRITE_LSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LSR, D)
278#define WRITE_MSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MSR, D)
279#define WRITE_SCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_SCR, D)
280
281//
282// Prototypes
283// Driver model protocol interface
284//
285
297EFIAPI
300 IN EFI_HANDLE Controller,
301 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
302 );
303
314EFIAPI
317 IN EFI_HANDLE Controller,
318 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
319 );
320
334EFIAPI
337 IN EFI_HANDLE Controller,
338 IN UINTN NumberOfChildren,
339 IN EFI_HANDLE *ChildHandleBuffer
340 );
341
342//
343// Serial I/O Protocol Interface
344//
345
356EFIAPI
359 );
360
379EFIAPI
382 IN UINT64 BaudRate,
383 IN UINT32 ReceiveFifoDepth,
384 IN UINT32 Timeout,
385 IN EFI_PARITY_TYPE Parity,
386 IN UINT8 DataBits,
387 IN EFI_STOP_BITS_TYPE StopBits
388 );
389
401EFIAPI
404 IN UINT32 Control
405 );
406
417EFIAPI
420 OUT UINT32 *Control
421 );
422
437EFIAPI
440 IN OUT UINTN *BufferSize,
441 IN VOID *Buffer
442 );
443
458EFIAPI
461 IN OUT UINTN *BufferSize,
462 OUT VOID *Buffer
463 );
464
465//
466// Internal Functions
467//
468
476BOOLEAN
478 IN SERIAL_DEV *SerialDevice
479 );
480
489BOOLEAN
491 IN SERIAL_DEV_FIFO *Fifo
492 );
493
502BOOLEAN
504 IN SERIAL_DEV_FIFO *Fifo
505 );
506
519 IN SERIAL_DEV_FIFO *Fifo,
520 IN UINT8 Data
521 );
522
535 IN SERIAL_DEV_FIFO *Fifo,
536 OUT UINT8 *Data
537 );
538
551 IN SERIAL_DEV *SerialDevice
552 );
553
562UINT8
564 IN SERIAL_DEV *SerialDev,
565 IN UINT32 Offset
566 );
567
575VOID
577 IN SERIAL_DEV *SerialDev,
578 IN UINT32 Offset,
579 IN UINT8 Data
580 );
581
582//
583// EFI Component Name Functions
584//
585
626EFIAPI
629 IN CHAR8 *Language,
630 OUT CHAR16 **DriverName
631 );
632
702EFIAPI
705 IN EFI_HANDLE ControllerHandle,
706 IN EFI_HANDLE ChildHandle OPTIONAL,
707 IN CHAR8 *Language,
708 OUT CHAR16 **ControllerName
709 );
710
717VOID
718AddName (
719 IN SERIAL_DEV *SerialDevice,
720 IN UINT32 Uid
721 );
722
743BOOLEAN
745 IN UINT32 ClockRate,
746 IN UINT64 BaudRate,
747 IN UINT8 DataBits,
748 IN EFI_PARITY_TYPE Parity,
749 IN EFI_STOP_BITS_TYPE StopBits,
750 OUT UINT64 *Divisor,
751 OUT UINT64 *ActualBaudRate
752 );
753
766 EFI_DEVICE_PATH_PROTOCOL *DevicePath,
767 BOOLEAN *ContainsControllerNode,
768 UINT32 *ControllerNumber
769 );
770
780BOOLEAN
783 );
784
785#endif
UINT64 UINTN
#define IN
Definition: Base.h:279
#define OUT
Definition: Base.h:284
BOOLEAN SerialFifoFull(IN SERIAL_DEV_FIFO *Fifo)
Definition: SerialIo.c:214
BOOLEAN SerialFifoEmpty(IN SERIAL_DEV_FIFO *Fifo)
Definition: SerialIo.c:229
EFI_STATUS EFIAPI SerialSetAttributes(IN EFI_SERIAL_IO_PROTOCOL *This, IN UINT64 BaudRate, IN UINT32 ReceiveFifoDepth, IN UINT32 Timeout, IN EFI_PARITY_TYPE Parity, IN UINT8 DataBits, IN EFI_STOP_BITS_TYPE StopBits)
Definition: SerialIo.c:282
EFI_STATUS EFIAPI SerialSetControl(IN EFI_SERIAL_IO_PROTOCOL *This, IN UINT32 Control)
Definition: SerialIo.c:405
EFI_STATUS EFIAPI SerialReset(IN EFI_SERIAL_IO_PROTOCOL *This)
Definition: SerialIo.c:217
BOOLEAN SerialPresent(IN SERIAL_DEV *SerialDevice)
Definition: SerialIo.c:1318
BOOLEAN VerifyUartParameters(IN UINT32 ClockRate, IN UINT64 BaudRate, IN UINT8 DataBits, IN EFI_PARITY_TYPE Parity, IN EFI_STOP_BITS_TYPE StopBits, OUT UINT64 *Divisor, OUT UINT64 *ActualBaudRate)
Definition: SerialIo.c:71
BOOLEAN IsUartFlowControlDevicePathNode(IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl)
Definition: Serial.c:97
EFI_STATUS EFIAPI SerialControllerDriverStart(IN EFI_DRIVER_BINDING_PROTOCOL *This, IN EFI_HANDLE Controller, IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath)
Definition: Serial.c:806
VOID AddName(IN SERIAL_DEV *SerialDevice, IN UINT32 Uid)
#define SERIAL_MAX_FIFO_SIZE
Actual FIFO size is 16. FIFO based on circular wastes one unit.
Definition: Serial.h:75
EFI_STATUS EFIAPI SerialWrite(IN EFI_SERIAL_IO_PROTOCOL *This, IN OUT UINTN *BufferSize, IN VOID *Buffer)
Definition: SerialIo.c:448
EFI_STATUS SerialFifoAdd(IN SERIAL_DEV_FIFO *Fifo, IN UINT8 Data)
EFI_STATUS SerialFifoRemove(IN SERIAL_DEV_FIFO *Fifo, OUT UINT8 *Data)
EFI_STATUS EFIAPI SerialGetControl(IN EFI_SERIAL_IO_PROTOCOL *This, OUT UINT32 *Control)
Definition: SerialIo.c:425
EFI_STATUS EFIAPI SerialControllerDriverStop(IN EFI_DRIVER_BINDING_PROTOCOL *This, IN EFI_HANDLE Controller, IN UINTN NumberOfChildren, IN EFI_HANDLE *ChildHandleBuffer)
Definition: Serial.c:1164
EFI_STATUS EFIAPI SerialControllerDriverSupported(IN EFI_DRIVER_BINDING_PROTOCOL *This, IN EFI_HANDLE Controller, IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath)
Definition: Serial.c:351
VOID SerialWriteRegister(IN SERIAL_DEV *SerialDev, IN UINT32 Offset, IN UINT8 Data)
Definition: SerialIo.c:1405
EFI_STATUS EFIAPI SerialRead(IN EFI_SERIAL_IO_PROTOCOL *This, IN OUT UINTN *BufferSize, OUT VOID *Buffer)
Definition: SerialIo.c:481
EFI_STATUS EFIAPI SerialComponentNameGetControllerName(IN EFI_COMPONENT_NAME_PROTOCOL *This, IN EFI_HANDLE ControllerHandle, IN EFI_HANDLE ChildHandle OPTIONAL, IN CHAR8 *Language, OUT CHAR16 **ControllerName)
EFI_STATUS SerialReceiveTransmit(IN SERIAL_DEV *SerialDevice)
Definition: SerialIo.c:309
EFI_STATUS EFIAPI SerialComponentNameGetDriverName(IN EFI_COMPONENT_NAME_PROTOCOL *This, IN CHAR8 *Language, OUT CHAR16 **DriverName)
Definition: ComponentName.c:81
UART_DEVICE_PATH * SkipControllerDevicePathNode(EFI_DEVICE_PATH_PROTOCOL *DevicePath, BOOLEAN *ContainsControllerNode, UINT32 *ControllerNumber)
Definition: SerialIo.c:22
UINT8 SerialReadRegister(IN SERIAL_DEV *SerialDev, IN UINT32 Offset)
Definition: SerialIo.c:1361
EFI_STOP_BITS_TYPE
Definition: SerialIo.h:53
EFI_PARITY_TYPE
Definition: SerialIo.h:41
UINT64 EFI_PHYSICAL_ADDRESS
Definition: UefiBaseType.h:50
RETURN_STATUS EFI_STATUS
Definition: UefiBaseType.h:29
VOID * EFI_HANDLE
Definition: UefiBaseType.h:33
UINT16 VendorId
Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.
Definition: Serial.h:63
UINT16 ReceiveFifoDepth
UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
Definition: Serial.h:69
UINT8 RegisterStride
UART register stride in bytes. Set to 0 for default register stride of 1 byte.
Definition: Serial.h:68
UINT16 DeviceId
Device ID to match the PCI device.
Definition: Serial.h:64
UINT16 TransmitFifoDepth
UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
Definition: Serial.h:70
UINT8 BarIndex
Which BAR to get the UART base address.
Definition: Serial.h:67
UINT64 Offset
The byte offset into to the BAR.
Definition: Serial.h:66
UINT32 ClockRate
UART clock rate. Set to 0 for default clock rate of 1843200 Hz.
Definition: Serial.h:65
UINT16 Tail
Tail pointer of the FIFO. Full when ((Tail + 1) % SERIAL_MAX_FIFO_SIZE == Head).
Definition: Serial.h:78
UINT16 Head
Head pointer of the FIFO. Empty when (Head == Tail).
Definition: Serial.h:77
UINT16 ReceiveFifoDepth
UART receive FIFO depth in bytes.
Definition: Serial.h:108
BOOLEAN MmioAccess
TRUE for MMIO, FALSE for IO.
Definition: Serial.h:104
UINT16 TransmitFifoDepth
UART transmit FIFO depth in bytes.
Definition: Serial.h:111
BOOLEAN ContainsControllerNode
TRUE if the device produced contains Controller node.
Definition: Serial.h:117
SERIAL_DEV_FIFO Receive
The FIFO used to store received data.
Definition: Serial.h:109
SERIAL_DEV_FIFO Transmit
The FIFO used to store to-transmit data.
Definition: Serial.h:112
UINT8 RegisterStride
UART Register Stride.
Definition: Serial.h:105
EFI_PHYSICAL_ADDRESS BaseAddress
UART base address.
Definition: Serial.h:103
UINT32 ClockRate
UART clock rate.
Definition: Serial.h:106
UINT8 ResetRF
Reset Reciever FIFO.
Definition: Serial.h:180
UINT8 ResetTF
Reset Transmistter FIFO.
Definition: Serial.h:181
UINT8 Dms
DMA Mode Select.
Definition: Serial.h:182
UINT8 Rtb
Receive Trigger Bits.
Definition: Serial.h:185
UINT8 TrFIFOE
Transmit and Receive FIFO Enable.
Definition: Serial.h:179
UINT8 TrFIFO64
Enable 64 byte FIFO.
Definition: Serial.h:184
UINT8 Theie
Transmistter Holding Register Empty Interrupt Enable.
Definition: Serial.h:166
UINT8 Rie
Receiver Interrupt Enable.
Definition: Serial.h:167
UINT8 Mie
Modem Interrupt Enable.
Definition: Serial.h:168
UINT8 Ravie
Receiver Data Available Interrupt Enable.
Definition: Serial.h:165
UINT8 BrCon
Break Control.
Definition: Serial.h:200
UINT8 SerialDB
Number of Serial Data Bits.
Definition: Serial.h:195
UINT8 DLab
Divisor Latch Access Bit.
Definition: Serial.h:201
UINT8 StopB
Number of Stop Bits.
Definition: Serial.h:196
UINT8 EvenPar
Even Parity Select.
Definition: Serial.h:198
UINT8 SticPar
Sticky Parity.
Definition: Serial.h:199
UINT8 ParEn
Parity Enable.
Definition: Serial.h:197
UINT8 Dr
Receiver Data Ready Status.
Definition: Serial.h:226
UINT8 Oe
Overrun Error Status.
Definition: Serial.h:227
UINT8 Temt
Transmitter Empty Status.
Definition: Serial.h:232
UINT8 FIFOe
FIFO Error Status.
Definition: Serial.h:233
UINT8 Bi
Break Interrupt Status.
Definition: Serial.h:230
UINT8 Pe
Parity Error Status.
Definition: Serial.h:228
UINT8 Thre
Transmistter Holding Register Status.
Definition: Serial.h:231
UINT8 Fe
Framing Error Status.
Definition: Serial.h:229
UINT8 DtrC
Data Terminal Ready Control.
Definition: Serial.h:211
UINT8 Out1
Output1.
Definition: Serial.h:213
UINT8 Rts
Request To Send Control.
Definition: Serial.h:212
UINT8 Out2
Output2, used to disable interrupt.
Definition: Serial.h:214
UINT8 Lme
Loopback Mode Enable.
Definition: Serial.h:215
UINT8 Dcd
Data Carrier Detect Status.
Definition: Serial.h:250
UINT8 Dsr
Data Set Ready Status.
Definition: Serial.h:248
UINT8 DeltaCTS
Delta Clear To Send Status.
Definition: Serial.h:243
UINT8 TrailingEdgeRI
Trailing Edge of Ring Indicator Status.
Definition: Serial.h:245
UINT8 DeltaDCD
Delta Data Carrier Detect Status.
Definition: Serial.h:246
UINT8 Ri
Ring Indicator Status.
Definition: Serial.h:249
UINT8 DeltaDSR
Delta Data Set Ready Status.
Definition: Serial.h:244
UINT8 Cts
Clear To Send Status.
Definition: Serial.h:247