TianoCore EDK2 master
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#include <PiDxe.h>
#include <Uefi/UefiBaseType.h>
#include <IndustryStandard/Pci30.h>
#include <Library/IoLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/SpiFlashLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/BaseLib.h>
#include <Library/HobLib.h>
#include <Library/TimerLib.h>
#include <Guid/SpiFlashInfoGuid.h>
#include "RegsSpi.h"
Go to the source code of this file.
Data Structures | |
struct | SPI_INSTANCE |
Macros | |
#define | WAIT_TIME 6000000 |
Wait Time = 6 seconds = 6000000 microseconds. | |
#define | WAIT_PERIOD 10 |
Wait Period = 10 microseconds. | |
#define | SC_SPI_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('P', 'S', 'P', 'I') |
Enumerations | |
enum | FLASH_CYCLE_TYPE { FlashCycleRead , FlashCycleWrite , FlashCycleErase , FlashCycleReadSfdp , FlashCycleReadJedecId , FlashCycleWriteStatus , FlashCycleReadStatus , FlashCycleMax } |
enum | FLASH_COMPONENT_NUM { FlashComponent0 , FlashComponent1 , FlashComponentMax } |
Functions | |
UINT32 | AcquireSpiBar0 (IN UINTN PchSpiBase) |
VOID | ReleaseSpiBar0 (IN UINTN PchSpiBase) |
EFI_STATUS EFIAPI | DisableBiosWriteProtect (IN UINTN PchSpiBase, IN UINT8 CpuSmmBwp) |
VOID EFIAPI | EnableBiosWriteProtect (IN UINTN PchSpiBase, IN UINT8 CpuSmmBwp) |
UINT8 | SaveAndDisableSpiPrefetchCache (IN UINTN PchSpiBase) |
VOID | SetSpiBiosControlRegister (IN UINTN PchSpiBase, IN UINT8 BiosCtlValue) |
EFI_STATUS | SendSpiCmd (IN FLASH_REGION_TYPE FlashRegionType, IN FLASH_CYCLE_TYPE FlashCycleType, IN UINT32 Address, IN UINT32 ByteCount, IN OUT UINT8 *Buffer) |
BOOLEAN | WaitForSpiCycleComplete (IN UINT32 PchSpiBar0, IN BOOLEAN ErrorCheck) |
Header file for the SPI flash module.
Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file SpiCommon.h.
#define SC_SPI_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('P', 'S', 'P', 'I') |
Private data structure definitions for the driver
Definition at line 60 of file SpiCommon.h.
#define WAIT_PERIOD 10 |
Wait Period = 10 microseconds.
Definition at line 32 of file SpiCommon.h.
#define WAIT_TIME 6000000 |
Wait Time = 6 seconds = 6000000 microseconds.
Maximum time allowed while waiting the SPI cycle to complete Wait Time = 6 seconds = 6000000 microseconds Wait Period = 10 microseconds
Definition at line 31 of file SpiCommon.h.
enum FLASH_COMPONENT_NUM |
Flash Component Number
Definition at line 51 of file SpiCommon.h.
enum FLASH_CYCLE_TYPE |
Flash cycle Type
Definition at line 37 of file SpiCommon.h.
EFI_STATUS EFIAPI DisableBiosWriteProtect | ( | IN UINTN | PchSpiBase, |
IN UINT8 | CpuSmmBwp | ||
) |
This function is a hook for Spi to disable BIOS Write Protect
[in] | PchSpiBase | PCH SPI PCI Base Address |
[in] | CpuSmmBwp | Need to disable CPU SMM Bios write protection or not |
EFI_SUCCESS | The protocol instance was properly initialized |
EFI_ACCESS_DENIED | The BIOS Region can only be updated in SMM phase |
This function is a hook for Spi to disable BIOS Write Protect.
[in] | PchSpiBase | PCH SPI PCI Base Address |
[in] | CpuSmmBwp | Need to disable CPU SMM Bios write protection or not |
EFI_SUCCESS | The protocol instance was properly initialized |
EFI_ACCESS_DENIED | The BIOS Region can only be updated in SMM phase |
This function is a hook for Spi to enable BIOS Write Protect
[in] | PchSpiBase | PCH SPI PCI Base Address |
[in] | CpuSmmBwp | Need to disable CPU SMM Bios write protection or not |
None |
This function is a hook for Spi to enable BIOS Write Protect.
[in] | PchSpiBase | PCH SPI PCI Base Address |
[in] | CpuSmmBwp | Need to disable CPU SMM Bios write protection or not |
EFI_STATUS SendSpiCmd | ( | IN FLASH_REGION_TYPE | FlashRegionType, |
IN FLASH_CYCLE_TYPE | FlashCycleType, | ||
IN UINT32 | Address, | ||
IN UINT32 | ByteCount, | ||
IN OUT UINT8 * | Buffer | ||
) |
This function sends the programmed SPI command to the slave device.
[in] | SpiRegionType | The SPI Region type for flash cycle which is listed in the Descriptor |
[in] | FlashCycleType | The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register |
[in] | Address | The Flash Linear Address must fall within a region for which BIOS has access permissions. |
[in] | ByteCount | Number of bytes in the data portion of the SPI cycle. |
[in,out] | Buffer | Pointer to caller-allocated buffer containing the data received or sent during the SPI cycle. |
EFI_SUCCESS | SPI command completes successfully. |
EFI_DEVICE_ERROR | Device error, the command aborts abnormally. |
EFI_ACCESS_DENIED | Some unrecognized command encountered in hardware sequencing mode |
EFI_INVALID_PARAMETER | The parameters specified are not valid. |
This function sends the programmed SPI command to the slave device.
[in] | FlashRegionType | The SPI Region type for flash cycle which is listed in the Descriptor |
[in] | FlashCycleType | The Flash SPI cycle type list in HSFC (Hardware Sequencing Flash Control Register) register |
[in] | Address | The Flash Linear Address must fall within a region for which BIOS has access permissions. |
[in] | ByteCount | Number of bytes in the data portion of the SPI cycle. |
[in,out] | Buffer | Pointer to caller-allocated buffer containing the data received or sent during the SPI cycle. |
EFI_SUCCESS | SPI command completes successfully. |
EFI_DEVICE_ERROR | Device error, the command aborts abnormally. |
EFI_ACCESS_DENIED | Some unrecognized command encountered in hardware sequencing mode |
EFI_INVALID_PARAMETER | The parameters specified are not valid. |
Restore the settings for SPI Prefetching and Caching and enable BIOS Write Protect
Definition at line 419 of file SpiFlashLib.c.
This function updates BIOS Control Register with the given value.
[in] | PchSpiBase | PCH SPI PCI Base Address |
[in] | BiosCtlValue | BIOS Control Register Value to be updated |
None |
This function updates BIOS Control Register with the given value.
[in] | PchSpiBase | PCH SPI PCI Base Address |
[in] | BiosCtlValue | BIOS Control Register Value to be updated |
Wait execution cycle to complete on the SPI interface.
[in] | PchSpiBar0 | Spi MMIO base address |
[in] | ErrorCheck | TRUE if the SpiCycle needs to do the error check |
TRUE | SPI cycle completed on the interface. |
FALSE | Time out while waiting the SPI cycle to complete. It's not safe to program the next command on the SPI interface. |
Wait execution cycle to complete on the SPI interface.
[in] | ScSpiBar0 | Spi MMIO base address |
[in] | ErrorCheck | TRUE if the SpiCycle needs to do the error check |
TRUE | SPI cycle completed on the interface. |
FALSE | Time out while waiting the SPI cycle to complete. It's not safe to program the next command on the SPI interface. |
Definition at line 774 of file SpiFlashLib.c.