TianoCore EDK2 master
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#include <Register/Intel/Cpuid.h>
#include <Register/Amd/Cpuid.h>
#include <Register/Intel/Msr.h>
#include <Register/Intel/LocalApic.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/LocalApicLib.h>
#include <Library/IoLib.h>
#include <Library/TimerLib.h>
#include <Library/PcdLib.h>
#include <Library/CpuLib.h>
Go to the source code of this file.
Functions | |
BOOLEAN | LocalApicBaseAddressMsrSupported (VOID) |
UINTN EFIAPI | GetLocalApicBaseAddress (VOID) |
VOID EFIAPI | SetLocalApicBaseAddress (IN UINTN BaseAddress) |
UINT32 EFIAPI | ReadLocalApicReg (IN UINTN MmioOffset) |
VOID EFIAPI | WriteLocalApicReg (IN UINTN MmioOffset, IN UINT32 Value) |
VOID | SendIpi (IN UINT32 IcrLow, IN UINT32 ApicId) |
UINTN EFIAPI | GetApicMode (VOID) |
VOID EFIAPI | SetApicMode (IN UINTN ApicMode) |
UINT32 EFIAPI | GetInitialApicId (VOID) |
UINT32 EFIAPI | GetApicId (VOID) |
UINT32 EFIAPI | GetApicVersion (VOID) |
VOID EFIAPI | SendFixedIpi (IN UINT32 ApicId, IN UINT8 Vector) |
VOID EFIAPI | SendFixedIpiAllExcludingSelf (IN UINT8 Vector) |
VOID EFIAPI | SendSmiIpi (IN UINT32 ApicId) |
VOID EFIAPI | SendSmiIpiAllExcludingSelf (VOID) |
VOID EFIAPI | SendInitIpi (IN UINT32 ApicId) |
VOID EFIAPI | SendInitIpiAllExcludingSelf (VOID) |
VOID EFIAPI | SendStartupIpiAllExcludingSelf (IN UINT32 StartupRoutine) |
VOID EFIAPI | SendInitSipiSipi (IN UINT32 ApicId, IN UINT32 StartupRoutine) |
VOID EFIAPI | SendInitSipiSipiAllExcludingSelf (IN UINT32 StartupRoutine) |
VOID EFIAPI | InitializeLocalApicSoftwareEnable (IN BOOLEAN Enable) |
VOID EFIAPI | ProgramVirtualWireMode (VOID) |
VOID EFIAPI | DisableLvtInterrupts (VOID) |
UINT32 EFIAPI | GetApicTimerInitCount (VOID) |
UINT32 EFIAPI | GetApicTimerCurrentCount (VOID) |
VOID EFIAPI | InitializeApicTimer (IN UINTN DivideValue, IN UINT32 InitCount, IN BOOLEAN PeriodicMode, IN UINT8 Vector) |
VOID EFIAPI | GetApicTimerState (OUT UINTN *DivideValue OPTIONAL, OUT BOOLEAN *PeriodicMode OPTIONAL, OUT UINT8 *Vector OPTIONAL) |
VOID EFIAPI | EnableApicTimerInterrupt (VOID) |
VOID EFIAPI | DisableApicTimerInterrupt (VOID) |
BOOLEAN EFIAPI | GetApicTimerInterruptState (VOID) |
VOID EFIAPI | SendApicEoi (VOID) |
UINT32 EFIAPI | GetApicMsiAddress (VOID) |
UINT64 EFIAPI | GetApicMsiValue (IN UINT8 Vector, IN UINTN DeliveryMode, IN BOOLEAN LevelTriggered, IN BOOLEAN AssertionLevel) |
VOID EFIAPI | GetProcessorLocationByApicId (IN UINT32 InitialApicId, OUT UINT32 *Package OPTIONAL, OUT UINT32 *Core OPTIONAL, OUT UINT32 *Thread OPTIONAL) |
VOID | AmdGetProcessorLocation2ByApicId (IN UINT32 InitialApicId, OUT UINT32 *Package OPTIONAL, OUT UINT32 *Die OPTIONAL, OUT UINT32 *Tile OPTIONAL, OUT UINT32 *Module OPTIONAL, OUT UINT32 *Core OPTIONAL, OUT UINT32 *Thread OPTIONAL) |
VOID EFIAPI | GetProcessorLocation2ByApicId (IN UINT32 InitialApicId, OUT UINT32 *Package OPTIONAL, OUT UINT32 *Die OPTIONAL, OUT UINT32 *Tile OPTIONAL, OUT UINT32 *Module OPTIONAL, OUT UINT32 *Core OPTIONAL, OUT UINT32 *Thread OPTIONAL) |
Local APIC Library.
This local APIC library instance supports xAPIC mode only.
Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.
Copyright (c) 2017 - 2024, AMD Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Definition in file BaseXApicLib.c.
VOID AmdGetProcessorLocation2ByApicId | ( | IN UINT32 | InitialApicId, |
OUT UINT32 *Package | OPTIONAL, | ||
OUT UINT32 *Die | OPTIONAL, | ||
OUT UINT32 *Tile | OPTIONAL, | ||
OUT UINT32 *Module | OPTIONAL, | ||
OUT UINT32 *Core | OPTIONAL, | ||
OUT UINT32 *Thread | OPTIONAL | ||
) |
Get Package ID/Die ID/Module ID/Core ID/Thread ID of a AMD processor family.
The algorithm assumes the target system has symmetry across physical package boundaries with respect to the number of threads per core, number of cores per module, number of modules per die, number of dies per package.
[in] | InitialApicId | Initial APIC ID of the target logical processor. |
[out] | Package | Returns the processor package ID. |
[out] | Die | Returns the processor die ID. |
[out] | Tile | Returns zero. |
[out] | Module | Returns the processor module ID. |
[out] | Core | Returns the processor core ID. |
[out] | Thread | Returns the processor thread ID. |
Check if extended toplogy supported
if this fails at first level then will fall back to non-extended topology
If extended topology CPUID is not supported OR, execution of AMD_CPUID_EXTENDED_TOPOLOGY at level 0 fails(return 0).
Definition at line 1177 of file BaseXApicLib.c.
VOID EFIAPI DisableApicTimerInterrupt | ( | VOID | ) |
Disable the local APIC timer interrupt.
Definition at line 851 of file BaseXApicLib.c.
VOID EFIAPI DisableLvtInterrupts | ( | VOID | ) |
Disable LINT0 & LINT1 interrupts.
This function sets the mask flag in the LVT LINT0 & LINT1 registers.
Definition at line 676 of file BaseXApicLib.c.
VOID EFIAPI EnableApicTimerInterrupt | ( | VOID | ) |
Enable the local APIC timer interrupt.
Definition at line 835 of file BaseXApicLib.c.
UINT32 EFIAPI GetApicId | ( | VOID | ) |
Get the local APIC ID of the executing processor.
Definition at line 337 of file BaseXApicLib.c.
UINTN EFIAPI GetApicMode | ( | VOID | ) |
Get the current local APIC mode.
If local APIC is disabled, then ASSERT.
LOCAL_APIC_MODE_XAPIC | current APIC mode is xAPIC. |
LOCAL_APIC_MODE_X2APIC | current APIC mode is x2APIC. |
Definition at line 242 of file BaseXApicLib.c.
UINT32 EFIAPI GetApicMsiAddress | ( | VOID | ) |
Get the 32-bit address that a device should use to send a Message Signaled Interrupt (MSI) to the Local APIC of the currently executing processor.
Definition at line 900 of file BaseXApicLib.c.
UINT64 EFIAPI GetApicMsiValue | ( | IN UINT8 | Vector, |
IN UINTN | DeliveryMode, | ||
IN BOOLEAN | LevelTriggered, | ||
IN BOOLEAN | AssertionLevel | ||
) |
Get the 64-bit data value that a device should use to send a Message Signaled Interrupt (MSI) to the Local APIC of the currently executing processor.
If Vector is not in range 0x10..0xFE, then ASSERT(). If DeliveryMode is not supported, then ASSERT().
Vector | The 8-bit interrupt vector associated with the MSI. Must be in the range 0x10..0xFE |
DeliveryMode | A 3-bit value that specifies how the recept of the MSI is handled. The only supported values are: 0: LOCAL_APIC_DELIVERY_MODE_FIXED 1: LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY 2: LOCAL_APIC_DELIVERY_MODE_SMI 4: LOCAL_APIC_DELIVERY_MODE_NMI 5: LOCAL_APIC_DELIVERY_MODE_INIT 7: LOCAL_APIC_DELIVERY_MODE_EXTINT |
LevelTriggered | TRUE specifies a level triggered interrupt. FALSE specifies an edge triggered interrupt. |
AssertionLevel | Ignored if LevelTriggered is FALSE. TRUE specifies a level triggered interrupt that active when the interrupt line is asserted. FALSE specifies a level triggered interrupt that active when the interrupt line is deasserted. |
Definition at line 946 of file BaseXApicLib.c.
UINT32 EFIAPI GetApicTimerCurrentCount | ( | VOID | ) |
Read the current count value from the current-count register.
Definition at line 712 of file BaseXApicLib.c.
UINT32 EFIAPI GetApicTimerInitCount | ( | VOID | ) |
Read the initial count value from the init-count register.
Definition at line 698 of file BaseXApicLib.c.
BOOLEAN EFIAPI GetApicTimerInterruptState | ( | VOID | ) |
Get the local APIC timer interrupt state.
TRUE | The local APIC timer interrupt is enabled. |
FALSE | The local APIC timer interrupt is disabled. |
Definition at line 870 of file BaseXApicLib.c.
VOID EFIAPI GetApicTimerState | ( | OUT UINTN *DivideValue | OPTIONAL, |
OUT BOOLEAN *PeriodicMode | OPTIONAL, | ||
OUT UINT8 *Vector | OPTIONAL | ||
) |
Get the state of the local APIC timer.
This function will ASSERT if the local APIC is not software enabled.
DivideValue | Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128. |
PeriodicMode | Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot. |
Vector | Return the timer interrupt vector number. |
Definition at line 790 of file BaseXApicLib.c.
UINT32 EFIAPI GetApicVersion | ( | VOID | ) |
Get the value of the local APIC version register.
Definition at line 364 of file BaseXApicLib.c.
UINT32 EFIAPI GetInitialApicId | ( | VOID | ) |
Get the initial local APIC ID of the executing processor assigned by hardware upon power on or reset.
In xAPIC mode, the initial local APIC ID may be different from current APIC ID. In x2APIC mode, the local APIC ID can't be changed and there is no concept of initial APIC ID. In this case, the 32-bit local APIC ID is returned as initial APIC ID.
Definition at line 298 of file BaseXApicLib.c.
UINTN EFIAPI GetLocalApicBaseAddress | ( | VOID | ) |
Retrieve the base address of local APIC.
Definition at line 66 of file BaseXApicLib.c.
VOID EFIAPI GetProcessorLocation2ByApicId | ( | IN UINT32 | InitialApicId, |
OUT UINT32 *Package | OPTIONAL, | ||
OUT UINT32 *Die | OPTIONAL, | ||
OUT UINT32 *Tile | OPTIONAL, | ||
OUT UINT32 *Module | OPTIONAL, | ||
OUT UINT32 *Core | OPTIONAL, | ||
OUT UINT32 *Thread | OPTIONAL | ||
) |
Get Package ID/Die ID/Tile ID/Module ID/Core ID/Thread ID of a processor.
The algorithm assumes the target system has symmetry across physical package boundaries with respect to the number of threads per core, number of cores per module, number of modules per tile, number of tiles per die, number of dies per package.
[in] | InitialApicId | Initial APIC ID of the target logical processor. |
[out] | Package | Returns the processor package ID. |
[out] | Die | Returns the processor die ID. |
[out] | Tile | Returns the processor tile ID. |
[out] | Module | Returns the processor module ID. |
[out] | Core | Returns the processor core ID. |
[out] | Thread | Returns the processor thread ID. |
Definition at line 1297 of file BaseXApicLib.c.
VOID EFIAPI GetProcessorLocationByApicId | ( | IN UINT32 | InitialApicId, |
OUT UINT32 *Package | OPTIONAL, | ||
OUT UINT32 *Core | OPTIONAL, | ||
OUT UINT32 *Thread | OPTIONAL | ||
) |
Get Package ID/Core ID/Thread ID of a processor.
The algorithm assumes the target system has symmetry across physical package boundaries with respect to the number of logical processors per package, number of cores per package.
[in] | InitialApicId | Initial APIC ID of the target logical processor. |
[out] | Package | Returns the processor package ID. |
[out] | Core | Returns the processor core ID. |
[out] | Thread | Returns the processor thread ID. |
Definition at line 985 of file BaseXApicLib.c.
VOID EFIAPI InitializeApicTimer | ( | IN UINTN | DivideValue, |
IN UINT32 | InitCount, | ||
IN BOOLEAN | PeriodicMode, | ||
IN UINT8 | Vector | ||
) |
Initialize the local APIC timer.
The local APIC timer is initialized and enabled.
DivideValue | The divide value for the DCR. It is one of 1,2,4,8,16,32,64,128. If it is 0, then use the current divide value in the DCR. |
InitCount | The initial count value. |
PeriodicMode | If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot. |
Vector | The timer interrupt vector number. |
Definition at line 732 of file BaseXApicLib.c.
VOID EFIAPI InitializeLocalApicSoftwareEnable | ( | IN BOOLEAN | Enable | ) |
Initialize the state of the SoftwareEnable bit in the Local APIC Spurious Interrupt Vector register.
Enable | If TRUE, then set SoftwareEnable to 1 If FALSE, then set SoftwareEnable to 0. |
Definition at line 600 of file BaseXApicLib.c.
BOOLEAN LocalApicBaseAddressMsrSupported | ( | VOID | ) |
Determine if the CPU supports the Local APIC Base Address MSR.
TRUE | The CPU supports the Local APIC Base Address MSR. |
FALSE | The CPU does not support the Local APIC Base Address MSR. |
Definition at line 38 of file BaseXApicLib.c.
VOID EFIAPI ProgramVirtualWireMode | ( | VOID | ) |
Programming Virtual Wire Mode.
This function programs the local APIC for virtual wire mode following the example described in chapter A.3 of the MP 1.4 spec.
IOxAPIC is not involved in this type of virtual wire mode.
Definition at line 633 of file BaseXApicLib.c.
Read from a local APIC register.
This function reads from a local APIC register either in xAPIC or x2APIC mode. It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be accessed using multiple 32-bit loads or stores, so this function only performs 32-bit read.
MmioOffset | The MMIO offset of the local APIC register in xAPIC mode. It must be 16-byte aligned. |
Definition at line 134 of file BaseXApicLib.c.
VOID EFIAPI SendApicEoi | ( | VOID | ) |
Send EOI to the local APIC.
Definition at line 885 of file BaseXApicLib.c.
Send a Fixed IPI to a specified target processor.
This function returns after the IPI has been accepted by the target processor.
ApicId | The local APIC ID of the target processor. |
Vector | The vector number of the interrupt being sent. |
Definition at line 381 of file BaseXApicLib.c.
VOID EFIAPI SendFixedIpiAllExcludingSelf | ( | IN UINT8 | Vector | ) |
Send a Fixed IPI to all processors excluding self.
This function returns after the IPI has been accepted by the target processors.
Vector | The vector number of the interrupt being sent. |
Definition at line 404 of file BaseXApicLib.c.
VOID EFIAPI SendInitIpi | ( | IN UINT32 | ApicId | ) |
Send an INIT IPI to a specified target processor.
This function returns after the IPI has been accepted by the target processor.
ApicId | Specify the local APIC ID of the target processor. |
Definition at line 468 of file BaseXApicLib.c.
VOID EFIAPI SendInitIpiAllExcludingSelf | ( | VOID | ) |
Send an INIT IPI to all processors excluding self.
This function returns after the IPI has been accepted by the target processors.
Definition at line 487 of file BaseXApicLib.c.
Send an INIT-Start-up-Start-up IPI sequence to a specified target processor.
This function returns after the IPI has been accepted by the target processor.
if StartupRoutine >= 1M, then ASSERT. if StartupRoutine is not multiple of 4K, then ASSERT.
ApicId | Specify the local APIC ID of the target processor. |
StartupRoutine | Points to a start-up routine which is below 1M physical address and 4K aligned. |
Definition at line 541 of file BaseXApicLib.c.
VOID EFIAPI SendInitSipiSipiAllExcludingSelf | ( | IN UINT32 | StartupRoutine | ) |
Send an INIT-Start-up-Start-up IPI sequence to all processors excluding self.
This function returns after the IPI has been accepted by the target processors.
if StartupRoutine >= 1M, then ASSERT. if StartupRoutine is not multiple of 4K, then ASSERT.
StartupRoutine | Points to a start-up routine which is below 1M physical address and 4K aligned. |
Definition at line 577 of file BaseXApicLib.c.
Send an IPI by writing to ICR.
This function returns after the IPI has been accepted by the target processor.
IcrLow | 32-bit value to be written to the low half of ICR. |
ApicId | APIC ID of the target processor if this IPI is targeted for a specific processor. |
Definition at line 180 of file BaseXApicLib.c.
VOID EFIAPI SendSmiIpi | ( | IN UINT32 | ApicId | ) |
Send a SMI IPI to a specified target processor.
This function returns after the IPI has been accepted by the target processor.
ApicId | Specify the local APIC ID of the target processor. |
Definition at line 427 of file BaseXApicLib.c.
VOID EFIAPI SendSmiIpiAllExcludingSelf | ( | VOID | ) |
Send a SMI IPI to all processors excluding self.
This function returns after the IPI has been accepted by the target processors.
Definition at line 446 of file BaseXApicLib.c.
VOID EFIAPI SendStartupIpiAllExcludingSelf | ( | IN UINT32 | StartupRoutine | ) |
Send a Start-up IPI to all processors excluding self. This function returns after the IPI has been accepted by the target processors. if StartupRoutine >= 1M, then ASSERT. if StartupRoutine is not multiple of 4K, then ASSERT.
StartupRoutine | Points to a start-up routine which is below 1M physical address and 4K aligned. |
Definition at line 510 of file BaseXApicLib.c.
Set the current local APIC mode.
If the specified local APIC mode is not valid, then ASSERT. If the specified local APIC mode can't be set as current, then ASSERT.
ApicMode | APIC mode to be set. |
Definition at line 279 of file BaseXApicLib.c.
Set the base address of local APIC.
If BaseAddress is not aligned on a 4KB boundary, then ASSERT().
[in] | BaseAddress | Local APIC base address to be set. |
Definition at line 96 of file BaseXApicLib.c.
Write to a local APIC register.
This function writes to a local APIC register either in xAPIC or x2APIC mode. It is required that in xAPIC mode wider registers (64-bit or 256-bit) must be accessed using multiple 32-bit loads or stores, so this function only performs 32-bit write.
if the register index is invalid or unsupported in current APIC mode, then ASSERT.
MmioOffset | The MMIO offset of the local APIC register in xAPIC mode. It must be 16-byte aligned. |
Value | Value to be written to the register. |
Definition at line 160 of file BaseXApicLib.c.