BroadwellMsr.h

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#ifndef __BROADWELL_MSR_H__
#define __BROADWELL_MSR_H__
 
#include <Register/Intel/ArchitecturalMsr.h>
 
#define IS_BROADWELL_PROCESSOR(DisplayFamily, DisplayModel) \
  (DisplayFamily == 0x06 && \
   (                        \
    DisplayModel == 0x3D || \
    DisplayModel == 0x47 || \
    DisplayModel == 0x4F || \
    DisplayModel == 0x56    \
    )                       \
   )
 
#define MSR_BROADWELL_IA32_PERF_GLOBAL_STATUS  0x0000038E
 
typedef union {
  struct {
    UINT32    Ovf_PMC0       : 1;
    UINT32    Ovf_PMC1       : 1;
    UINT32    Ovf_PMC2       : 1;
    UINT32    Ovf_PMC3       : 1;
    UINT32    Reserved1      : 28;
    UINT32    Ovf_FixedCtr0  : 1;
    UINT32    Ovf_FixedCtr1  : 1;
    UINT32    Ovf_FixedCtr2  : 1;
    UINT32    Reserved2      : 20;
    UINT32    Trace_ToPA_PMI : 1;
    UINT32    Reserved3      : 5;
    UINT32    Ovf_Uncore     : 1;
    UINT32    OvfBuf         : 1;
    UINT32    CondChgd       : 1;
  } Bits;
  UINT64    Uint64;
} MSR_BROADWELL_IA32_PERF_GLOBAL_STATUS_REGISTER;
 
#define MSR_BROADWELL_PKG_CST_CONFIG_CONTROL  0x000000E2
 
typedef union {
  struct {
    UINT32    Limit              : 4;
    UINT32    Reserved1          : 6;
    UINT32    IO_MWAIT           : 1;
    UINT32    Reserved2          : 4;
    UINT32    CFGLock            : 1;
    UINT32    Reserved3          : 9;
    UINT32    C3AutoDemotion     : 1;
    UINT32    C1AutoDemotion     : 1;
    UINT32    C3Undemotion       : 1;
    UINT32    C1Undemotion       : 1;
    UINT32    CStateAutoDemotion : 1;
    UINT32    CStateUndemotion   : 1;
    UINT32    Reserved4          : 1;
    UINT32    Reserved5          : 32;
  } Bits;
  UINT32    Uint32;
  UINT64    Uint64;
} MSR_BROADWELL_PKG_CST_CONFIG_CONTROL_REGISTER;
 
#define MSR_BROADWELL_TURBO_RATIO_LIMIT  0x000001AD
 
typedef union {
  struct {
    UINT32    Maximum1C : 8;
    UINT32    Maximum2C : 8;
    UINT32    Maximum3C : 8;
    UINT32    Maximum4C : 8;
    UINT32    Maximum5C : 8;
    UINT32    Maximum6C : 8;
    UINT32    Reserved  : 16;
  } Bits;
  UINT64    Uint64;
} MSR_BROADWELL_TURBO_RATIO_LIMIT_REGISTER;
 
#define MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT  0x00000620
 
typedef union {
  struct {
    UINT32    MAX_RATIO : 7;
    UINT32    Reserved2 : 1;
    UINT32    MIN_RATIO : 7;
    UINT32    Reserved3 : 17;
    UINT32    Reserved4 : 32;
  } Bits;
  UINT32    Uint32;
  UINT64    Uint64;
} MSR_BROADWELL_MSRUNCORE_RATIO_LIMIT_REGISTER;
 
#define MSR_BROADWELL_PP0_ENERGY_STATUS  0x00000639
 
#endif